Apply preempt_rt patch-4.9-rt1.patch.xz

[zynq/linux.git] / arch / arm / mach-qcom / platsmp.c

diff --git a/arch/arm/mach-qcom/platsmp.c b/arch/arm/mach-qcom/platsmp.c
index 5494c9e0c909b549ec696a9482852c339a4039a9..e8ce157d3548a654064e9c3939011711ad70d9f4 100644 (file)
--- a/arch/arm/mach-qcom/platsmp.c
+++ b/arch/arm/mach-qcom/platsmp.c
@@ -46,7 +46,7 @@
 
 extern void secondary_startup_arm(void);
 
-static DEFINE_SPINLOCK(boot_lock);
+static DEFINE_RAW_SPINLOCK(boot_lock);
 
 #ifdef CONFIG_HOTPLUG_CPU
 static void qcom_cpu_die(unsigned int cpu)
@@ -60,8 +60,8 @@ static void qcom_secondary_init(unsigned int cpu)
        /*
         * Synchronise with the boot thread.
         */
-       spin_lock(&boot_lock);
-       spin_unlock(&boot_lock);
+       raw_spin_lock(&boot_lock);
+       raw_spin_unlock(&boot_lock);
 }
 
 static int scss_release_secondary(unsigned int cpu)
@@ -284,7 +284,7 @@ static int qcom_boot_secondary(unsigned int cpu, int (*func)(unsigned int))
         * set synchronisation state between this boot processor
         * and the secondary one
         */
-       spin_lock(&boot_lock);
+       raw_spin_lock(&boot_lock);
 
        /*
         * Send the secondary CPU a soft interrupt, thereby causing
@@ -297,7 +297,7 @@ static int qcom_boot_secondary(unsigned int cpu, int (*func)(unsigned int))
         * now the secondary core is starting up let it run its
         * calibrations, then wait for it to finish
         */
-       spin_unlock(&boot_lock);
+       raw_spin_unlock(&boot_lock);
 
        return ret;
 }