1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Xilinx Scene Change Detection driver
5 * Copyright (C) 2018 Xilinx, Inc.
7 * Authors: Anand Ashok Dumbre <anand.ashok.dumbre@xilinx.com>
8 * Satish Kumar Nagireddy <satish.nagireddy.nagireddy@xilinx.com>
11 #ifndef _XILINX_SCENECHANGE_H_
12 #define _XILINX_SCENECHANGE_H_
14 #include <linux/clk.h>
15 #include <linux/delay.h>
16 #include <linux/dmaengine.h>
17 #include <linux/gpio/consumer.h>
18 #include <linux/interrupt.h>
19 #include <linux/kernel.h>
20 #include <linux/module.h>
22 #include <linux/of_irq.h>
23 #include <linux/platform_device.h>
24 #include <linux/xilinx-v4l2-controls.h>
26 #include <media/v4l2-async.h>
27 #include <media/v4l2-ctrls.h>
28 #include <media/v4l2-device.h>
29 #include <media/v4l2-subdev.h>
30 #include "../../../dma/dmaengine.h"
32 /* Register/Descriptor Offsets */
33 #define XSCD_CTRL_OFFSET 0x000
34 #define XSCD_CTRL_AP_START BIT(0)
35 #define XSCD_CTRL_AP_DONE BIT(1)
36 #define XSCD_CTRL_AP_IDLE BIT(2)
37 #define XSCD_CTRL_AP_READY BIT(3)
38 #define XSCD_CTRL_AUTO_RESTART BIT(7)
40 #define XSCD_GIE_OFFSET 0x004
41 #define XSCD_GIE_EN BIT(0)
43 #define XSCD_IE_OFFSET 0x008
44 #define XSCD_IE_AP_DONE BIT(0)
45 #define XSCD_IE_AP_READY BIT(1)
47 #define XSCD_ISR_OFFSET 0x00c
48 #define XSCD_WIDTH_OFFSET 0x010
49 #define XSCD_HEIGHT_OFFSET 0x018
50 #define XSCD_STRIDE_OFFSET 0x020
51 #define XSCD_VID_FMT_OFFSET 0x028
52 #define XSCD_VID_FMT_RGB 0
53 #define XSCD_VID_FMT_YUV_444 1
54 #define XSCD_VID_FMT_YUV_422 2
55 #define XSCD_VID_FMT_YUV_420 3
56 #define XSCD_VID_FMT_Y8 24
57 #define XSCD_VID_FMT_Y10 25
59 #define XSCD_SUBSAMPLE_OFFSET 0x030
60 #define XSCD_SAD_OFFSET 0x038
61 #define XSCD_ADDR_OFFSET 0x040
62 #define XSCD_CHAN_OFFSET 0x100
63 #define XSCD_CHAN_EN_OFFSET 0x780
65 #define XSCD_MAX_CHANNELS 8
67 /****************************** PROTOTYPES ************************************/
72 * struct xscd_dma_desc - DMA channel
73 * @luma_plane_addr: Luma plane buffer address
74 * @vsize: width of the luma frame
75 * @hsize: height of the luma frame
76 * @stride: stride of the luma frame
78 struct xscd_dma_desc {
79 dma_addr_t luma_plane_addr;
86 * struct xscd_dma_tx_descriptor - Per Transaction structure
87 * @async_tx: Async transaction descriptor
88 * @sw: Software Descriptor
89 * @node: Node in the channel descriptor list
91 struct xscd_dma_tx_descriptor {
92 struct dma_async_tx_descriptor async_tx;
93 struct xscd_dma_desc sw;
94 struct list_head node;
97 static inline struct xscd_dma_tx_descriptor *
98 to_xscd_dma_tx_descriptor(struct dma_async_tx_descriptor *tx)
100 return container_of(tx, struct xscd_dma_tx_descriptor, async_tx);
104 * struct xscd_dma_chan - DMA Channel structure
106 * @iomem: device I/O register space remapped to kernel virtual memory
107 * @lock: Descriptor operation lock
108 * @chan_node: Member of a list of framebuffer channel instances
109 * @pending_list: Descriptors waiting
110 * @done_list: Complete descriptors
111 * @staged_desc: Next buffer to be programmed
112 * @active_desc: Currently active buffer being read/written to
113 * @common: DMA common channel
114 * @idle: Channel idle state
115 * @tasklet: Cleanup work after irq
116 * @id: scene change channel ID
117 * @en: Channel is enabled
118 * @valid_interrupt: Valid interrupt for the channel
120 struct xscd_dma_chan {
121 struct xscd_device *xscd;
124 /* Descriptor operation Lock */
126 struct list_head chan_node;
127 struct list_head pending_list;
128 struct list_head done_list;
129 struct xscd_dma_tx_descriptor *staged_desc;
130 struct xscd_dma_tx_descriptor *active_desc;
131 struct dma_chan common;
133 struct tasklet_struct tasklet;
136 bool valid_interrupt;
139 static inline struct xscd_dma_chan *to_xscd_dma_chan(struct dma_chan *chan)
141 return container_of(chan, struct xscd_dma_chan, common);
145 * struct xscd_chan - Video Stream structure
146 * @id: scene change channel ID
147 * @iomem: device I/O register space remapped to kernel virtual memory
149 * @subdev: V4L2 subdevice
151 * @format: active V4L2 media bus format for the pad
152 * @event: scene change event
153 * @dmachan: dma channel part of the scenechange stream
154 * @lock: lock to protect active stream count variable
159 struct xscd_device *xscd;
160 struct v4l2_subdev subdev;
161 struct media_pad pads[2];
162 struct v4l2_mbus_framefmt format;
163 struct v4l2_event event;
164 struct xscd_dma_chan dmachan;
166 /* Lock to protect active stream count */
170 static inline struct xscd_chan *to_xscd_chan(struct v4l2_subdev *subdev)
172 return container_of(subdev, struct xscd_chan, subdev);
176 * struct xscd_device - Xilinx Scene Change Detection device structure
178 * @iomem: device I/O register space remapped to kernel virtual memory
179 * @rst_gpio: reset GPIO
180 * @clk: video core clock
182 * @memory_based: Flag to identify memory based mode
183 * @num_streams: Number of streams in the design
184 * @chans: video stream instances
185 * @dma_device: DMA device structure
186 * @channels: DMA channels
187 * @active_streams: Number of active streams
192 struct gpio_desc *rst_gpio;
199 struct xscd_chan *chans[XSCD_MAX_CHANNELS];
201 struct dma_device dma_device;
202 struct xscd_dma_chan *channels[XSCD_MAX_CHANNELS];
207 * Register related operations
209 static inline u32 xscd_read(void __iomem *iomem, u32 addr)
211 return ioread32(iomem + addr);
214 static inline void xscd_write(void __iomem *iomem, u32 addr, u32 value)
216 iowrite32(value, iomem + addr);
219 static inline void xscd_clr(void __iomem *iomem, u32 addr, u32 clr)
221 xscd_write(iomem, addr, xscd_read(iomem, addr) & ~clr);
224 static inline void xscd_set(void __iomem *iomem, u32 addr, u32 set)
226 xscd_write(iomem, addr, xscd_read(iomem, addr) | set);
229 void xscd_dma_start_transfer(struct xscd_dma_chan *chan);
230 void xscd_dma_start(struct xscd_dma_chan *chan);
231 void xscd_dma_chan_enable(struct xscd_dma_chan *chan, int chan_en);
232 void xscd_dma_reset(struct xscd_dma_chan *chan);
233 void xscd_dma_halt(struct xscd_dma_chan *chan);
234 void xscd_dma_irq_handler(struct xscd_device *xscd);
235 int xscd_dma_init(struct xscd_device *xscd);
236 void xscd_dma_cleanup(struct xscd_device *xscd);
238 void xscd_chan_irq_handler(struct xscd_chan *chan);
239 int xscd_chan_init(struct xscd_device *xscd, unsigned int chan_id,
240 struct device_node *node);