2 * uartlite.c: Serial driver for Xilinx uartlite serial controller
4 * Copyright (C) 2006 Peter Korsgaard <jacmet@sunsite.dk>
5 * Copyright (C) 2007 Secret Lab Technologies Ltd.
7 * This file is licensed under the terms of the GNU General Public License
8 * version 2. This program is licensed "as is" without any warranty of any
9 * kind, whether express or implied.
12 #include <linux/platform_device.h>
13 #include <linux/module.h>
14 #include <linux/console.h>
15 #include <linux/serial.h>
16 #include <linux/serial_core.h>
17 #include <linux/tty.h>
18 #include <linux/tty_flip.h>
19 #include <linux/delay.h>
20 #include <linux/interrupt.h>
21 #include <linux/init.h>
24 #include <linux/of_address.h>
25 #include <linux/of_device.h>
26 #include <linux/of_platform.h>
27 #include <linux/clk.h>
28 #include <linux/pm_runtime.h>
30 #define ULITE_NAME "ttyUL"
31 #define ULITE_MAJOR 204
32 #define ULITE_MINOR 187
33 #define ULITE_NR_UARTS CONFIG_SERIAL_UARTLITE_NR_UARTS
35 /* ---------------------------------------------------------------------
36 * Register definitions
38 * For register details see datasheet:
39 * http://www.xilinx.com/support/documentation/ip_documentation/opb_uartlite.pdf
44 #define ULITE_STATUS 0x08
45 #define ULITE_CONTROL 0x0c
47 #define ULITE_REGION 16
49 #define ULITE_STATUS_RXVALID 0x01
50 #define ULITE_STATUS_RXFULL 0x02
51 #define ULITE_STATUS_TXEMPTY 0x04
52 #define ULITE_STATUS_TXFULL 0x08
53 #define ULITE_STATUS_IE 0x10
54 #define ULITE_STATUS_OVERRUN 0x20
55 #define ULITE_STATUS_FRAME 0x40
56 #define ULITE_STATUS_PARITY 0x80
58 #define ULITE_CONTROL_RST_TX 0x01
59 #define ULITE_CONTROL_RST_RX 0x02
60 #define ULITE_CONTROL_IE 0x10
61 #define UART_AUTOSUSPEND_TIMEOUT 3000
63 /* Static pointer to console port */
64 #ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
65 static struct uart_port *console_port;
68 struct uartlite_data {
69 const struct uartlite_reg_ops *reg_ops;
71 struct uart_driver *ulite_uart_driver;
74 struct uartlite_reg_ops {
75 u32 (*in)(void __iomem *addr);
76 void (*out)(u32 val, void __iomem *addr);
79 static u32 uartlite_inbe32(void __iomem *addr)
81 return ioread32be(addr);
84 static void uartlite_outbe32(u32 val, void __iomem *addr)
86 iowrite32be(val, addr);
89 static const struct uartlite_reg_ops uartlite_be = {
90 .in = uartlite_inbe32,
91 .out = uartlite_outbe32,
94 static u32 uartlite_inle32(void __iomem *addr)
96 return ioread32(addr);
99 static void uartlite_outle32(u32 val, void __iomem *addr)
101 iowrite32(val, addr);
104 static const struct uartlite_reg_ops uartlite_le = {
105 .in = uartlite_inle32,
106 .out = uartlite_outle32,
109 static inline u32 uart_in32(u32 offset, struct uart_port *port)
111 struct uartlite_data *pdata = port->private_data;
113 return pdata->reg_ops->in(port->membase + offset);
116 static inline void uart_out32(u32 val, u32 offset, struct uart_port *port)
118 struct uartlite_data *pdata = port->private_data;
120 pdata->reg_ops->out(val, port->membase + offset);
123 static struct uart_port ulite_ports[ULITE_NR_UARTS];
125 /* ---------------------------------------------------------------------
126 * Core UART driver operations
129 static int ulite_receive(struct uart_port *port, int stat)
131 struct tty_port *tport = &port->state->port;
132 unsigned char ch = 0;
133 char flag = TTY_NORMAL;
135 if ((stat & (ULITE_STATUS_RXVALID | ULITE_STATUS_OVERRUN
136 | ULITE_STATUS_FRAME)) == 0)
140 if (stat & ULITE_STATUS_RXVALID) {
142 ch = uart_in32(ULITE_RX, port);
144 if (stat & ULITE_STATUS_PARITY)
145 port->icount.parity++;
148 if (stat & ULITE_STATUS_OVERRUN)
149 port->icount.overrun++;
151 if (stat & ULITE_STATUS_FRAME)
152 port->icount.frame++;
155 /* drop byte with parity error if IGNPAR specificed */
156 if (stat & port->ignore_status_mask & ULITE_STATUS_PARITY)
157 stat &= ~ULITE_STATUS_RXVALID;
159 stat &= port->read_status_mask;
161 if (stat & ULITE_STATUS_PARITY)
165 stat &= ~port->ignore_status_mask;
167 if (stat & ULITE_STATUS_RXVALID)
168 tty_insert_flip_char(tport, ch, flag);
170 if (stat & ULITE_STATUS_FRAME)
171 tty_insert_flip_char(tport, 0, TTY_FRAME);
173 if (stat & ULITE_STATUS_OVERRUN)
174 tty_insert_flip_char(tport, 0, TTY_OVERRUN);
179 static int ulite_transmit(struct uart_port *port, int stat)
181 struct circ_buf *xmit = &port->state->xmit;
183 if (stat & ULITE_STATUS_TXFULL)
187 uart_out32(port->x_char, ULITE_TX, port);
193 if (uart_circ_empty(xmit) || uart_tx_stopped(port))
196 uart_out32(xmit->buf[xmit->tail], ULITE_TX, port);
197 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE-1);
201 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
202 uart_write_wakeup(port);
207 static irqreturn_t ulite_isr(int irq, void *dev_id)
209 struct uart_port *port = dev_id;
210 int stat, busy, n = 0;
214 spin_lock_irqsave(&port->lock, flags);
215 stat = uart_in32(ULITE_STATUS, port);
216 busy = ulite_receive(port, stat);
217 busy |= ulite_transmit(port, stat);
218 spin_unlock_irqrestore(&port->lock, flags);
224 tty_flip_buffer_push(&port->state->port);
231 static unsigned int ulite_tx_empty(struct uart_port *port)
236 spin_lock_irqsave(&port->lock, flags);
237 ret = uart_in32(ULITE_STATUS, port);
238 spin_unlock_irqrestore(&port->lock, flags);
240 return ret & ULITE_STATUS_TXEMPTY ? TIOCSER_TEMT : 0;
243 static unsigned int ulite_get_mctrl(struct uart_port *port)
245 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
248 static void ulite_set_mctrl(struct uart_port *port, unsigned int mctrl)
253 static void ulite_stop_tx(struct uart_port *port)
258 static void ulite_start_tx(struct uart_port *port)
260 ulite_transmit(port, uart_in32(ULITE_STATUS, port));
263 static void ulite_stop_rx(struct uart_port *port)
265 /* don't forward any more data (like !CREAD) */
266 port->ignore_status_mask = ULITE_STATUS_RXVALID | ULITE_STATUS_PARITY
267 | ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;
270 static void ulite_break_ctl(struct uart_port *port, int ctl)
275 static int ulite_startup(struct uart_port *port)
277 struct uartlite_data *pdata = port->private_data;
280 ret = clk_enable(pdata->clk);
282 dev_err(port->dev, "Failed to enable clock\n");
286 ret = request_irq(port->irq, ulite_isr, IRQF_SHARED | IRQF_TRIGGER_RISING,
291 uart_out32(ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX,
292 ULITE_CONTROL, port);
293 uart_out32(ULITE_CONTROL_IE, ULITE_CONTROL, port);
298 static void ulite_shutdown(struct uart_port *port)
300 struct uartlite_data *pdata = port->private_data;
302 uart_out32(0, ULITE_CONTROL, port);
303 uart_in32(ULITE_CONTROL, port); /* dummy */
304 free_irq(port->irq, port);
305 clk_disable(pdata->clk);
308 static void ulite_set_termios(struct uart_port *port, struct ktermios *termios,
309 struct ktermios *old)
314 spin_lock_irqsave(&port->lock, flags);
316 port->read_status_mask = ULITE_STATUS_RXVALID | ULITE_STATUS_OVERRUN
317 | ULITE_STATUS_TXFULL;
319 if (termios->c_iflag & INPCK)
320 port->read_status_mask |=
321 ULITE_STATUS_PARITY | ULITE_STATUS_FRAME;
323 port->ignore_status_mask = 0;
324 if (termios->c_iflag & IGNPAR)
325 port->ignore_status_mask |= ULITE_STATUS_PARITY
326 | ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;
328 /* ignore all characters if CREAD is not set */
329 if ((termios->c_cflag & CREAD) == 0)
330 port->ignore_status_mask |=
331 ULITE_STATUS_RXVALID | ULITE_STATUS_PARITY
332 | ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;
335 baud = uart_get_baud_rate(port, termios, old, 0, 460800);
336 uart_update_timeout(port, termios->c_cflag, baud);
338 spin_unlock_irqrestore(&port->lock, flags);
341 static const char *ulite_type(struct uart_port *port)
343 return port->type == PORT_UARTLITE ? "uartlite" : NULL;
346 static void ulite_release_port(struct uart_port *port)
348 release_mem_region(port->mapbase, ULITE_REGION);
349 iounmap(port->membase);
350 port->membase = NULL;
353 static int ulite_request_port(struct uart_port *port)
355 struct uartlite_data *pdata = port->private_data;
358 pr_debug("ulite console: port=%p; port->mapbase=%llx\n",
359 port, (unsigned long long) port->mapbase);
361 if (!request_mem_region(port->mapbase, ULITE_REGION, "uartlite")) {
362 dev_err(port->dev, "Memory region busy\n");
366 port->membase = ioremap(port->mapbase, ULITE_REGION);
367 if (!port->membase) {
368 dev_err(port->dev, "Unable to map registers\n");
369 release_mem_region(port->mapbase, ULITE_REGION);
373 pdata->reg_ops = &uartlite_be;
374 ret = uart_in32(ULITE_CONTROL, port);
375 uart_out32(ULITE_CONTROL_RST_TX, ULITE_CONTROL, port);
376 ret = uart_in32(ULITE_STATUS, port);
377 /* Endianess detection */
378 if ((ret & ULITE_STATUS_TXEMPTY) != ULITE_STATUS_TXEMPTY)
379 pdata->reg_ops = &uartlite_le;
384 static void ulite_config_port(struct uart_port *port, int flags)
386 if (!ulite_request_port(port))
387 port->type = PORT_UARTLITE;
390 static int ulite_verify_port(struct uart_port *port, struct serial_struct *ser)
392 /* we don't want the core code to modify any port params */
396 static void ulite_pm(struct uart_port *port, unsigned int state,
397 unsigned int oldstate)
400 pm_runtime_get_sync(port->dev);
402 pm_runtime_mark_last_busy(port->dev);
403 pm_runtime_put_autosuspend(port->dev);
407 #ifdef CONFIG_CONSOLE_POLL
408 static int ulite_get_poll_char(struct uart_port *port)
410 if (!(uart_in32(ULITE_STATUS, port) & ULITE_STATUS_RXVALID))
413 return uart_in32(ULITE_RX, port);
416 static void ulite_put_poll_char(struct uart_port *port, unsigned char ch)
418 while (uart_in32(ULITE_STATUS, port) & ULITE_STATUS_TXFULL)
421 /* write char to device */
422 uart_out32(ch, ULITE_TX, port);
426 static const struct uart_ops ulite_ops = {
427 .tx_empty = ulite_tx_empty,
428 .set_mctrl = ulite_set_mctrl,
429 .get_mctrl = ulite_get_mctrl,
430 .stop_tx = ulite_stop_tx,
431 .start_tx = ulite_start_tx,
432 .stop_rx = ulite_stop_rx,
433 .break_ctl = ulite_break_ctl,
434 .startup = ulite_startup,
435 .shutdown = ulite_shutdown,
436 .set_termios = ulite_set_termios,
438 .release_port = ulite_release_port,
439 .request_port = ulite_request_port,
440 .config_port = ulite_config_port,
441 .verify_port = ulite_verify_port,
443 #ifdef CONFIG_CONSOLE_POLL
444 .poll_get_char = ulite_get_poll_char,
445 .poll_put_char = ulite_put_poll_char,
449 /* ---------------------------------------------------------------------
450 * Console driver operations
453 #ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
454 static void ulite_console_wait_tx(struct uart_port *port)
457 unsigned long timeout;
460 * Spin waiting for TX fifo to have space available.
461 * When using the Microblaze Debug Module this can take up to 1s
463 timeout = jiffies + msecs_to_jiffies(1000);
465 val = uart_in32(ULITE_STATUS, port);
466 if ((val & ULITE_STATUS_TXFULL) == 0)
468 if (time_after(jiffies, timeout)) {
470 "timeout waiting for TX buffer empty\n");
477 static void ulite_console_putchar(struct uart_port *port, int ch)
479 ulite_console_wait_tx(port);
480 uart_out32(ch, ULITE_TX, port);
483 static void ulite_console_write(struct console *co, const char *s,
486 struct uart_port *port = console_port;
491 if (oops_in_progress) {
492 locked = spin_trylock_irqsave(&port->lock, flags);
494 spin_lock_irqsave(&port->lock, flags);
496 /* save and disable interrupt */
497 ier = uart_in32(ULITE_STATUS, port) & ULITE_STATUS_IE;
498 uart_out32(0, ULITE_CONTROL, port);
500 uart_console_write(port, s, count, ulite_console_putchar);
502 ulite_console_wait_tx(port);
504 /* restore interrupt state */
506 uart_out32(ULITE_CONTROL_IE, ULITE_CONTROL, port);
509 spin_unlock_irqrestore(&port->lock, flags);
512 static int ulite_console_setup(struct console *co, char *options)
514 struct uart_port *port;
523 /* Has the device been initialized yet? */
524 if (!port->mapbase) {
525 pr_debug("console on ttyUL%i not present\n", co->index);
529 /* not initialized yet? */
530 if (!port->membase) {
531 if (ulite_request_port(port))
536 uart_parse_options(options, &baud, &parity, &bits, &flow);
538 return uart_set_options(port, co, baud, parity, bits, flow);
541 static struct uart_driver ulite_uart_driver;
543 static struct console ulite_console = {
545 .write = ulite_console_write,
546 .device = uart_console_device,
547 .setup = ulite_console_setup,
548 .flags = CON_PRINTBUFFER,
549 .index = -1, /* Specified on the cmdline (e.g. console=ttyUL0 ) */
550 .data = &ulite_uart_driver,
553 static void early_uartlite_putc(struct uart_port *port, int c)
556 * Limit how many times we'll spin waiting for TX FIFO status.
557 * This will prevent lockups if the base address is incorrectly
558 * set, or any other issue on the UARTLITE.
559 * This limit is pretty arbitrary, unless we are at about 10 baud
560 * we'll never timeout on a working UART.
563 unsigned retries = 1000000;
564 /* read status bit - 0x8 offset */
565 while (--retries && (readl(port->membase + 8) & (1 << 3)))
568 /* Only attempt the iowrite if we didn't timeout */
569 /* write to TX_FIFO - 0x4 offset */
571 writel(c & 0xff, port->membase + 4);
574 static void early_uartlite_write(struct console *console,
575 const char *s, unsigned n)
577 struct earlycon_device *device = console->data;
578 uart_console_write(&device->port, s, n, early_uartlite_putc);
581 static int __init early_uartlite_setup(struct earlycon_device *device,
584 if (!device->port.membase)
587 device->con->write = early_uartlite_write;
590 EARLYCON_DECLARE(uartlite, early_uartlite_setup);
591 OF_EARLYCON_DECLARE(uartlite_b, "xlnx,opb-uartlite-1.00.b", early_uartlite_setup);
592 OF_EARLYCON_DECLARE(uartlite_a, "xlnx,xps-uartlite-1.00.a", early_uartlite_setup);
594 #endif /* CONFIG_SERIAL_UARTLITE_CONSOLE */
596 static struct uart_driver ulite_uart_driver = {
597 .owner = THIS_MODULE,
598 .driver_name = "uartlite",
599 .dev_name = ULITE_NAME,
600 .major = ULITE_MAJOR,
601 .minor = ULITE_MINOR,
602 .nr = ULITE_NR_UARTS,
603 #ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
604 .cons = &ulite_console,
608 /* ---------------------------------------------------------------------
609 * Port assignment functions (mapping devices to uart_port structures)
612 /** ulite_assign: register a uartlite device with the driver
614 * @dev: pointer to device structure
615 * @id: requested id number. Pass -1 for automatic port assignment
616 * @base: base address of uartlite registers
617 * @irq: irq number for uartlite
618 * @pdata: private data for uartlite
620 * Returns: 0 on success, <0 otherwise
622 static int ulite_assign(struct device *dev, int id, u32 base, int irq,
623 struct uartlite_data *pdata)
625 struct uart_port *port;
628 /* if id = -1; then scan for a free id and use that */
630 for (id = 0; id < ULITE_NR_UARTS; id++)
631 if (ulite_ports[id].mapbase == 0)
634 if (id < 0 || id >= ULITE_NR_UARTS) {
635 dev_err(dev, "%s%i too large\n", ULITE_NAME, id);
639 if ((ulite_ports[id].mapbase) && (ulite_ports[id].mapbase != base)) {
640 dev_err(dev, "cannot assign to %s%i; it is already in use\n",
645 port = &ulite_ports[id];
647 spin_lock_init(&port->lock);
650 port->iotype = UPIO_MEM;
651 port->iobase = 1; /* mark port in use */
652 port->mapbase = base;
653 port->membase = NULL;
654 port->ops = &ulite_ops;
656 port->flags = UPF_BOOT_AUTOCONF;
658 port->type = PORT_UNKNOWN;
660 port->private_data = pdata;
662 dev_set_drvdata(dev, port);
664 #ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
666 * If console hasn't been found yet try to assign this port
667 * because it is required to be assigned for console setup function.
668 * If register_console() don't assign value, then console_port pointer
671 if (ulite_uart_driver.cons->index == -1)
675 /* Register the port */
676 rc = uart_add_one_port(&ulite_uart_driver, port);
678 dev_err(dev, "uart_add_one_port() failed; err=%i\n", rc);
680 dev_set_drvdata(dev, NULL);
684 #ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
685 /* This is not port which is used for console that's why clean it up */
686 if (ulite_uart_driver.cons->index == -1)
693 /** ulite_release: register a uartlite device with the driver
695 * @dev: pointer to device structure
697 static int ulite_release(struct device *dev)
699 struct uart_port *port = dev_get_drvdata(dev);
700 struct uartlite_data *pdata = port->private_data;
704 rc = uart_remove_one_port(pdata->ulite_uart_driver, port);
705 dev_set_drvdata(dev, NULL);
713 * ulite_suspend - Stop the device.
715 * @dev: handle to the device structure.
718 static int __maybe_unused ulite_suspend(struct device *dev)
720 struct uart_port *port = dev_get_drvdata(dev);
721 struct uartlite_data *pdata = port->private_data;
724 uart_suspend_port(pdata->ulite_uart_driver, port);
730 * ulite_resume - Resume the device.
732 * @dev: handle to the device structure.
733 * Return: 0 on success, errno otherwise.
735 static int __maybe_unused ulite_resume(struct device *dev)
737 struct uart_port *port = dev_get_drvdata(dev);
738 struct uartlite_data *pdata = port->private_data;
741 uart_resume_port(pdata->ulite_uart_driver, port);
746 static int __maybe_unused ulite_runtime_suspend(struct device *dev)
748 struct uart_port *port = dev_get_drvdata(dev);
749 struct uartlite_data *pdata = port->private_data;
751 clk_disable(pdata->clk);
755 static int __maybe_unused ulite_runtime_resume(struct device *dev)
757 struct uart_port *port = dev_get_drvdata(dev);
758 struct uartlite_data *pdata = port->private_data;
760 clk_enable(pdata->clk);
763 /* ---------------------------------------------------------------------
764 * Platform bus binding
767 static const struct dev_pm_ops ulite_pm_ops = {
768 SET_SYSTEM_SLEEP_PM_OPS(ulite_suspend, ulite_resume)
769 SET_RUNTIME_PM_OPS(ulite_runtime_suspend,
770 ulite_runtime_resume, NULL)
773 #if defined(CONFIG_OF)
774 /* Match table for of_platform binding */
775 static const struct of_device_id ulite_of_match[] = {
776 { .compatible = "xlnx,opb-uartlite-1.00.b", },
777 { .compatible = "xlnx,xps-uartlite-1.00.a", },
780 MODULE_DEVICE_TABLE(of, ulite_of_match);
781 #endif /* CONFIG_OF */
783 static int ulite_probe(struct platform_device *pdev)
785 struct resource *res;
786 struct uartlite_data *pdata;
792 prop = of_get_property(pdev->dev.of_node, "port-number", NULL);
794 id = be32_to_cpup(prop);
797 /* Look for a serialN alias */
798 id = of_alias_get_id(pdev->dev.of_node, "serial");
803 if (!ulite_uart_driver.state) {
804 dev_dbg(&pdev->dev, "uartlite: calling uart_register_driver()\n");
805 ret = uart_register_driver(&ulite_uart_driver);
807 dev_err(&pdev->dev, "Failed to register driver\n");
812 pdata = devm_kzalloc(&pdev->dev, sizeof(struct uartlite_data),
817 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
821 irq = platform_get_irq(pdev, 0);
825 pdata->clk = devm_clk_get(&pdev->dev, "s_axi_aclk");
826 if (IS_ERR(pdata->clk)) {
827 if (PTR_ERR(pdata->clk) != -ENOENT)
828 return PTR_ERR(pdata->clk);
831 * Clock framework support is optional, continue on
832 * anyways if we don't find a matching clock.
837 pdata->ulite_uart_driver = &ulite_uart_driver;
838 ret = clk_prepare_enable(pdata->clk);
840 dev_err(&pdev->dev, "Failed to prepare clock\n");
844 pm_runtime_use_autosuspend(&pdev->dev);
845 pm_runtime_set_autosuspend_delay(&pdev->dev, UART_AUTOSUSPEND_TIMEOUT);
846 pm_runtime_set_active(&pdev->dev);
847 pm_runtime_enable(&pdev->dev);
849 ret = ulite_assign(&pdev->dev, id, res->start, irq, pdata);
851 pm_runtime_mark_last_busy(&pdev->dev);
852 pm_runtime_put_autosuspend(&pdev->dev);
857 static int ulite_remove(struct platform_device *pdev)
859 struct uart_port *port = dev_get_drvdata(&pdev->dev);
860 struct uartlite_data *pdata = port->private_data;
863 clk_unprepare(pdata->clk);
864 rc = ulite_release(&pdev->dev);
865 pm_runtime_disable(&pdev->dev);
866 pm_runtime_set_suspended(&pdev->dev);
867 pm_runtime_dont_use_autosuspend(&pdev->dev);
871 /* work with hotplug and coldplug */
872 MODULE_ALIAS("platform:uartlite");
874 static struct platform_driver ulite_platform_driver = {
875 .probe = ulite_probe,
876 .remove = ulite_remove,
879 .of_match_table = of_match_ptr(ulite_of_match),
884 /* ---------------------------------------------------------------------
885 * Module setup/teardown
888 static int __init ulite_init(void)
890 pr_debug("uartlite: calling platform_driver_register()\n");
891 return platform_driver_register(&ulite_platform_driver);
894 static void __exit ulite_exit(void)
896 platform_driver_unregister(&ulite_platform_driver);
897 uart_unregister_driver(&ulite_uart_driver);
900 module_init(ulite_init);
901 module_exit(ulite_exit);
903 MODULE_AUTHOR("Peter Korsgaard <jacmet@sunsite.dk>");
904 MODULE_DESCRIPTION("Xilinx uartlite serial driver");
905 MODULE_LICENSE("GPL");