From: Hyun Kwon Date: Wed, 30 Aug 2017 22:05:44 +0000 (-0700) Subject: drm: xilinx: dp: Enable the training pattern transmission early X-Git-Url: https://rtime.felk.cvut.cz/gitweb/vajnamar/linux-xlnx.git/commitdiff_plain/5e0a3d2513bda07ae712209225d33ebe5b81ea93 drm: xilinx: dp: Enable the training pattern transmission early Per DP v1.2 spec 3.5.1.2.2, the transmission of training pattern needs to be enabled before setting the sink device. This sequence was causing the failure of initial training attempt, thus, enable the pattern in the controller before setting the sink through aux. Signed-off-by: Hyun Kwon Signed-off-by: Michal Simek --- diff --git a/drivers/gpu/drm/xilinx/xilinx_drm_dp.c b/drivers/gpu/drm/xilinx/xilinx_drm_dp.c index 911d64013c75..7eb7515ecafa 100644 --- a/drivers/gpu/drm/xilinx/xilinx_drm_dp.c +++ b/drivers/gpu/drm/xilinx/xilinx_drm_dp.c @@ -1040,15 +1040,14 @@ static int xilinx_drm_dp_link_train_cr(struct xilinx_drm_dp *dp) bool cr_done; int ret; + xilinx_drm_writel(dp->iomem, XILINX_DP_TX_TRAINING_PATTERN_SET, + DP_TRAINING_PATTERN_1); ret = drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET, DP_TRAINING_PATTERN_1 | DP_LINK_SCRAMBLING_DISABLE); if (ret < 0) return ret; - xilinx_drm_writel(dp->iomem, XILINX_DP_TX_TRAINING_PATTERN_SET, - DP_TRAINING_PATTERN_1); - /* 256 loops should be maximum iterations for 4 lanes and 4 values. * So, This loop should exit before 512 iterations */ @@ -1114,14 +1113,12 @@ static int xilinx_drm_dp_link_train_ce(struct xilinx_drm_dp *dp) pat = DP_TRAINING_PATTERN_3; else pat = DP_TRAINING_PATTERN_2; - + xilinx_drm_writel(dp->iomem, XILINX_DP_TX_TRAINING_PATTERN_SET, pat); ret = drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET, pat | DP_LINK_SCRAMBLING_DISABLE); if (ret < 0) return ret; - xilinx_drm_writel(dp->iomem, XILINX_DP_TX_TRAINING_PATTERN_SET, pat); - for (tries = 0; tries < DP_MAX_TRAINING_TRIES; tries++) { ret = xilinx_drm_dp_update_vs_emph(dp); if (ret) @@ -1230,14 +1227,14 @@ static int xilinx_drm_dp_train(struct xilinx_drm_dp *dp) if (ret) return ret; - xilinx_drm_writel(dp->iomem, XILINX_DP_TX_TRAINING_PATTERN_SET, - DP_TRAINING_PATTERN_DISABLE); ret = drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET, DP_TRAINING_PATTERN_DISABLE); if (ret < 0) { DRM_ERROR("failed to disable training pattern\n"); return ret; } + xilinx_drm_writel(dp->iomem, XILINX_DP_TX_TRAINING_PATTERN_SET, + DP_TRAINING_PATTERN_DISABLE); xilinx_drm_writel(dp->iomem, XILINX_DP_TX_SCRAMBLING_DISABLE, 0);