drivers: dwc3: Correct the logic for GFLADJ adjustment

drivers: dwc3: Correct the logic for GFLADJ adjustment

This patch corrects the logic used for adjusting GFLADJ register

Currently during phy initialization, USB core reset is happening.
Because of reset USB GFLADJ register is getting restored to default
values. This patch updates the GFADJ[21:8] & GFLADJ[5:0] bits if
they are not equal to the requested value from dts.
This patch also removes the WARN_ONCE messages that occur if the
previous register value matches to the current value requested.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>