dma: xilinx: Bug fix to ensure GPIO is reset between DMA operations

dma: xilinx: Bug fix to ensure GPIO is reset between DMA operations

Some registers within the Video Framebuffer driver, such as the
video format register, require a reset of the IP before they can
be altered.  Because there is no software accessible reset register,
an external GPIO is used.  This patch fixes a runtime issue wherein
clients wish to reprogram the IP for a new memory between DMA operations.
Without this fix, the Video Framebuffer Write IP may halt when a client
requests a new DMA operation using a different memory format for
writes to host memory.  In some cases, Framebuffer Read operations
will need to be reset when the downstream video pipeline is being
reset.

Signed-off-by: Jeffrey Mouroux <jmouroux@xilinx.com>
Reviewed-by: Hyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>