rtime.felk.cvut.cz Git - sojka/nv-tegra/linux-3.10.git/log

media: tegra: nvavp: Add tracing support for nvavp

Add run-time tracing support for NVAVP driver

Bug 200018378

Change-Id: I1e786e52295d387a4d60991aac125aaa097e5950
Signed-off-by: Somasundaram S <somasundaram@nvidia.com>
Reviewed-on: http://git-master/r/494479
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>

zram: remove zram_sysfs file (v2)

Move zram sysfs code to zram drv and remove zram_sysfs.c
file. This gives ability to make static a number of previously
exported zram functions, used from zram sysfs, e.g. internal zram
zram_meta_alloc/free(). We also can drop zram_drv wrapper
functions, used from zram sysfs:
e.g. zram_reset_device()/__zram_reset_device() pair.

v2: as suggested by Greg K-H, move MODULE description to the
bottom of the file.

Bug 200034063

Signed-off-by: Sergey Senozhatsky <sergey.senozhatsky@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit 9b3bb7abcdf2df0f1b2657e6cbc9d06bc2b3b36f)
Change-Id: I4b286dbb4599a57478275972284be8da0dbe8674
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/494447
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

zram: use atomic64_xxx() to replace zram_stat64_xxx()

Use atomic64_xxx() to replace open-coded zram_stat64_xxx().
Some architectures have native support of atomic64 operations,
so we can get rid of the spin_lock() in zram_stat64_xxx().
On the other hand, for platforms use generic version of atomic64
implement, it may cause an extra save/restore of the interrupt
flag. So it's a tradeoff.

Bug 200034063

Signed-off-by: Jiang Liu <jiang.liu@huawei.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit da5cc7d338f97886ebf35be92995460289379b73)
Change-Id: I058fd221bbdf37439f7e8fcd128388de5dc61b27
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/494446
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

zram: optimize memory operations with clear_page()/copy_page()

Some architectures provides architecture-specific, optimized version of
clear_page()/copy_page(), which may have better performance than
memset()/memcpy(). So use clear_page()/copy_page() to optimize zram
performance if possible.

Bug 200034063

Signed-off-by: Jiang Liu <jiang.liu@huawei.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit 42e99bd975fdd24d2bf1a24ebb8b0b42bab8ba65)
Change-Id: I2a5f68d13c4b139614e27c969f8a881de952e81a
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/494445
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

zram: kill unused zram_get_num_devices()

Now there's no caller of zram_get_num_devices(), so kill it.
And change zram_devices to static because it's only used in zram_drv.c.

Bug 200034063

Signed-off-by: Jiang Liu <jiang.liu@huawei.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit 0f0e3ba346c8d8d2cb409b157df79805931a1c2c)
Change-Id: I5408e0786e5eb6cc3027c47c6c30b7f9acf0256f
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/494444
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

zram: simplify and optimize dev_to_zram()

Simplify and optimize dev_to_zram() without walking the zram_devices
array.

Bug 200034063

Signed-off-by: Jiang Liu <jiang.liu@huawei.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit 80de574dca050b734d8413a98a983fba3d06240b)
Change-Id: I4956114fd8e7ae5d5d7d627672c6aad4af93ca06
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/494443
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

drivers: pci: host: tegra: add debugfs

Add debugfs framework to support following
-> dynamic link width change(x1, x2, x4, x8, x16)
-> dynamic link speed change(Gen1/Gen2)
-> check ASPM L0s/L1 entry count when enabled
-> listing all the devices along with link status

Bug 200026858

Change-Id: I7baed9cfcfe525c20d98f930d908b55205c27d64
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Reviewed-on: http://git-master/r/452852
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>

Revert "zram: don't grab mutex in zram_slot_free_noity"

This reverts commit 7e9bd604d145d743bc1e62f23656b851dad368c1.

Reverting this as it causes conflicts when synced to latest upstream
zram code.

This patch will be properly applied after all dependent patches are picked.

Bug 200034063

Change-Id: If85d5e49a38aeb3f18a19c638475777e3a83ff7a
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/494442
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

mmc: incorrect assignment of MMC_PM_KEEP_POWER

Bug 1360277
Bug 1448682

Change-Id: I7fa170e6e96d94d9e169ebc2c7fa430fe5983e74
Signed-off-by: Seshagir.H <sholi@nvidia.com>
Reviewed-on: http://git-master/r/456662
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-by: Joshua Cha <joshuac@nvidia.com>
Reviewed-by: Sumeet Gupta <sumeetg@nvidia.com>
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-by: Sandeep Trasi <strasi@nvidia.com>

mmc: tegra: sleep/awake support during lp0 based on plat-data.

On automotive board configurations, PMU shuts off both the powers
going to the eMMC device (VCC and VCCQ). Due to this,
response of CMD5(Awake) has timeout error during resume,
if the device is put in SLEEP.

This change makes the decision to sleep the card or shutdown
the card, based on input from platform-data.

Bug 1360277
Bug 1448682

Change-Id: I45fe6e4bed69948696f06763f7d1bc62dd7f5682
Signed-off-by: Seshagir.H <sholi@nvidia.com>
Reviewed-on: http://git-master/r/456661
Reviewed-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-by: Sandeep Trasi <strasi@nvidia.com>

arm: tegra: 1859: Disable eMMC sleep functionality

On some board configurations,PMU shuts off both the powers
going to the eMMC device (VCC and VCCQ). Due to this, response
of CMD5(Awake) has timeout error during resume, if the device
is put in SLEEP.

This change makes the decision to sleep the card or shutdown
the card, based on input from sdhci instance's DT data.

Bug 1360277
Bug 1448682

Change-Id: Ie83b9e235e29fbe24bccce5ce8e32555892b258d
Signed-off-by: Seshagir.H <sholi@nvidia.com>
Reviewed-on: http://git-master/r/456663
Reviewed-by: Sandeep Trasi <strasi@nvidia.com>
Tested-by: Sandeep Trasi <strasi@nvidia.com>

gpu: nvgpu: get VM reference for TSG

We store a reference to common address space of channels
in struct tsg_gk20a without increasing the refcount

This could result in freeing the address space even when
some channel in TSG needs it or when we need to free
common gr_ctx

Fix this by getting ref using gk20a_vm_get() when we store
the VM reference. We drop this reference with
gk20a_vm_put() when closing the TSG

Bug 1470692

Change-Id: Ifc1f29d32cd721810bfbb5a4db96095770318c17
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/495668
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>

gpu: nvgpu: add refcounting for TSG

Add refcounting for TSGs and manage the refcounts as below :
- initialize ref when TSG is opened
- get ref when channel is bound to TSG
- drop the ref when channel is unbound (i.e. during channel close)
- drop the ref when TSG is closed
- when refcount drops to zero, we free the TSG

This refcounting makes it possible to close channels or TSG
in any order

Bug 1470692

Change-Id: Ia4b39164a4582c8169da62a91b9131094c67f5f8
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/495667
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

fbcon: Converting benign message to debug print

Making message "Display is GTF capable" as a debug print.

Bug 1541801

Change-Id: Ic926057e2ac4f6fc0b85488f642c5cc0c74bda2b
Signed-off-by: Pankaj Dabade <pdabade@nvidia.com>
Reviewed-on: http://git-master/r/457056
(cherry picked from commit c47b0a3654c13641b007770d9ba86ce2ee9e9225)
Reviewed-on: http://git-master/r/482402
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>

asoc: tegra-alt: es755: enable ope

Bug 1549576

Change-Id: I14cdaed09906fdc6b91c30e9a63e4a8b967be480
Signed-off-by: Viraj Karandikar <vkarandikar@nvidia.com>
Reviewed-on: http://git-master/r/495594
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>

video: tegra: dc: fix nvsd smooth_k stop condition

The smooth_k routine can get into a situation where
it runs continuously, even after pixel gain phase-in
stopped. This results in unnecessary calls to the
backlight driver.
Fix the stop condition for this routine.

Bug 1534724

Signed-off-by: Daniel Solomon <daniels@nvidia.com>
Change-Id: I4ce29e51a323966b893f5096639500e2115037f5
Reviewed-on: http://git-master/r/486689
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

Merge remote-tracking branch 'origin/dev/seema/dev-t210-bringup/v8.1_kernel' into HEAD

Change-Id: I38d575f9842c1025cb86fb3124a093a810f3c166
Signed-off-by: Seema Khowala <seemaj@nvidia.com>

ARM64: tegra:enable extcon gpio otg config

Enable extcon gpio otg config to add GPIO/IIO channel
based OTG detection support.

Change-Id: I4b0c80d8df8227be65d79052cce01a1dcec234e9
Signed-off-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
Reviewed-on: http://git-master/r/495619
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>

extcon gpio-otg: retry when get iio channel failed

Initialize drive with subsys_initcall_sync and add support
to retry when get iio chanell failed from workqueue.

Change-Id: I6cda2557302c857de855736a84474907a8ca28c1
Signed-off-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/495631

arm64: tegra: e2174: fix max77621 dt node

1. max77621 will be enabled in e2190 device tree and
the max77621 dt node name should match with e2190 dts.
2. The minimal voltage mand maximal voltage of max77621 is
606250uV and 1400000uV.

Change-Id: I166fe2f8dd70466bbdcce99d5cadc1f3b593b95b
Signed-off-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-on: http://git-master/r/495453
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>

arm64: tegra: add memory node for e2190

Change-Id: I2b25ae7db7ca97975d7828ccae30e7f9782b04f6
Signed-off-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-on: http://git-master/r/495450
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>

arm64: tegra: e2190: fix voltage alignment for cpu dvfs

E2190 use max77621 to supply vdd_cpu. The offset voltage
and step voltage for max77621 is 606250uV and 6250uV.

Change-Id: I22fe291b381dfd04a6c98b787b0e72389ea7d573
Signed-off-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-on: http://git-master/r/495452
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

arm64: tegra: e2190: correct the polarity of pmc

Change-Id: I15ff85272b47081eca0badc19d21f3cc74253ebb
Signed-off-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-on: http://git-master/r/495456
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>

arm64: tegra: e2190: correct panel reset gpio

The panel reset gpio is PV2 not PH3 on e2190.

Change-Id: Ic0cc6ba42ecadaa11d9d70f4a2a3eb22a0a970d5
Signed-off-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-on: http://git-master/r/495455
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>

arm64: tegra: e2190: add pmic thermal zone

Change-Id: Ifd2b5b9561a8a1bc1053e360a9fde9bdd2f8a650
Signed-off-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-on: http://git-master/r/495460
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>

arm64: tegra: e2174: configure the interrupt for max77621

Change-Id: I46b1144a22d9b2de33d9f31ac19b22aee9f4c2b2
Signed-off-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-on: http://git-master/r/495459
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>

regulators: max77621: set irq to be sharable

System may have more than one pmic and the interrupt
from them may be routed to the same place. Then the irq
should be set to be sharable to make sure irq will be
registered successfully.

Change-Id: I8f326387e20bb23c149820865890a194837f9774
Signed-off-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-on: http://git-master/r/495458
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>

mfd: max77620: set irq to be sharable

System may have more than one pmic and the interrupt
from them may be routed to the same place. Then the irq
should be set to be sharable to make sure irq will be
registered successfully.

Change-Id: Idd7bdf4d4e0870eda7e8e2e86b49e94c572d3313
Signed-off-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-on: http://git-master/r/495457
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

regulator: max8973: Fix the driver probe routine

Add check for the return error when obtaining the gpio when
parsing DT node whether GPIOs are available or not.
If gpio_get() return EPROBE_DEFER then defer the probe.

Change-Id: Iaf779611e92140ee6a1c301eb31076aa49ef1c26
Signed-off-by: Kerwin Wan <kerwinw@nvidia.com>
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/495454

regulator: max8973: enable EN bit during dcdc initialization

The EN bit on VOUT regsiters is ANDed with external EN pin on MAX77621
and ORed with MAX8973.
Implement the same for external control.

Change-Id: I1ed4818cc34fe43f9726e280669fa51cc042d9a6
Signed-off-by: Kerwin Wan <kerwinw@nvidia.com>
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/495451

arm64: tegra: dts: enable backlight for loki-e

- enable backlight for loki-e
- removed ERS sensor module.

Bug 1531073
Bug 1546909

Change-Id: I4f10e7620528e7eaa4137468d39e1084a723cee8
Signed-off-by: Daniel Fu <danifu@nvidia.com>
Reviewed-on: http://git-master/r/487981
Reviewed-by: Raymond Poudrier <rapoudrier@nvidia.com>
Tested-by: Raymond Poudrier <rapoudrier@nvidia.com>

Revert "TMP: arm64: tegra: dts: fix panel regulator issues"

This reverts commit 12a506343caec3da1de06c523a222f2bae22b5d8.

Bug 1531073
Bug 1546909

Change-Id: I4f4c2eaed167a650ba5507c50456a57062ec6424
Signed-off-by: Daniel Fu <danifu@nvidia.com>
Reviewed-on: http://git-master/r/487980
Reviewed-by: Raymond Poudrier <rapoudrier@nvidia.com>
Tested-by: Raymond Poudrier <rapoudrier@nvidia.com>

spi-tegra114: allocate controller-data locally

Allocate controller-data locally to spi master driver
instead of spi client driver to avoid kernel warnings.

Bug 1549536

Change-Id: Ib8feef3ce1bf99063d18e24d6c842fa5a123e45f
Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com>
Reviewed-on: http://git-master/r/495125
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

arm64: t210: Enable FM+ mode for PWR I2C

Enable FM+ mode for PWR I2C on E2220/E2190

Bug 200034018

Change-Id: I8424373da0e877146df86aae8a0603d86baea816
Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com>
Reviewed-on: http://git-master/r/495199
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

i2c: tegra: define chip_data structure for T210

define seperate tegra210_i2c_chipdata structure
for T210 as clk_divisor_fast_plus_mode value has
changed.

Bug 200034018

Change-Id: I88634d7f0f1e8921f16720c2cdc2210c35a52ee8
Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com>
Reviewed-on: http://git-master/r/495196
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

video: tegra: host: tsec: Device specific carveout

TSEC carveout information was specified in global variables and was
therefore shared between TSECA and TSECB. This patch makes the
carveout device specific.

Change-Id: I4f9e611abf954c0870053a2700776de91af6c5c5
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/493960

arm64: t210: loki: add gpio keys support

add gpio keys support for Loki

Change-Id: Id1dc4b12f822963068844d5c980e987c0f1fa6cb
Signed-off-by: Louis Li <louli@nvidia.com>
Reviewed-on: http://git-master/r/488944
Reviewed-by: Raymond Poudrier <rapoudrier@nvidia.com>
Tested-by: Raymond Poudrier <rapoudrier@nvidia.com>

arm64: tegra: dts: add supply node for avdd_dsi_csi

- add vin-supply node for max77620-gpio7

Bug 1453796
Bug 1459795

Change-Id: Iecc6c4c71b1f6ec27d1fd7d4f8b8834fc4095a3a
Signed-off-by: Siddalinga KM <sikm@nvidia.com>
Reviewed-on: http://git-master/r/488165
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>

ARM64: config: Enable pwm_fan and fan_therm_est

Change-Id: Ie169cbe421e4975ab991ab686109d72e6fb5f24f
Signed-off-by: Anshul Jain <anshulj@nvidia.com>
(cherry picked from commit d3bd2908c9e026d21368ddd40f7fc859ae3e0c23)
Reviewed-on: http://git-master/r/487481
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
Tested-by: Thomas Cherry <tcherry@nvidia.com>

ARM64: config: tegra21: Enable USB audio

Enable USB audio config

Bug 200032914

Change-Id: Ie6dd6f748b58ecfa227eab23fb018afddbece418
Signed-off-by: Rahul Mittal <rmittal@nvidia.com>
Reviewed-on: http://git-master/r/494954
Reviewed-by: Dara Ramesh <dramesh@nvidia.com>
Tested-by: Dara Ramesh <dramesh@nvidia.com>

ARM64: tegra: dvfs: Report DFLL bypass only on PWM

Confirmed tegra_dvfs_is_dfll_bypass() query provided CPU rail is
connected to PWM regulator, and DFLL bypass driver is installed (was
returning "true" if just driver is present, without checking the
type of connected regulator).

Change-Id: I28dcc0c27547666cae638bbf10af72b00756a5b4
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/494943
Reviewed-by: Bo Yan <byan@nvidia.com>
Tested-by: Bo Yan <byan@nvidia.com>

ARM: tegra: enabel INA devices for T210 config

Enable INA226/INA230 and INA3221 devices for T210 android
platforms.

Change-Id: I9f771e4c9c7c99fd5852af0ca44e46eb5750a754
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/495105
Reviewed-by: Automatic_Commit_Validation_User

staging: iio: meter: ina3221: add support for forced continuous mode

Add support of selecting the mode of device as forced continuous
mode from DT.

Change-Id: Ie7962c5ccfaffc3348f74d80b45072bb3dc1c3dc
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/495104

usb: gadget: xudc: fix EP_CX_CERR Shift

EP_CX_CERR_SHIFT was wrong. Fix it

Change-Id: Id2d9607e19aaa814b036b3a6929f87b305d5f1ad
Signed-off-by: Hui Fu <hfu@nvidia.com>
Reviewed-on: http://git-master/r/491568
Reviewed-on: http://git-master/r/491570
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
Tested-by: Thomas Cherry <tcherry@nvidia.com>

arm: tegra: xusb_padctl: fix RPD_CTRL programming

RDP_CTRL should be programmed with USB_CALIB_EXT[4:0].

Change-Id: I9d5a13fe4a84f26fe2bfe14c0d4c78d50e75399a
Signed-off-by: JC Kuo <jckuo@nvidia.com>
Reviewed-on: http://git-master/r/482670
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
Tested-by: Thomas Cherry <tcherry@nvidia.com>

extcon: gpio-otg: Implement otg cable detection based on id and vbus

Implement the OTG cable detection based on id and vbus detection.
ID will detected with GPIO and VBUS will detected with GPIO interrupt
and VBUS value read through iio channel.

Change-Id: If59807e1f65de5a1b80957aa1adda5a641d98aa8
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/495019

gpu: nvgpu: Fixes in dupe free

gr_gk20a.c : railgating path the crash was seen
with multiple frees happening
acr_gm20b.c : failure path, kernel panic was seen,
with multiple frees

Change-Id: Ifc5e78c0ee74799c7f78e6030c02d1a27d545a1e
Signed-off-by: Supriya <ssharatkumar@nvidia.com>
Reviewed-on: http://git-master/r/494161
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>

gpu: nvgpu: gm20b: Support for falctrace

Adding support for falc_trace for ACR

Change-Id: Iad638b0de72ff122f43f2250dce6a37adab4cecb
Signed-off-by: Supriya <ssharatkumar@nvidia.com>
Reviewed-on: http://git-master/r/494162
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>

gpu: nvgpu: gm20b: Regenerate clock gating lists

Regenerate clock gating lists. Add new blocks, and takes them into
use. Also moves some clock gating settings to be applied at the
earliest possible moment right after reset.

Change-Id: I21888186c200f7a477c63bd3332e8ed578f63741
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/457698

Revert "arm64: optionally set CP15BEN in SCTLR"

This reverts commit 0cb9ec1461b1f0028effbf785be2decc6d5c139b.

Conflicts:
arch/arm64/mm/proc.S

Change-Id: Idcc4ae73c581f09164ddebb5fed6256052b8bbde
Signed-off-by: Rich Wiley <rwiley@nvidia.com>
Reviewed-on: http://git-master/r/491531
Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com>

Revert "arm64: make SCTLR compat config depend on CONFIG_ARMV7_COMPAT"

This reverts commit dd4acc831e8e014353e4ebf0cafc7e420b066fc6.

Change-Id: I70abed90c38a866d47c2919895651eaccc4bd144
Signed-off-by: Rich Wiley <rwiley@nvidia.com>
Reviewed-on: http://git-master/r/491530
Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com>

arm64: enable deprecated armv7 instructions

This will produce one warning per process when
a deprecated instruction is used. This initial
patch covers:

- CP15 barrier instructions
- set endianness (SETEND) instructions

Change-Id: I2b5a6b5fe32cedf1d1eb7757eabd49b2ada4eb72
Signed-off-by: Rich Wiley <rwiley@nvidia.com>
Reviewed-on: http://git-master/r/436382
Reviewed-by: Bo Yan <byan@nvidia.com>
Reviewed-by: Adeel Raza <araza@nvidia.com>

media: tegra_v4l2_camera: set clock rate for pll_d

Test pattern generator in VI needs PLL_D running at certain clock
rate, then CSI clock is a child of PLL_D can get the right clock
for operation.

If DC disable DSI and set PLL_D as a very low frequency and VI driver
forgets to set PLL_D rate back, test pattern generator won't work.

This patch will set PLL_D as 927M when we do test pattern generator
testing.

Bug 1515755

Change-Id: I8fd27d193a436e1057ce2bce8f8153630dc5cdce
Signed-off-by: Bryan Wu <pengw@nvidia.com>
Reviewed-on: http://git-master/r/489043
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Jihoon Bang <jbang@nvidia.com>
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>

gpu: nvgpu: remove config GK20A_PHYS_PAGE_TABLES

remove config GK20A_PHYS_PAGE_TABLES since all code
dependent on this config is now moved to runtime
selection

Change-Id: I27d2722a9ad91cf4e0537a30943675c9132d6924
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/494499
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

asoc: tegra: sync regcache across suspend-resume

- I2S registers and regcahe lose sync across suspend-resume
- Mark regcache dirty in suspend
- Sync regcache with i2s registers in resume

Bug 200008638

Change-Id: I4b603047f48fa771bd84a5481039760bf433cf35
Signed-off-by: vmali <vmali@nvidia.com>
Reviewed-on: http://git-master/r/453473
(cherry picked from commit 105a1357c52b0aaf3cbc3c1a97ab14bea4c71916)
Reviewed-on: http://git-master/r/454917
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>

clocksource: tegra: Add userspace alarm control

Add code to control rtc alarms from userspace.

bug 1504543

Change-Id: I6e218d4d4fd6263f0e896e1827bad5385e9626fb
Signed-off-by: Juha-Matti Tilli <jtilli@nvidia.com>
Reviewed-on: http://git-master/r/494217
(cherry picked from commit 3fe618db3e535f9149318a35d5a370bf6cade946)
Reviewed-on: http://git-master/r/454370
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

Merge "Merge remote-tracking branch 'remotes/origin/dev/dnibade/dev-t210-bringup-staging' into dev-kernel-3.10" into dev-kernel-3.10

mmc: core: Fix null pointer dereference due to illegal mmc request

Fix a race condition that can lead to null pointer dereference
while the MMC transfers are going on.

1) mmc_request_done() -> mmc_wait_for_data_done ->
step1: update is_done_rcv
step2: wake_up sleeping thread (mmcqd) waiting for is_done_rcv

2) mmcqd -> mmc_wait_for_data_req_done
step4: wait for is_done_rcv or is_new_req
step5: is_new_req set from block layer context and mmcqd
       is woken up
step6: let's say step1 is done, so complete the current request
step7: fetch new request and issue to host layer
step8: fetch one more request and wait for previous request to
       complete

In the above execution contexts, if step4-step8 happens between step1 and
step2 a null pointer dereference is observed -

[   29.483302] Unable to handle kernel NULL pointer dereference
at virtual address 00000488
[   29.490366] pgd = c0004000
[   29.493054] [00000488] *pgd=00000000
[   29.518937] PC is at do_raw_spin_lock+0x8/0x13c
[   29.523445] LR is at _raw_spin_lock_irqsave+0x20/0x28
[   30.108789] [<c0339cd4>] (do_raw_spin_lock+0x8/0x13c) from
[   30.118418] [<c095d178>] (_raw_spin_lock_irqsave+0x20/0x28) from
[   30.127445] [<c0142ef4>] (__wake_up+0x20/0x50) from
[   30.136124] [<c0663f70>] (mmc_request_done+0x30c/0x368) from
[   30.145932] [<c067bd98>] (sdhci_tasklet_finish+0x130/0x13c) from

Bug 1547713
Bug 1537934

Change-Id: I9a21431b5fd9bb9bbcb5c18a9895096fe845e64b
Signed-off-by: Sujit Reddy Thumma <sthumma@codeaurora.org>
(cherry picked from commit 65cb1e509951e53ee268cff29647850c6e52a8a1)
Signed-off-by: Steve Kuo <stevek@nvidia.com>
Reviewed-on: http://git-master/r/493953
GVS: Gerrit_Virtual_Submit
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

net:wireless:bcmdhd: set rpt_hitxrate

Set the rpt_hitxrate to 1 so that link speed updated by WLC_GET_RATE
is the maximum transmit rate
rpt_hitxrate 0 : Here the rate reported is the most used rate in the
link.
rpt_hitxrate 1 : Here the rate reported is the highest used rate in the
link.
Otherwise linkspeed updated in the GUI is 802.11 NULL frame data rate
which is 24 Mbps.

Bug 200027022

Change-Id: I0c69b635d0b68c06f38297f39070cc5da04e478b
(cherry picked from commit 8c4b862fb7426243573de9043842f59d2fc5d36c)
Signed-off-by: Raghu <kraghavender@nvidia.com>
Reviewed-on: http://git-master/r/494634
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

arch: arm: 1859: update bcmdhd DT node as per new driver

- update compatible property name

Bug 200022910

Change-Id: I6646f2e293a48a608ab22f4216d13f65a5619eee
Signed-off-by: Seshagir.H <sholi@nvidia.com>
Reviewed-on: http://git-master/r/494812
GVS: Gerrit_Virtual_Submit
Reviewed-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>
Reviewed-by: Sumeet Gupta <sumeetg@nvidia.com>
Reviewed-by: Sandeep Trasi <strasi@nvidia.com>

ARM: tegra12: Enable CONFIG_TEGRA_CLOCK_DEBUG_FUNC

This allows GPU rate to be changed from sysfs.

Bug 1450347

Change-Id: I600f37616e7beabea2f273c9c06e455b6df4a0fb
Signed-off-by: Ashwin Joshi <asjoshi@nvidia.com>
Reviewed-on: http://git-master/r/488804
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sandeep Trasi <strasi@nvidia.com>

ARM: tegra12: p2360: Enable CONFIG_TEGRA_CLOCK_DEBUG_FUNC

This allows GPU rate to be changed from sysfs.

Bug 1450347

Change-Id: I042f845cd0367dacc25dc527687eb14143803355
Signed-off-by: Ashwin Joshi <asjoshi@nvidia.com>
Reviewed-on: http://git-master/r/494475
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vipin Kumar <vipink@nvidia.com>
Tested-by: Vipin Kumar <vipink@nvidia.com>
Reviewed-by: Sandeep Trasi <strasi@nvidia.com>

Merge remote-tracking branch 'remotes/origin/dev/dnibade/dev-t210-bringup-staging' into dev-kernel-3.10

Merge tag "t210-bringup-L-2014.09.02-v8.0" from dev-t210-bringup
to dev-kernel-3.10

Change-Id: I1465088c8faf3fcba784355b43bb28462bba0bf4
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>

Revert "media: platform: tegra: Regulator name for OV7695"

This reverts commit 64ea4b8485965e5144caacad2bec77c3cb9f9730.

This commit might have caused regression of missing camera app
Hence reverting for now.

Bug 1549912

Change-Id: I7cf90e1e0c508905fe997dec386e74a7067717ef
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/495014
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

arm64: tegra: t210: enable cdev for audience

- enable cdev for audience.
- enable spi streaming.

bug 1549942

Change-Id: I769a5f40b436e6c4473b88056de31c66062d74ae
Signed-off-by: Dara Ramesh <dramesh@nvidia.com>
Reviewed-on: http://git-master/r/494825
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
Reviewed-by: Viraj Karandikar <vkarandikar@nvidia.com>

asoc: codec: es755: update audience driver.

- updated audience driver with latest drop.
- updated SPI firmware download speed to 9.6 MHz.
- changes are addded to support streaming.

bug 1549942

Change-Id: Iec72a6993b105b29ceca6c2acc412fa9bc64bf53
Signed-off-by: Dara Ramesh <dramesh@nvidia.com>
Reviewed-on: http://git-master/r/494185
Reviewed-by: Viraj Karandikar <vkarandikar@nvidia.com>
Tested-by: Viraj Karandikar <vkarandikar@nvidia.com>

gpu: nvgpu: Increase GM20b debug monitor cycles

Change-Id: I913b6879e0d1ac89b740c1d088d639cc9b13b9b4
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/494200
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sivaram Nair <sivaramn@nvidia.com>

arm64: t210: dts: change headset gpio

- INTR_EVENT PIN on codec is connected
to GPIO_PE6.

bug 1548129

Change-Id: I7e0bb29a0a1d16c973ddc16f253d015bcd41ee62
Signed-off-by: Dara Ramesh <dramesh@nvidia.com>
Reviewed-on: http://git-master/r/494911
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Viraj Karandikar <vkarandikar@nvidia.com>
Tested-by: Viraj Karandikar <vkarandikar@nvidia.com>

tegra: thermal: add support for Loki and foster

This change includes nct72 for loki and foster.

Change-Id: Id23e56a1343d4c9f342f2a21fcf9a7cabb11b364
Signed-off-by: Anshul Jain <anshulj@nvidia.com>
(cherry picked from commit a8dc63bbd79477ca8cbc9905310b85c2cd35d108)
Reviewed-on: http://git-master/r/487432
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
Tested-by: Thomas Cherry <tcherry@nvidia.com>

tegra: thermal: nct thermal sensor for Loki-E

Add a consumer for 1v8 regulator as 0-004c

Change-Id: I09a46f6eed170f804f64dd5d5ed6164b7faffa68
Signed-off-by: Anshul Jain <anshulj@nvidia.com>
(cherry picked from commit 8cfdc379f607e102cbb47623d1e1ec7aa6bb83b1)
Reviewed-on: http://git-master/r/487431
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

clocksource: tegra: Add userspace alarm control

Add code to control rtc alarms from userspace.

Change-Id: I6e218d4d4fd6263f0e896e1827bad5385e9626fb
Signed-off-by: Juha-Matti Tilli <jtilli@nvidia.com>
Reviewed-on: http://git-master/r/494217
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Tested-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-by: Sivaram Nair <sivaramn@nvidia.com>

video: tegra: dc: fixes for CDE

Use clockgate overrides on T210-A01.
Clear out CDE settings for any flip not using CDE.

Change-Id: I82da4a9d5ecdfeccb4a49cab4dab467ca894958c
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/487884
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jussi Rasanen <jrasanen@nvidia.com>
Tested-by: Jussi Rasanen <jrasanen@nvidia.com>

arm64: t210: remove suspend info dependency

We do not use ops in suspend info for T210.

Change-Id: I22bde9a49377a43d5ae900a8d2f471c8db947bdc
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-on: http://git-master/r/488839
Reviewed-by: Bo Yan <byan@nvidia.com>
Tested-by: Bo Yan <byan@nvidia.com>

arm64: t210: set cpu power timers to 0

In T210 we are not using CPU_PWR_REQ signal to
turn on/off CRAIL. Instead it is done from BPMP
and BPMP adds required delays after and before
CRAIL on/off.

Change-Id: I6ea66e6264b42aea392d4fba5f2d15a3b40f2daa
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-on: http://git-master/r/488837
Reviewed-by: Bo Yan <byan@nvidia.com>
Tested-by: Bo Yan <byan@nvidia.com>

arm64: t210: record active cluster in SC7 state

Write current cluster information in SCRATCH4 which
will be used after exit to decide which cluster to
wakeup.

Change-Id: I890b19e6bdb6d6828d5fea872791ae084c7c33e5
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-on: http://git-master/r/488836
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bo Yan <byan@nvidia.com>

arm64: tegra: add entry function for sc7 from suspend

Change-Id: I9c963e686addb07a42f48afd698637b4d54de3a5
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-on: http://git-master/r/488835
Reviewed-by: Bo Yan <byan@nvidia.com>

cpuidle: t210: move idle state defines to common

Change-Id: Ie282e248ff1c9129b4f3788036445e45821c3243
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-on: http://git-master/r/488834
Reviewed-by: Bo Yan <byan@nvidia.com>
Tested-by: Bo Yan <byan@nvidia.com>

video: tegra: hdmi: Fix hotplug

- Reduce debounce delay
- update flags
- schedule hotplug work in detect ops

Change-Id: I68da66fc36f1be5fd2bdecac62c6c906c9a42558
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-on: http://git-master/r/494331
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

drivers: usb: host/dev: prod settings for USB3

Below UPHY lane settings is needed for T210
XUSB_PADCTL_UPHY_USB3_PADx_ECTL_2_0 RX_CTLE 0xFB
XUSB_PADCTL_UPHY_USB3_PADx_ECTL_3_0 RX_DFE 0xC0077F1F
XUSB_PADCTL_UPHY_USB3_PADx_ECTL_4_0 RX_CDR_CTRL of 0x1C7.

Change-Id: I1713e4edd663a1395801de38e7d62cd1401580f3
Signed-off-by: Hui Fu <hfu@nvidia.com>
Reviewed-on: http://git-master/r/491560
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
Tested-by: Thomas Cherry <tcherry@nvidia.com>

cpuidle: tegra210: fix suspend with multi-core

Handle the CPU_DEAD_FROZEN and CPU_UP_PREPARE_FROZEN events so that
suspend entry and exit works when more than one core is online.

Change-Id: Ic1e704eb8a7bf3a222ddd42b00d19d07273a4a56
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/494017
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Tested-by: Prashant Gaikwad <pgaikwad@nvidia.com>

arm64: enable halting CPU by hlt

set MDSCR_EL1.HDE,so that hlt instruction can be used to halt cpu

this is useful in that the hlt instruction can be inserted into
various places for JTAG debugger attach.

for example, following statement can halt the CPU for JTAG debugger:

asm volatile("hlt #0x1234")

Change-Id: I0ad0429ca05720573bae0e91a9da8ccd1019566b
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/494149
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>

gpu: nvgpu: Add GM20b pll registers error dump

Change-Id: I67fe2c4cbab1d43670131d95bbea732e932c0910
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/494164
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

gpu: nvgpu: Clear PTE ref after freeing

When clearing sparse buffers, pte->ref must be cleared once the PTE
is freed.

Bug 1549451

Change-Id: Ie7d3e438ef2c43cbcf893709ae50a67823bf0c9c
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/494670
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>

gpu: nvgpu: Fix max comptag calculation

Fix order of calculation for max comptag line calculation.

Bug 1549451

Change-Id: I13bf657f0f0b8aafa4d64dacacb74d7224fed379
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/494657
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Shridhar Rasal <srasal@nvidia.com>

gpu: nvgpu: Fix and enable L2 error processing

Fix L2 error processing to look into interrupts in each L2 and slice.
Enable L2 error interrupts.

Bug 1549451

Change-Id: If6dd77f1333426a10b6a148c9432c12df8d879c7
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/494656
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>

video: tegra: host: Rework SLCG override

This patch reworks the SLCG override to include also Falcon and engine
internal registers in addition to THI SLCG overrides.

Change-Id: Id5c6ea10ced0e2266ef217ed0fe64701e32bb761
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/494589
Reviewed-by: Automatic_Commit_Validation_User

asoc: tegra-alt: es755: enable headset gpio

- enable headset gpio code.
- clean up machine driver code

bug 1548129

Change-Id: I0fcecdae3e00fb13d35f53ac33b1042dd3e53603
Signed-off-by: Dara Ramesh <dramesh@nvidia.com>
Reviewed-on: http://git-master/r/494541

platform: nvadsp: Fix DRAM logger issue on restart

Logging stops working once ADSP restarts. This is since the write pointer on
ADSP resets while the read pointer is waiting for an update(as in waiting on
EOT). Moving the read pointer to the intial position and marking it EOT so that
it waits till ADSP boot up and updates the DRAM logger memory.

Bug 200031688

Change-Id: I365f180c51662a70cb95dafb96dc98c7949415bd
Signed-off-by: Ajay Nandakumar <anandakumarm@nvidia.com>
Reviewed-on: http://git-master/r/493976
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Nitin Kumbhar <nkumbhar@nvidia.com>

platform: nvadsp: disable second wdt interrupt

There is a second wdt interrupt that is being generated when asserting the
resets. As a software workaround, disable wdt interrupt assert the clocks and
then clear the pending or active wdt interrupt and then restart the ADSP.

Bug 200031683

Change-Id: Icda2cd776488f9b0e03914b7c125b061924d4b17
Signed-off-by: Ajay Nandakumar <anandakumarm@nvidia.com>
Reviewed-on: http://git-master/r/493975
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Nitin Kumbhar <nkumbhar@nvidia.com>

irqchip: gic: APIs to clear pending and active irq

Adding APIs for AGIC to clear pending and active irqs.

Bug 200031683

Change-Id: I06fcbf19f978eddebc8b209acb33997c05b4ea20
Signed-off-by: Ajay Nandakumar <anandakumarm@nvidia.com>
Reviewed-on: http://git-master/r/493974
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Nitin Kumbhar <nkumbhar@nvidia.com>

platform: nvadsp: Use Mailbox 2 as FIQ

Use Mailbox 2 as FIQ so that it can trigger an interrupt on ADSP side even in
the case where IRQs are disabled.

Bug 200031688
Bug 200031683

Change-Id: I61a616f418d08d2bb2525d011982087cf3769e31
Signed-off-by: Ajay Nandakumar <anandakumarm@nvidia.com>
Reviewed-on: http://git-master/r/488847
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Nitin Kumbhar <nkumbhar@nvidia.com>

irqchip: enable FIQ for AGIC

Enabling FIQ for AGIC so that FIQ can be triggered on ADSP in case
there is a necessity to put in idle state.

Bug 200031688
Bug 200031683

Change-Id: I9d3f487cef04d718965c573831eef1f2fbe2cd00
Signed-off-by: Ajay Nandakumar <anandakumarm@nvidia.com>
Reviewed-on: http://git-master/r/488846
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Nitin Kumbhar <nkumbhar@nvidia.com>

tegra: adsp: Implement nvadsp_os_stop

Adding support to stop adsp os. This is done by disabling adsp clks.

Bug 200031683
Bug 200031688

Change-Id: I30322a1e6baf7c7cbd5332181f4782ce93f11a8c
Signed-off-by: Ajay Nandakumar <anandakumarm@nvidia.com>
Reviewed-on: http://git-master/r/486540
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Nitin Kumbhar <nkumbhar@nvidia.com>

security: tlk_driver: remove legacy ss support

Remove TE_IOCTL_SS_NEW_REQ/TE_IOCTL_SS_REQ_COMPLETE
support as these ioctls are no longer used.

Change-Id: I1cc54ec94e24985ba6de28c24422a363d239cbab
Signed-off-by: Scott Long <scottl@nvidia.com>
Reviewed-on: http://git-master/r/494843
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>

Revert "drivers: i2c: support of vi-i2c"

This reverts commit 1636956809b82fe6ad5f4860fc60996f487a77de.

Change-Id: I0e46e1b064510aa84dbc2cf18a060cc451d225d9
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/494750
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
Tested-by: Juha Tukkinen <jtukkinen@nvidia.com>

Revert "i2c: tegra: vi-i2c: fix 8 bit address r/w"

This reverts commit 027e4e57eb9a9d51e624ef4eb4c4125cc19007dd.

Change-Id: I0a21bccdb61bb6fc43fb6c8123c35c1ac17bddac
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/494749
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
Tested-by: Juha Tukkinen <jtukkinen@nvidia.com>

video: tegra: sor: Add CRC debugfs node

bug 1493980

The new node is /d/tegra_sor/crc.
Writing to the node sets the CRC
state for each SOR portnum:
[0:0]={1,0} sets ARM_CRC_ENABLE
[5:4]={2,1,0} sets ASY_CRCMODE

E.g., writing tegra_sor/crc = 0x11
will enable CRC for ACTIVE_RASTER

Reading the node returns NV_SOR_CRCB
for each SOR portnum.

Change-Id: Iade2ccc06bc8306e663b72f1a1c4075448cd0f3e
Signed-off-by: Aron Wong <awong@nvidia.com>
Reviewed-on: http://git-master/r/450604
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Tested-by: Jon Mayo <jmayo@nvidia.com>

video: tegra: dsi: Add crc debugfs node

bug 1493980

The new node is /d/tegra_dsi/crc.
Writing 0|1 to the node sets DSI_DBG_ENABLE
for each enabled DSI unit.
Reading the node returns DSI_TX_CRC for
each enabled DSI unit.
This version adds some protection from
dsi->base[i] == NULL scenarios.
Also updated dbg_dsi_show() to use the same
dsi pointer init as the CRC function,
to be compatible with fake DSI.

Change-Id: I5b97c3c3735edd65818a1f74354f9979d5688f82
Signed-off-by: Aron Wong <awong@nvidia.com>
Reviewed-on: http://git-master/r/447833
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

misc: tegra-profiler: fix broken call chains

Dwarf unwinding on AArch64: fix broken call chains
for some types of functions.

Bug 1549713

Change-Id: Ia3d51723f6381befe01481a5d4d3b4041ad7b411
Signed-off-by: Igor Nabirushkin <inabirushkin@nvidia.com>
Reviewed-on: http://git-master/r/494632
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>