From: Anshuman Nath Kar <anshumank@nvidia.com>
Date: Thu, 29 May 2014 00:43:07 +0000 (-0700)
Subject: video: tegra: hdmi: check dc powergating status
X-Git-Tag: daily-2014.07.30.0_rel-st8-r2.2-partner~33
X-Git-Url: https://rtime.felk.cvut.cz/gitweb/sojka/nv-tegra/linux-3.10.git/commitdiff_plain/e803fa14dc97c0da7df339185c97d4e6301832ac

video: tegra: hdmi: check dc powergating status

Add checks for dc clockgating and powergating before
reading or writing from dc hdmi registers

Bug 200005903
Bug 1514732
Bug 200017536
Bug 200018316
Bug 200018314

Change-Id: I5155af72a0529d167bf56b016d9238501c5b4229
Signed-off-by: Anshuman Nath Kar <anshumank@nvidia.com>
Reviewed-on: http://git-master/r/434863
Reviewed-by: Eric Chuang <echuang@nvidia.com>
---

diff --git a/drivers/video/tegra/dc/hdmi.c b/drivers/video/tegra/dc/hdmi.c
index 480ae8a476c..47bebab570a 100644
--- a/drivers/video/tegra/dc/hdmi.c
+++ b/drivers/video/tegra/dc/hdmi.c
@@ -421,6 +421,12 @@ unsigned long tegra_hdmi_readl(struct tegra_dc_hdmi_data *hdmi,
 					     unsigned long reg)
 {
 	unsigned long ret;
+
+	if (WARN(!tegra_is_clk_enabled(hdmi->dc->clk), "DC is clock-gated.\n") ||
+		WARN(!tegra_powergate_is_powered(hdmi->dc->powergate_id),
+			"DC is power-gated.\n"))
+		return 0;
+
 	ret = readl(hdmi->base + reg * 4);
 	trace_display_readl(hdmi->dc, ret, hdmi->base + reg * 4);
 	return ret;
@@ -429,6 +435,11 @@ unsigned long tegra_hdmi_readl(struct tegra_dc_hdmi_data *hdmi,
 void tegra_hdmi_writel(struct tegra_dc_hdmi_data *hdmi,
 				     unsigned long val, unsigned long reg)
 {
+	if (WARN(!tegra_is_clk_enabled(hdmi->dc->clk), "DC is clock-gated.\n") ||
+		WARN(!tegra_powergate_is_powered(hdmi->dc->powergate_id),
+			"DC is power-gated.\n"))
+		return;
+
 	trace_display_writel(hdmi->dc, val, hdmi->base + reg * 4);
 	writel(val, hdmi->base + reg * 4);
 }