]> rtime.felk.cvut.cz Git - sojka/nv-tegra/linux-3.10.git/commit
ARM: tegra21: ERS: rails LDO1 and LDO8
authorTW Chiu <twchiu@nvidia.com>
Thu, 11 Jun 2015 12:18:49 +0000 (20:18 +0800)
committermobile promotions <svcmobile_promotions@nvidia.com>
Sat, 10 Oct 2015 10:13:57 +0000 (03:13 -0700)
commitf4838fd8768172bc3b51b57f0bd462266c9bc66a
treec00aa8e35134ef8e03c67d912d14817a6ccee8ee
parent7dfb5a8d8e36dd35db4edbf1c3e95c5f610c84a4
ARM: tegra21: ERS: rails LDO1 and LDO8

Make LDO1 and LDO8 always ON with LP0 OFF.

Make these rails to be OFF in LP0 by connecting these rails with FPS1.

These rails are necessary for UPHY PAD and PLL. UPHY needs to be in
operating state in LP1. We can only turn these rails OFF in LP0.

Bug 200068549
Bug 1653521

Change-Id: If08dd287ec466bc36e8db0f5b13fe1c81f29be6a
Signed-off-by: TW Chiu <twchiu@nvidia.com>
Reviewed-on: http://git-master/r/756449
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
Tested-by: Ashutosh Jha <ajha@nvidia.com>
Reviewed-on: http://git-master/r/810580
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
arch/arm64/boot/dts/tegra210-platforms/tegra210-ers-pmic-e2174-1101-a00.dtsi
arch/arm64/boot/dts/tegra210-platforms/tegra210-hawkeye-pmic-p2290-1100-a00.dtsi
arch/arm64/boot/dts/tegra210-platforms/tegra210-jetson-e-pmic-p2530-0930-e03.dtsi