ARM: tegra12: dvfs: Fix thermal limits comparison
When initializing CPU thermal limits profiles, original characterized
limits are compared with CPU DFLL minimum voltage already aligned to
PMIC ladder. This potentially may result in false negative outcome.
Fixed it by using non aligned minimum voltage as well.
Bug
1343366
Change-Id: I5fe5e10574a729c99e66fb5b792e758417d38db5
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/368123
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>