ASoC: tegra-alt: Update DMIC DCR coeff to POR
TEGRA210_DMIC_DCR_BIQUAD_0_COEF_4 is corrected to 0x0
(as per latest POR)
Bug
200134942
Bug
200078772
Change-Id: I628c2d3e18615df476b67761553762a23f1fe47e
Signed-off-by: Viswanath L <viswanathl@nvidia.com>
Reviewed-on: http://git-master/r/802678
(cherry picked from commit
65882abd69f17d0bbad7bd12646c3975352362a1)
Reviewed-on: http://git-master/r/805861
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>