arm: tegra: usb: Disable WAIT_FOR_VALID for hsic

arm: tegra: usb: Disable WAIT_FOR_VALID for hsic

The ehci generic port reset fails sometimes for HSIC modem
to connect in stress tests. HSIC bus reset apparently needs
a SW WAR. Using the feature of HS_READY_WAIT_FOR_VALID to disable
HSIC transmit config signal for HS ready wait for valid.

This is AP30 specific workaround.

Bug 898008
Bug 932606

Change-Id: I3d1aafa1bbd046769b0eb62970aa990ae7bad617
Signed-off-by: Vinayak Pane <vpane@nvidia.com>
Reviewed-on: http://git-master/r/83279
Reviewed-by: Rajkumar Jayaraman <rjayaraman@nvidia.com>
Reviewed-by: Steve Lin <stlin@nvidia.com>
Rebase-Id: R35598e304da15babd5186b5ef6e628d125bab72a