ARM: tegra: dvfs: Compare set and required DFLL Vmin

ARM: tegra: dvfs: Compare set and required DFLL Vmin

Added CL-DVFS driver interface to compare set and required DFLL Vmin.
Commonly while operating in closed loop these two levels are equal.
However, when DFLL is disabled or in transition to/from disabled state
temperature or SiMon grade changes are not immediately delivered to
PMIC, and the levels may be different.

Bug 1343366

Change-Id: I7ecd782b37ddb5e3ca7a0f0dfa658ebb526e9fc6
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/391050
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>