ARM64: tegra: hawkeye: Update DFLL sample rate

ARM64: tegra: hawkeye: Update DFLL sample rate

Updated DFLL sample rate for FM+ mode on PWR I2C.

Bug 200113063

Change-Id: I626b8787fb7a30fa47c2142a76e7daf9f84d72bb
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/757171
(cherry picked from commit 209b42e8dea8ac9918a4bb014c011ca4fe8f54be)
Reviewed-on: http://git-master/r/760413
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Shardar Mohammed <smohammed@nvidia.com>
Tested-by: Shardar Mohammed <smohammed@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>