arm: tegra: xmm: simultaneous L3 to L0 wakeup

arm: tegra: xmm: simultaneous L3 to L0 wakeup

In AP initiated L3->L0 wakeup xmm power state is set BBXMM_PS_L3TOL0
but if CP is also trying to wakeup then ipc_ap_wake_irq with falling
edge treats it incorrectly as CP wakeup pending - new race condition.

Adding a check to fix this scenario for both L3 and L3TOL0 states.

Bug 966077

Change-Id: I3af3538b48745588f17e4c13a3e23e4033f21821
Signed-off-by: Vinayak Pane <vpane@nvidia.com>
Reviewed-on: http://git-master/r/102698
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Steve Lin <stlin@nvidia.com>
Rebase-Id: R97acdd6997bbe465e4eb990630606110cc46a702