media: video: tegra: AD5820: fix i2c_wr byte order
The byte order in the reg_write call was swapped.
Also updates the mode truth table so focuser can choose one
to work on.
Corrects the position range and set the settle time dependents
on the transition mode.
bug 909072
Change-Id: I91fffbe4810b86883f934b08a4fdbc3284efd652 Signed-off-by: Charlie Huang <chahuang@nvidia.com>
Reviewed-on: http://git-master/r/69279 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Gary Zhang <garyz@nvidia.com> Reviewed-by: Naren Bhat <nbhat@nvidia.com> Reviewed-by: Erik Lilliebjerg <elilliebjerg@nvidia.com> Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Rebase-Id: R1944bafa368c918da17c9e7e1b160d8e3a456b83