*/
#include <linux/delay.h>
+#include <linux/kernel.h>
#include "nvi.h"
#include "nvi_dmp_icm.h"
(1 << DEV_QTN) | \
(1 << DEV_GMR) | \
(1 << DEV_GYU))
+#define AUX_PORT_DEV_GMF (0)
+#define MSK_AUX_PORTS_DEV_GMF (0x3)
+#define AUX_PORT_DEV_PRS (3)
+#define MSK_AUX_PORTS_DEV_PRS (0x8)
+#define MSK_EN_AUX_PORTS (((1 << (AUX_PORT_IO + DEV_N_AUX)) - \
+ 1) & ~MSK_DEV_SNSR)
+
#define DEFAULT_ACCEL_GAIN (0x02000000)
#define PED_ACCEL_GAIN (0x04000000)
#define DMP_ACC_PERIOD_US_PED (19608)
#define DMP_HDR1_HDR2_MSK (0x0008)
#define DMP_HDR1_PUSH_MSK (0xFEF0)
#define DMP_DATA_OUT_CTL_HDR2_MSK (0x0000FFFF)
-#define DMP_DATA_OUT_CTL_HDR2_BIT (0x00080000)
struct nvi_dmp_dev {
unsigned int period_us_dflt;
unsigned int buf_n;
int buf_shft;
- u32 out_ctl;
- u16 int_ctl;
+ u32 int_ctl;
u16 odr_cfg;
u16 odr_cntr;
- int (*fn_init)(struct nvi_state *st, unsigned int en_msk,
- u32 *out_ctl);
+ unsigned int odr_src;
+ int (*fn_init)(struct nvi_state *st, u32 *out_ctl,
+ unsigned int en_msk, unsigned int irq_msk);
+ int (*fn_initd)(struct nvi_state *st, u32 *out_ctl,
+ unsigned int en_msk, unsigned int irq_msk);
};
struct nvi_dmp_hdr {
};
+struct inv_dmp_acc_scale {
+ u32 scale;
+ u32 scale2;
+};
+
+/* input param: fsr for accel parts
+ * 1: 1g. 2: 2g. 4: 4g. 8: 8g. 16: 16g. 32: 32g.
+ * The goal is to set 1g data to 2^25, 2g data to 2^26, etc.
+ * For 2g parts, raw accel data is 1g = 2^14, 2g = 2^15.
+ * DMP takes raw accel data and shifts by 16 bits, so this scale means to shift
+ * by -5 bits.
+ * In Q-30 math, >> 5 equals multiply by 2^25 = 33554432.
+ * For 8g parts, raw accel data is 4g = 2^14, 8g = 2^15.
+ * DMP takes raw accel data and shifts by 16 bits, so this scale means to shift
+ * by -3 bits.
+ * In Q-30 math, >> 3 equals multiply by 2^27 = 134217728.
+ */
+static struct inv_dmp_acc_scale inv_dmp_acc_scales[] = {
+ {
+ .scale = 0x02000000,
+ .scale2 = 0x00080000,
+ },
+ {
+ .scale = 0x04000000,
+ .scale2 = 0x00040000,
+ },
+ {
+ .scale = 0x08000000,
+ .scale2 = 0x00020000,
+ },
+ {
+ .scale = 0x10000000,
+ .scale2 = 0x00010000,
+ },
+};
+
+static int nvi_dmp_acc_init(struct nvi_state *st, u32 *out_ctl,
+ unsigned int en_msk, unsigned int irq_msk)
+{
+ int ret = 0;
+#if ICM_DMP_FW_VER == 2
+ unsigned int i;
+
+ i = st->snsr[DEV_ACC].usr_cfg;
+ ret |= nvi_mem_wr_be_mc(st, ACC_SCALE, 4,
+ inv_dmp_acc_scales[i].scale,
+ &st->mc.icm.acc_scale);
+ ret |= nvi_mem_wr_be_mc(st, ACC_SCALE2, 4,
+ inv_dmp_acc_scales[i].scale2,
+ &st->mc.icm.acc_scale2);
+#endif /* ICM_DMP_FW_VER */
+ ret |= st->hal->fn->en_acc(st);
+ if (irq_msk & (1 << DEV_ACC) || en_msk & ((1 << DEV_QTN) |
+ (1 << DEV_GMR)))
+ *out_ctl |= ACCEL_ACCURACY_SET;
+ return ret;
+}
+
struct inv_dmp_acc_wtf {
unsigned int period_us;
unsigned int rate;
},
};
-static int nvi_dmp_acc_init(struct nvi_state *st, unsigned int en_msk,
- u32 *out_ctl)
+static int nvi_dmp_acc_initd(struct nvi_state *st, u32 *out_ctl,
+ unsigned int en_msk, unsigned int irq_msk)
{
unsigned int min_diff = -1;
unsigned int tmp;
unsigned int j;
int ret;
- ret = st->hal->fn->en_acc(st);
i = ARRAY_SIZE(inv_dmp_acc_wtfs) - 1;
if (st->src[SRC_ACC].period_us_src > inv_dmp_acc_wtfs[i].period_us) {
/* i = ARRAY_SIZE(inv_dmp_acc_wtfs) - 1 */
}
}
- ret |= nvi_mem_wr_be_mc(st, ACCEL_CAL_RATE, 2,
- inv_dmp_acc_wtfs[i].rate,
- &st->mc.icm.accel_cal_rate);
+ ret = nvi_mem_wr_be_mc(st, ACCEL_CAL_RATE, 2, inv_dmp_acc_wtfs[i].rate,
+ &st->mc.icm.accel_cal_rate);
ret |= nvi_mem_wr_be_mc(st, PED_RATE, 4, inv_dmp_acc_wtfs[i].rate,
&st->mc.icm.ped_rate);
ret |= nvi_mem_wr_be_mc(st, ACCEL_ALPHA_VAR, 4,
return ret;
}
+/* gmf = GeoMagnetic Field (compass) */
+static int nvi_dmp_gmf_init(struct nvi_state *st, u32 *out_ctl,
+ unsigned int en_msk, unsigned int irq_msk)
+{
+ if (st->aux.port[AUX_PORT_DEV_GMF].nmp.type !=
+ SECONDARY_SLAVE_TYPE_COMPASS)
+ /* disable without error if no compass */
+ return 1;
+
+ if (!st->aux.port[AUX_PORT_DEV_GMF].nmp.handler)
+ /* no handler */
+ return 1;
+
+ st->src[SRC_AUX].period_us_max =
+ st->hal->src[SRC_AUX].period_us_min * 8;
+ if (irq_msk & (1 << (AUX_PORT_DEV_GMF + DEV_N_AUX)) ||
+ en_msk & (1 << DEV_GMR))
+ *out_ctl |= CPASS_ACCURACY_SET;
+ return 0;
+}
+
struct inv_dmp_gmf_wtf {
unsigned int period_us;
unsigned int ct;
};
/* gmf = GeoMagnetic Field (compass) */
-static int nvi_dmp_gmf_init(struct nvi_state *st, unsigned int en_msk,
- u32 *out_ctl)
+static int nvi_dmp_gmf_initd(struct nvi_state *st, u32 *out_ctl,
+ unsigned int en_msk, unsigned int irq_msk)
{
unsigned int min_diff = -1;
unsigned int tmp;
unsigned int j;
int ret;
- if (st->aux.port[0].nmp.type != SECONDARY_SLAVE_TYPE_COMPASS)
- /* DMP shouldn't run if AUX device not supported */
- return -EINVAL;
-
i = ARRAY_SIZE(inv_dmp_gmf_wtfs) - 1;
if (st->src[SRC_AUX].period_us_src > inv_dmp_gmf_wtfs[i].period_us) {
/* i = ARRAY_SIZE(inv_dmp_gmf_wtfs) - 1 */
ret = nvi_mem_wr_be_mc(st, CPASS_TIME_BUFFER, 2,
inv_dmp_gmf_wtfs[i].ct,
&st->mc.icm.cpass_time_buffer);
+ ret |= nvi_mem_wr_be_mc(st,
+ CPASS_RADIUS_3D_THRESH_ANOMALY, 4,
+ inv_dmp_gmf_wtfs[i].rad_3d,
+ &st->mc.icm.cpass_rad_3d_thr);
+#if ICM_DMP_FW_VER == 0
ret |= nvi_mem_wr_be_mc(st, CPASS_ALPHA_VAR, 4,
inv_dmp_gmf_wtfs[i].alpha_c,
&st->mc.icm.cpass_alpha_var);
ret |= nvi_mem_wr_be_mc(st, CPASS_A_VAR, 4,
inv_dmp_gmf_wtfs[i].a_c,
&st->mc.icm.cpass_a_var);
- ret |= nvi_mem_wr_be_mc(st,
- CPASS_RADIUS_3D_THRESH_ANOMALY, 4,
- inv_dmp_gmf_wtfs[i].rad_3d,
- &st->mc.icm.cpass_rad_3d_thr);
ret |= nvi_mem_wr_be_mc(st, CPASS_NOMOT_VAR_THRESH, 4,
inv_dmp_gmf_wtfs[i].nomot_var_thr,
&st->mc.icm.cpass_nomot_var_thr);
+#endif /* ICM_DMP_FW_VER */
return ret;
}
/* prs = pressure */
-static int nvi_dmp_prs_init(struct nvi_state *st, unsigned int en_msk,
- u32 *out_ctl)
+static int nvi_dmp_prs_init(struct nvi_state *st, u32 *out_ctl,
+ unsigned int en_msk, unsigned int irq_msk)
{
- return 1;
+ if (st->aux.port[AUX_PORT_DEV_PRS].nmp.type !=
+ SECONDARY_SLAVE_TYPE_PRESSURE)
+ /* disable without error if no pressure */
+ return 1;
+
+ return 0;
}
-static int nvi_dmp_gyr_init(struct nvi_state *st, unsigned int en_msk,
- u32 *out_ctl)
+static int nvi_dmp_gyr_init(struct nvi_state *st, u32 *out_ctl,
+ unsigned int en_msk, unsigned int irq_msk)
{
+ if (irq_msk & (1 << DEV_GYR) || en_msk & ((1 << DEV_QTN) |
+ (1 << DEV_GMR)))
+ *out_ctl |= GYRO_ACCURACY_SET;
st->snsr[DEV_GYR].sts = 1;
return st->hal->fn->en_gyr(st);
}
-static int nvi_dmp_sm_init(struct nvi_state *st, unsigned int en_msk,
- u32 *out_ctl)
+static int nvi_dmp_sm_init(struct nvi_state *st, u32 *out_ctl,
+ unsigned int en_msk, unsigned int irq_msk)
{
#if ICM_DMP_FW_VER == 0
int ret;
st->snsr[DEV_SM].cfg.delay_us_max,
&st->mc.icm.smd_delay2_thld);
return ret;
-#else /* ICM_DMP_FW_VER */
- /* ICM_DMP_FW_VER == 1 */
+#elif ICM_DMP_FW_VER == 1
return nvi_mem_wr_be_mc(st, SMD_TIMER_THLD, 4,
st->snsr[DEV_SM].cfg.thresh_hi,
&st->mc.icm.smd_timer_thld);
+#elif ICM_DMP_FW_VER == 2
+ return nvi_mem_wr_be_mc(st, SMD_CNTR_TH, 4,
+ st->snsr[DEV_SM].cfg.thresh_hi,
+ &st->mc.icm.smd_timer_thld);
+#else
+ return 0;
#endif /* ICM_DMP_FW_VER */
}
-static int nvi_dmp_gmr_init(struct nvi_state *st, unsigned int en_msk,
- u32 *out_ctl)
+static int nvi_dmp_gmr_init(struct nvi_state *st, u32 *out_ctl,
+ unsigned int en_msk, unsigned int irq_msk)
{
- if (out_ctl) {
- if (en_msk & ((1 << DEV_GYR) | (1 << DEV_GYU)))
- /* if gyro is enabled GMR becomes QTN 9-axis */
- *out_ctl |= 0x04000000;
- else
- *out_ctl |= 0x04000200;
- }
+ if (en_msk & ((1 << DEV_GYR) | (1 << DEV_GYU)))
+ /* if gyro is enabled GMR becomes QTN 9-axis */
+ st->src[SRC_AUX].period_us_min =
+ st->hal->src[SRC_AUX].period_us_min * 2;
+ else
+ /* gyro not enabled so GMR enabled */
+ *out_ctl |= GEOMAG_EN;
return 0;
}
static struct nvi_dmp_dev nvi_dmp_devs[] = {
{
.dev = DEV_ACC,
+#if ICM_DMP_FW_VER == 2
+ .buf_n = 6,
+ .buf_shft = 0,
+#else /* ICM_DMP_FW_VER < 2 */
.buf_n = 12,
.buf_shft = -11,
- .out_ctl = 0x80004000,
+#endif /* ICM_DMP_FW_VER */
.int_ctl = ACCEL_SET,
.odr_cfg = ODR_ACCEL,
.odr_cntr = ODR_CNTR_ACCEL,
+ .odr_src = SRC_ACC,
.fn_init = &nvi_dmp_acc_init,
+ .fn_initd = &nvi_dmp_acc_initd,
},
{
.dev = DEV_GYR,
- .depend_msk = (1 << DEV_GYU),
.buf_n = 12,
- .out_ctl = 0x00402000,
.int_ctl = GYRO_CALIBR_SET,
.odr_cfg = ODR_GYRO_CALIBR,
.odr_cntr = ODR_CNTR_GYRO_CALIBR,
+ .odr_src = SRC_GYR,
.fn_init = &nvi_dmp_gyr_init,
},
{
.dev = DEV_GYU,
.depend_msk = (1 << DEV_GYR),
.buf_n = 6,
- .out_ctl = 0x40000000,
.int_ctl = GYRO_SET,
.odr_cfg = ODR_GYRO,
.odr_cntr = ODR_CNTR_GYRO,
+ .odr_src = SRC_GYR,
},
{
.dev = DEV_QTN,
.depend_msk = (1 << DEV_ACC) |
- (1 << DEV_GYR) |
- (1 << DEV_GYU),
+ (1 << DEV_GYR),
.src_msk = (1 << SRC_ACC) |
- (1 << SRC_GYR) |
- (1 << SRC_AUX),
+ (1 << SRC_GYR),
.period_us_dflt = ICM_DMP_PERIOD_US,
.buf_n = 12,
- .out_ctl = 0x08000000,
.int_ctl = QUAT6_SET,
.odr_cfg = ODR_QUAT6,
.odr_cntr = ODR_CNTR_QUAT6,
+ .odr_src = SRC_GYR,
},
{
.dev = DEV_GMR,
.int_ctl = QUAT9_SET,
.odr_cfg = ODR_QUAT9,
.odr_cntr = ODR_CNTR_QUAT9,
+ .odr_src = SRC_ACC,
.fn_init = &nvi_dmp_gmr_init,
},
{
},
{
.dev = DEV_AUX,
- .aux_port = 0,
- .depend_msk = (0x03 << DEV_N_AUX),
+ .aux_port = AUX_PORT_DEV_GMF,
+ .depend_msk = (MSK_AUX_PORTS_DEV_GMF << DEV_N_AUX),
.buf_n = 6,
- .out_ctl = 0x20001000,
.int_ctl = CPASS_SET,
.odr_cfg = ODR_CPASS,
.odr_cntr = ODR_CNTR_CPASS,
+ .odr_src = SRC_AUX,
.fn_init = &nvi_dmp_gmf_init,
+ .fn_initd = &nvi_dmp_gmf_initd,
},
{
.dev = DEV_AUX,
- .aux_port = 2,
- .depend_msk = (0x0C << DEV_N_AUX),
+ .aux_port = AUX_PORT_DEV_PRS,
.buf_n = 6,
- .out_ctl = 0x00800000,
.int_ctl = PRESSURE_SET,
.odr_cfg = ODR_PRESSURE,
.odr_cntr = ODR_CNTR_PRESSURE,
+ .odr_src = SRC_AUX,
.fn_init = &nvi_dmp_prs_init,
},
};
{
.dev = DEV_ACC,
.data_n = 2,
- .hdr_msk = 0x4000,
+ .hdr_msk = ACCEL_ACCURACY_SET,
},
{
.dev = DEV_GYR,
.data_n = 2,
- .hdr_msk = 0x2000,
+ .hdr_msk = GYRO_ACCURACY_SET,
},
{
.dev = DEV_AUX,
- .aux_port = 0,
+ .aux_port = AUX_PORT_DEV_GMF,
.data_n = 2,
- .hdr_msk = 0x1000,
+ .hdr_msk = CPASS_ACCURACY_SET,
},
{
- .dev = -1,
+ .dev = -1, /* WTF */
.data_n = 6,
- .hdr_msk = 0x0080,
+ .hdr_msk = ACT_RECOG_SET,
},
};
static struct nvi_dmp_hdr nvi_dmp_hdr1s[] = {
{
.dev = DEV_ACC,
+#if ICM_DMP_FW_VER == 2
+ .data_n = 6,
+#else /* ICM_DMP_FW_VER < 2 */
.data_n = 12,
- .hdr_msk = 0x8000,
+#endif /* ICM_DMP_FW_VER */
+ .hdr_msk = ACCEL_SET,
},
{
.dev = DEV_GYU,
.data_n = 6,
- .hdr_msk = 0x4000,
+ .hdr_msk = GYRO_SET,
},
{
.dev = DEV_AUX,
- .aux_port = 0,
+ .aux_port = AUX_PORT_DEV_GMF,
.data_n = 6,
- .hdr_msk = 0x2000,
+ .hdr_msk = CPASS_SET,
},
{
.dev = DEV_AUX,
- .aux_port = -1,
+ .aux_port = -1, /* ALS */
.data_n = 8,
- .hdr_msk = 0x1000,
+ .hdr_msk = ALS_SET,
},
{
.dev = DEV_QTN,
.data_n = 12,
- .hdr_msk = 0x0800,
+ .hdr_msk = QUAT6_SET,
},
{
.dev = DEV_GMR,
.data_n = 14,
- .hdr_msk = 0x0400,
+ .hdr_msk = QUAT9_SET,
},
{
.dev = -1, /* PQUAT6 */
.data_n = 6,
- .hdr_msk = 0x0200,
+ .hdr_msk = PQUAT6_SET,
},
{
.dev = DEV_AUX,
- .aux_port = 2,
+ .aux_port = AUX_PORT_DEV_PRS,
.data_n = 6,
- .hdr_msk = 0x0080,
+ .hdr_msk = PRESSURE_SET,
},
{
.dev = DEV_GYR,
.data_n = 12,
- .hdr_msk = 0x0040,
+ .hdr_msk = GYRO_CALIBR_SET,
},
{
.dev = -1, /* CPASS_CALIBR */
.data_n = 12,
- .hdr_msk = 0x0020,
+ .hdr_msk = CPASS_CALIBR_SET,
},
{
.dev = DEV_STP,
.data_n = 4,
- .hdr_msk = 0x0010,
+ .hdr_msk = PED_STEPDET_SET,
},
};
return nvi_mem_rd_le(st, DMPRATE_CNTR, 4, clk_n);
}
-static int nvi_dmp_period(struct nvi_state *st, unsigned int en_msk)
+static unsigned int nvi_dmp_gmf_us_periods[] = {
+ 200000,
+ 166667,
+ 142857,
+ 125000,
+ 111111,
+ 100000,
+ 90909,
+ 83333,
+ 76923,
+ 71429,
+ 66667,
+ 58824,
+ 55556,
+ 45455,
+ 40000,
+ 35714,
+ 31250,
+ 27027,
+ 22222,
+ 19608,
+ 13333,
+ 9804,
+ 4444,
+};
+
+static int nvi_dmp_period(struct nvi_state *st, u32 *out_ctl,
+ unsigned int en_msk, unsigned int irq_msk)
{
struct nvi_dmp_dev *dd;
- u16 int_ctl = 0;
+ u32 int_ctl;
u16 odr_cfg;
unsigned int period_us_req[SRC_N];
unsigned int period_us;
- unsigned int period_us_int = -1;
+ unsigned int period_us_int;
+ unsigned int dev_msk;
unsigned int src_msk;
unsigned int src;
unsigned int i;
- unsigned int j = -1;
+ unsigned int j;
int ret;
int ret_t = 0;
+ /* sensor enabled = sensor enabled by HAL (irq_msk)
+ * sensor active = sensor on as dependency to another sensor
+ */
/* initialize source period */
for (src = 0; src < st->hal->src_n; src++)
period_us_req[src] = st->hal->src[src].period_us_max;
- /* set source's period_us_req[] to fastest DMP device */
+ /* set source's period_us_req[] to fastest enabled sensor */
for (i = 0; i < ARRAY_SIZE(nvi_dmp_devs); i++) {
dd = &nvi_dmp_devs[i];
- if ((!st->snsr[dd->dev].period_us) || !(en_msk &
+ if ((!st->snsr[dd->dev].period_us) || !(irq_msk &
(1 << dd->dev)))
+ /* sensor not enabled or non-valid period */
continue;
src_msk = dd->src_msk; /* use all of device's sources */
src_msk |= (1 << st->hal->dev[dd->dev]->src);
for (src = 0; src < st->hal->src_n; src++) {
if (!(src_msk & (1 << src)))
+ /* sensor doesn't use this source */
continue;
if (st->snsr[dd->dev].period_us < period_us_req[src])
period_us_req[src] =
st->snsr[dd->dev].period_us;
- }
- }
-
- /* override above fastest speeds with any faster defaults */
- for (i = 0; i < ARRAY_SIZE(nvi_dmp_devs); i++) {
- dd = &nvi_dmp_devs[i];
- if ((!dd->period_us_dflt) || !(en_msk & (1 << dd->dev)))
- continue;
-
- src_msk = dd->src_msk; /* use all of device's sources */
- if (st->hal->dev[dd->dev]->src >= 0)
- src_msk |= (1 << st->hal->dev[dd->dev]->src);
- for (src = 0; src < st->hal->src_n; src++) {
- if (src_msk & (1 << src) && (dd->period_us_dflt <
- period_us_req[src]))
- period_us_req[src] = dd->period_us_dflt;
+ /* override above speeds with any faster defaults */
+ if (dd->period_us_dflt) {
+ if (dd->period_us_dflt < period_us_req[src])
+ period_us_req[src] =
+ dd->period_us_dflt;
+ }
}
}
* SRC_AUX has timestamps set to ts_now = 0 since SRC_AUX has fixed
* rates and can't sync with the other sources.
*/
- period_us = -1;
- for (src = 0; src < st->hal->src_n; src++) {
- if (period_us_req[src] < period_us)
- period_us = period_us_req[src];
+ period_us = min(period_us_req[SRC_GYR], period_us_req[SRC_ACC]);
+ /* The latest INV driver implements this WAR with a twist: the gmf
+ * lookup table, nvi_dmp_gmf_us_periods.
+ */
+ if (en_msk & (1 << (DEV_N_AUX + AUX_PORT_DEV_GMF))) {
+ /* compass is enabled */
+ if (period_us_req[SRC_AUX] <= period_us) {
+ j = ARRAY_SIZE(nvi_dmp_gmf_us_periods) - 1;
+ for (i = 0; i < j; i++) {
+ if (period_us_req[SRC_AUX] >=
+ nvi_dmp_gmf_us_periods[i])
+ break;
+ }
+ period_us = nvi_dmp_gmf_us_periods[i];
+ }
+
+ period_us_req[SRC_AUX] = period_us;
}
- for (src = 0; src < st->hal->src_n; src++)
- period_us_req[src] = period_us;
+
+ period_us_req[SRC_GYR] = period_us;
+ period_us_req[SRC_ACC] = period_us;
/* WAR: end */
/* program the sources */
for (src = 0; src < st->hal->src_n; src++) {
- if (!(st->hal->src[src].dev_msk & en_msk))
+ dev_msk = st->hal->src[src].dev_msk;
+ if (dev_msk & (1 << DEV_AUX))
+ dev_msk |= MSK_EN_AUX_PORTS;
+ if (!(dev_msk & en_msk))
+ /* no active sensors use this source */
continue;
- if (period_us_req[src] < st->hal->src[src].period_us_min)
- period_us_req[src] = st->hal->src[src].period_us_min;
- if (period_us_req[src] > st->hal->src[src].period_us_max)
- period_us_req[src] = st->hal->src[src].period_us_max;
+ if (period_us_req[src] < st->src[src].period_us_min)
+ period_us_req[src] = st->src[src].period_us_min;
+ if (period_us_req[src] > st->src[src].period_us_max)
+ period_us_req[src] = st->src[src].period_us_max;
st->src[src].period_us_req = period_us_req[src];
switch (src) {
case SRC_GYR:
st->src[src].base_t;
if (i)
i--;
+/* WAR: start
+ * It appears that the latest INV ICM DMP FW runs everything off of the SRC_GYR
+ */
+#if 0 /* WAR: must program both SRC_ACC & SRC_GYR regardless if used*/
ret = nvi_i2c_write_rc(st, &st->hal->reg->smplrt[src],
i, __func__,
(u8 *)&st->rc.smplrt[src], true);
else
st->src[src].period_us_src = ((i + 1) *
st->src[src].base_t) / 1000;
+#endif /* WAR */
+ ret = nvi_i2c_write_rc(st,
+ &st->hal->reg->smplrt[SRC_GYR],
+ i, __func__,
+ (u8 *)&st->rc.smplrt[SRC_GYR], true);
+ if (ret)
+ ret_t |= ret;
+ else
+ st->src[SRC_GYR].period_us_src = ((i + 1) *
+ st->src[SRC_GYR].base_t) / 1000;
+ ret = nvi_i2c_write_rc(st,
+ &st->hal->reg->smplrt[SRC_ACC],
+ i, __func__,
+ (u8 *)&st->rc.smplrt[SRC_ACC], true);
+ if (ret)
+ ret_t |= ret;
+ else
+ st->src[SRC_ACC].period_us_src = ((i + 1) *
+ st->src[SRC_ACC].base_t) / 1000;
+/* WAR: end */
break;
case SRC_AUX:
}
}
- /* now set each DMP device's ODR based on their source */
+ /* now set each DMP device's ODR based on their period */
+ int_ctl = 0;
+ period_us_int = -1;
+ j = -1;
for (i = 0; i < ARRAY_SIZE(nvi_dmp_devs); i++) {
dd = &nvi_dmp_devs[i];
- if (dd->dev >= DEV_N_AUX || !(dd->odr_cfg | dd->odr_cntr))
- /* dd (DMP Device) is not ODR configurable */
+ if (!(en_msk & (1 << dd->dev)))
+ /* device disabled */
continue;
- if (!(en_msk & (1 << dd->dev)))
+ if (dd->fn_initd)
+ /* settings after src initialized (initd) */
+ ret |= dd->fn_initd(st, out_ctl, en_msk, irq_msk);
+ if (dd->dev >= DEV_N_AUX || !(dd->odr_cfg | dd->odr_cntr))
+ /* dd (DMP Device) is not ODR configurable */
continue;
if (dd->dev == DEV_AUX) {
if (!(en_msk & (1 << (dd->aux_port + DEV_N_AUX))))
+ /* AUX sensor not enabled */
continue;
period_us = st->aux.port[dd->aux_port].period_us;
} else {
period_us = st->snsr[dd->dev].period_us;
}
+
if (st->bm_timeout_us) {
/* batch mode on */
int_ctl |= dd->int_ctl;
} else {
- if (dd->int_ctl && period_us) {
- /* IRQ on fastest period */
+ if (*out_ctl & (dd->int_ctl << 16) && period_us) {
+ /* IRQ on fastest period with data out */
if (period_us < period_us_int) {
period_us_int = period_us;
j = i;
}
}
}
- src = st->hal->dev[dd->dev]->src;
- if (src < st->hal->src_n) {
- odr_cfg = period_us / st->src[src].period_us_src;
+ if (irq_msk & (1 << dd->dev)) {
+ /* ODR rate for sent sensor data */
+ odr_cfg = period_us /
+ st->src[dd->odr_src].period_us_src;
if (odr_cfg)
odr_cfg--;
} else {
- odr_cfg = -1;
+ /* data is not sent so timing is synced to src */
+ odr_cfg = 0;
}
if (dd->dev == DEV_AUX)
st->aux.port[dd->aux_port].odr = odr_cfg;
ret_t |= nvi_mem_wr_be(st, dd->odr_cntr, 2, 0);
}
- if (j != -1)
+ if (j < ARRAY_SIZE(nvi_dmp_devs))
int_ctl |= nvi_dmp_devs[j].int_ctl;
- if (en_msk & (1 << DEV_STP))
+ if (irq_msk & (1 << DEV_STP))
int_ctl |= PED_STEPDET_SET;
ret_t |= nvi_mem_wr_be_mc(st, DATA_INTR_CTL, 2, int_ctl,
&st->mc.icm.data_intr_ctl);
static int nvi_dd_init(struct nvi_state *st, unsigned int dev)
{
struct nvi_dmp_dev *dd;
+ unsigned int en_msk;
int ret = -EINVAL;
+ u32 out_ctl = 0;
dd = nvi_dd(st, dev, -1);
if (dd == NULL)
return -EINVAL;
- if (dd->fn_init)
- ret = dd->fn_init(st, st->en_msk | (st->aux.dmp_en_msk <<
- DEV_N_AUX), NULL);
+ if (dd->fn_init) {
+ en_msk = st->en_msk & MSK_DEV_ALL;
+ en_msk |= (st->aux.dmp_en_msk << DEV_N_AUX);
+ ret = dd->fn_init(st, &out_ctl, en_msk, 0);
+ }
return ret;
}
unsigned int j;
unsigned int k;
- if (st->aux.port[0].nmp.type != SECONDARY_SLAVE_TYPE_COMPASS)
+ if (st->aux.port[AUX_PORT_DEV_GMF].nmp.type !=
+ SECONDARY_SLAVE_TYPE_COMPASS)
return -EINVAL;
- nmp = &st->aux.port[0].nmp;
+ nmp = &st->aux.port[AUX_PORT_DEV_GMF].nmp;
for (i = 0; i < AXIS_N; i++) {
for (j = 0; j < AXIS_N; j++)
mtrx[AXIS_N * j + i] =
static int nvi_dd_able(struct nvi_state *st,
unsigned int en_msk, unsigned int irq_msk)
{
- u16 evnt_ctl = 0;
+#if ICM_DMP_FW_VER == 2
+ u32 wtf_8a = 0;
+#endif /* ICM_DMP_FW_VER == 2 */
+ u32 evnt_ctl = 0;
u32 out_ctl = 0;
struct nvi_dmp_dev *dd;
bool en;
int ret;
st->en_msk &= ~MSK_DEV_SNSR;
- ret = nvi_dmp_period(st, en_msk);
- if (ret)
- return ret;
+ for (i = 0; i < st->hal->src_n; i++) {
+ st->src[i].period_us_min = st->hal->src[i].period_us_min;
+ st->src[i].period_us_max = st->hal->src[i].period_us_max;
+ }
for (i = 0; i < ARRAY_SIZE(nvi_dmp_devs); i++) {
dd = &nvi_dmp_devs[i];
}
if (en) {
if (dd->fn_init) {
- ret = dd->fn_init(st, en_msk, &out_ctl);
+ ret = dd->fn_init(st, &out_ctl,
+ en_msk, irq_msk);
if (ret < 0)
return ret;
}
if (en) {
- if (dd->out_ctl && (irq_msk & (1 << dd->dev)))
- out_ctl |= dd->out_ctl;
+ if (dd->int_ctl && (irq_msk & (1 << dd->dev)))
+ out_ctl |= (dd->int_ctl << 16);
st->snsr[dd->dev].buf_n = dd->buf_n;
st->snsr[dd->dev].buf_shft = dd->buf_shft;
} else {
}
st->aux.dmp_en_msk = en_msk >> DEV_N_AUX;
+ /* WAR: run all timestamp/IRQ timing off SRC_ACC (always on) */
+ en_msk |= (1 << DEV_ACC);
+ ret = nvi_dmp_period(st, &out_ctl, en_msk, irq_msk);
+ if (ret)
+ return ret;
+
if (st->aux.dmp_en_msk) {
ret = nvi_aux_enable(st, __func__, true, true);
if (ret)
if (out_ctl & DMP_DATA_OUT_CTL_HDR2_MSK)
/* header 2 needs to be enabled */
- out_ctl |= DMP_DATA_OUT_CTL_HDR2_BIT;
+ out_ctl |= (HEADER2_SET << 16);
ret = nvi_mem_wr_be_mc(st, DATA_OUT_CTL1, 4, out_ctl,
&st->mc.icm.data_out_ctl);
if (ret)
return ret;
/* inv_enable_accel_cal_V3 */
- /* inv_enable_gyro_cal_V3 */
if (en_msk & (1 << DEV_ACC))
- evnt_ctl |= (ACCEL_CAL_EN | GYRO_CAL_EN);
+ evnt_ctl |= ACCEL_CAL_EN;
+ /* inv_enable_gyro_cal_V3 */
+ if (en_msk & (1 << DEV_GYR))
+ evnt_ctl |= GYRO_CAL_EN;
/* inv_enable_compass_cal_V3 */
- if (en_msk & (0x03 << DEV_N_AUX))
+ if (en_msk & (1 << (DEV_N_AUX + AUX_PORT_DEV_GMF)))
evnt_ctl |= COMPASS_CAL_EN;
/* inv_enable_9axes_V3 */
- if (out_ctl & CPASS_ACCURACY_MASK || en_msk & (1 << DEV_GMR))
+ if (out_ctl & CPASS_ACCURACY_SET || en_msk & (1 << DEV_GMR))
evnt_ctl |= NINE_AXIS_EN;
/* inv_setup_events */
if (en_msk & (1 << DEV_STP))
/* SMD_EN is self-clearing so we don't want it in the cache */
st->mc.icm.motion_event_ctl &= ~SMD_EN;
/* inv_set_wom */
- ret |= nvi_dmp_irq(st, irq_msk & en_msk);
+ ret |= nvi_dmp_irq(st, irq_msk);
+#if ICM_DMP_FW_VER == 2
+ if (en_msk & (1 << DEV_ACC))
+ wtf_8a |= 0x02;
+ if (en_msk & (1 << DEV_GYR))
+ wtf_8a |= 0x01;
+ if (en_msk & MSK_EN_AUX_PORTS)
+ wtf_8a |= 0x08;
+ ret |= nvi_mem_wr_be_mc(st, 0x8A, 2, wtf_8a,
+ &st->mc.icm.wtf_8a);
+#endif /* ICM_DMP_FW_VER == 2 */
if (!ret)
st->en_msk |= (en_msk & ((1 << DEV_N_AUX) - 1));
return ret;
if (dd->dev == DEV_AUX) {
if (st->snsr[DEV_AUX].enable & (1 << dd->aux_port)) {
irq_msk |= (1 << DEV_AUX);
+ irq_msk |= (1 << (dd->aux_port + DEV_N_AUX));
en_msk |= (1 << DEV_AUX);
en_msk |= (1 << (dd->aux_port + DEV_N_AUX));
en_msk |= dd->depend_msk;
if (!st->icm_dmp_war) {
st->icm_dmp_war = true;
+ st->mc_dis = true; /* initialize cache */
ret = nvi_dd_able(st, ICM_DMP_DEV_MSK | MSK_DEV_MPU, irq_msk);
+ st->mc_dis = false; /* enable cache */
}
ret |= nvi_dd_able(st, en_msk, irq_msk);
if (!ret) {
0xCA, 0xF2, 0x35, 0xF1, 0x96, 0x8F, 0xA6, 0xD9,
0x00, 0xD8, 0xF1, 0xFF
};
-#else /* ICM_DMP_FW_VER */
-/* ICM_DMP_FW_VER == 1 */
+#elif ICM_DMP_FW_VER == 1
static const u8 const dmp_fw_20628[] = {
/* bank 0: 0x0090 */
0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0xF1, 0xCA, 0xF2, 0x35, 0xF1, 0x96, 0x8F, 0xA6,
0xD9, 0x00, 0xD8, 0xF1, 0xFF
};
+#else /* ICM_DMP_FW_VER == 2 */
+static const u8 const dmp_fw_20628[] = {
+ /* bank 0: 0x0090 */
+ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x05, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00,
+ 0x00, 0x05, 0x00, 0x07, 0x00, 0x05, 0x00, 0xFF,
+ 0xFF, 0xF7, 0x00, 0x05, 0x00, 0x05, 0x00, 0x05,
+ 0x00, 0x05, 0x00, 0x05, 0x00, 0x05, 0x00, 0x05,
+ 0x80, 0x00, 0x80, 0x00, 0x40, 0x00, 0x40, 0x00,
+ 0x20, 0x00, 0x20, 0x00, 0x10, 0x00, 0x10, 0x00,
+ 0x08, 0x00, 0x08, 0x00, 0x04, 0x00, 0x04, 0x00,
+ 0x02, 0x00, 0x02, 0x00, 0x01, 0x00, 0x01, 0x00,
+ 0x00, 0x80, 0x00, 0x80, 0x00, 0x40, 0x00, 0x40,
+ 0x00, 0x20, 0x00, 0x20, 0x00, 0x10, 0x00, 0x10,
+ 0x00, 0x08, 0x00, 0x08, 0x00, 0x04, 0x00, 0x04,
+ 0x00, 0x02, 0x00, 0x02, 0x00, 0x01, 0x00, 0x01,
+ /* bank 1: 0x0100 */
+ 0x00, 0x00, 0x03, 0x84, 0x00, 0x00, 0x9C, 0x40,
+ 0xFE, 0xF8, 0x56, 0xBE, 0x04, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x13, 0x5C, 0x28, 0xF6, 0x0C, 0xF5, 0xC2, 0x8F,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0xFF, 0xF8, 0x00, 0x38,
+ 0x04, 0xF6, 0xE8, 0xF4, 0x00, 0x00, 0x68, 0x00,
+ 0x00, 0x01, 0xFF, 0xC7, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x01, 0x47, 0xAE, 0x14,
+ 0x3E, 0xB8, 0x51, 0xEC, 0x00, 0x0F, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x01, 0x00, 0x00, 0x01, 0x0C, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0xD6, 0x2B, 0x80,
+ 0x00, 0x00, 0x00, 0x52, 0x00, 0x57, 0x0A, 0x3D,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xCC,
+ 0x00, 0x00, 0x00, 0x01, 0x00, 0x06, 0x00, 0x01,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x50, 0x50, 0x50, 0x3F, 0xAF, 0xAF, 0xB0,
+ 0x02, 0x00, 0x00, 0x00, 0x36, 0x66, 0x66, 0x66,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0xD6, 0x2B, 0x80,
+ 0x8E, 0x17, 0x00, 0x07, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ /* bank 2: 0x0200 */
+ 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x7F, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x07, 0x80,
+ 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x3E, 0x03, 0x30, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x9C, 0x40, 0x0C, 0xCC, 0xCC, 0xCD,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x60, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x3E, 0xB8, 0x51, 0xEC, 0x01, 0x47, 0xAE, 0x14,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x33, 0x33, 0x33, 0x33, 0x0C, 0xCC, 0xCC, 0xCD,
+ 0x00, 0x00, 0x00, 0x00, 0x01, 0x02, 0x4B, 0xD1,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0A,
+ 0x06, 0xD5, 0x8E, 0x27, 0xE1, 0x05, 0x86, 0xB2,
+ 0x38, 0xB3, 0x8D, 0x1F, 0xCF, 0x87, 0xC3, 0x8F,
+ 0x06, 0xD5, 0x8E, 0x27, 0x1F, 0xA1, 0xAB, 0x12,
+ 0x3A, 0x50, 0xFF, 0xCB, 0x31, 0x7D, 0xD5, 0x43,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ /* bank 3: 0x0300 */
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00,
+ 0x00, 0x06, 0x36, 0x38, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x17, 0x8D, 0xF2,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x07, 0x00, 0x10, 0x00, 0x96, 0x00, 0x3C,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x0C, 0xC1, 0xD5, 0x21, 0xCB, 0xCF, 0x2A, 0x67,
+ 0x51, 0xF6, 0x2F, 0x9C, 0xC5, 0x87, 0x95, 0xAC,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x3D,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x20, 0x31, 0x88, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x03,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x0E, 0x49, 0x6E, 0x64, 0xC5, 0x92, 0x24, 0x82,
+ 0x59, 0xFA, 0xEE, 0x8D, 0xC2, 0x29, 0xFE, 0xD7,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02,
+ 0x00, 0x00, 0x00, 0x14, 0x00, 0x28, 0xCC, 0xCC,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ /* bank 4: 0x0400 */
+ 0x00, 0x00, 0x00, 0xA3, 0x00, 0x00, 0x00, 0x02,
+ 0x00, 0x00, 0x00, 0x3A, 0x03, 0xE8, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x03, 0x3F, 0xC1, 0xA7, 0x68,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x80, 0x00, 0x20, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x01, 0x5E, 0x00, 0x00, 0x00, 0xFA,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x13, 0x33, 0x33, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x32, 0x00, 0x00, 0x00, 0x05,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x02, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00,
+ 0x00, 0x00, 0x7F, 0xFF, 0x00, 0x00, 0x20, 0x00,
+ /* bank 5: 0x0500 */
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x80, 0x00, 0x00, 0x10, 0x00, 0x00,
+ 0x00, 0x00, 0x61, 0xA8, 0x00, 0x00, 0x00, 0x10,
+ 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x10, 0x00,
+ 0x00, 0x01, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00,
+ 0x00, 0x40, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, 0x00,
+ 0x00, 0x00, 0x2E, 0xE0, 0x00, 0x06, 0x40, 0x00,
+ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01,
+ 0x03, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x33, 0x33, 0x33, 0x33, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x0C, 0xCC, 0xCC, 0xCD, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x9D, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ /* bank 6: 0x0600 */
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x32, 0x00, 0x00, 0x00, 0x32, 0x00, 0x00,
+ 0x00, 0x32, 0x00, 0x00, 0x00, 0x32, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x32, 0x00, 0x00, 0x00, 0x32, 0x00, 0x00,
+ 0x00, 0x32, 0x00, 0x00, 0x00, 0x32, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x01, 0x49, 0x1B, 0x75,
+ 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x06, 0x40, 0x00, 0x00, 0x0C, 0xCD,
+ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ /* bank 7: 0x0700 */
+ 0x00, 0x00, 0x50, 0x00, 0x00, 0x00, 0x00, 0x01,
+ 0x00, 0x00, 0x16, 0x00, 0x00, 0x00, 0x00, 0x46,
+ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x80, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00,
+ 0x00, 0x80, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x01,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0xD4, 0xC0,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02,
+ 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x01, 0x3C,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ /* bank 8: 0x0800 */
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x3A, 0x98,
+ 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x01, 0x4E,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x01, 0x47, 0xAE, 0x14, 0x4E, 0x40, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x20, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x01, 0x00, 0x00, 0x4E, 0x40, 0x00, 0x00,
+ 0x4A, 0x40, 0x00, 0x00, 0x00, 0x00, 0x0D, 0x06,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0xD8, 0xDC, 0xB8, 0xB0, 0xB4, 0xF3, 0xAA, 0xF8,
+ 0xF9, 0xD1, 0xD9, 0x88, 0x9A, 0xF8, 0xF7, 0x3E,
+ 0xD8, 0xF3, 0x8A, 0x9A, 0xA7, 0x31, 0xD1, 0xD9,
+ 0xF4, 0x08, 0xF7, 0xD8, 0xF3, 0x9F, 0x31, 0xD1,
+ 0xD9, 0xF4, 0x08, 0xF7, 0xDA, 0xF1, 0xFF, 0xD8,
+ 0xF1, 0xA4, 0xDF, 0xA5, 0xDE, 0xF3, 0xA8, 0xDE,
+ /* bank 8: 0x0800 */
+ 0xD0, 0xDF, 0xA4, 0x84, 0x9F, 0x24, 0xF2, 0xA9,
+ 0xF8, 0xF9, 0xD1, 0xDA, 0xDE, 0xA8, 0xDE, 0xDF,
+ 0xDF, 0xDF, 0xD8, 0xF4, 0xB1, 0x8D, 0xF3, 0xA8,
+ 0xD0, 0xB0, 0xB4, 0x8F, 0xF4, 0xB9, 0xAF, 0xD0,
+ 0xC7, 0xBE, 0xBE, 0xB8, 0xAE, 0xD0, 0xF3, 0x9F,
+ 0x75, 0xB2, 0x86, 0xF4, 0xBE, 0xB9, 0xAF, 0xD0,
+ 0xC3, 0xF1, 0xBE, 0xB8, 0xB0, 0xA3, 0xDE, 0xDF,
+ 0xDF, 0xDF, 0xF2, 0xA3, 0x81, 0xC0, 0x80, 0xCD,
+ 0xC7, 0xCF, 0xBC, 0xBD, 0xB4, 0xA3, 0x88, 0x93,
+ 0xF1, 0x62, 0x6E, 0x76, 0x7E, 0xBE, 0xA2, 0x42,
+ 0xA0, 0x4E, 0x56, 0x5E, 0xBE, 0xBE, 0xBC, 0xA3,
+ 0x8B, 0x93, 0x2D, 0x55, 0x7D, 0xA2, 0x86, 0x9D,
+ 0x08, 0xFD, 0x0F, 0xBC, 0xBC, 0xA3, 0x83, 0x92,
+ 0x01, 0xA9, 0x9E, 0x0E, 0x16, 0x1E, 0xBE, 0xBE,
+ 0x99, 0xA5, 0x2C, 0x54, 0x7C, 0xBA, 0xA5, 0x2C,
+ 0x54, 0x7C, 0xBD, 0xBD, 0xBC, 0xBC, 0xB1, 0xB6,
+ 0x83, 0x95, 0xA5, 0xF1, 0x0E, 0x16, 0x1E, 0xB2,
+ 0xA7, 0x85, 0x95, 0x2A, 0xF0, 0x50, 0x78, 0x87,
+ 0x93, 0xF1, 0x01, 0xDA, 0xA5, 0xDF, 0xDF, 0xDF,
+ 0xD8, 0xA4, 0xDF, 0xDF, 0xDF, 0xB0, 0x80, 0xF2,
+ 0xA4, 0xC3, 0xCB, 0xC5, 0xF1, 0xB1, 0x8E, 0x94,
+ 0xA4, 0x0E, 0x16, 0x1E, 0xB2, 0x86, 0xBE, 0xA0,
+ 0x2C, 0x34, 0x3C, 0xBD, 0xBD, 0xB4, 0x96, 0xB8,
+ 0xA1, 0x2C, 0x34, 0x3C, 0xBD, 0xB6, 0x94, 0xBE,
+ 0xA6, 0x2C, 0xFD, 0x35, 0x34, 0xFD, 0x35, 0x3C,
+ 0xFD, 0x35, 0xBE, 0xBC, 0xB2, 0x8E, 0x94, 0xA6,
+ 0x2D, 0x55, 0x7D, 0xBA, 0xA4, 0x2D, 0x55, 0x7D,
+ 0xB8, 0xB0, 0xB4, 0xA6, 0x8F, 0x96, 0x2E, 0x36,
+ 0x3E, 0xBC, 0xBC, 0xBD, 0xA6, 0x86, 0x9F, 0xF5,
+ 0x34, 0x54, 0x74, 0xBC, 0xBE, 0xF1, 0x90, 0xFC,
+ 0xC3, 0x00, 0xD9, 0xF4, 0x0A, 0x5A, 0xD8, 0xF3,
+ 0xA0, 0xDF, 0xF1, 0xBC, 0x86, 0x91, 0xA9, 0x2D,
+ /* bank 9: 0x0900 */
+ 0x55, 0x7D, 0xBC, 0xBC, 0xA9, 0x80, 0x90, 0xFC,
+ 0x51, 0x00, 0x10, 0xFC, 0x51, 0x00, 0x10, 0xFC,
+ 0x51, 0x00, 0x10, 0xFC, 0xC1, 0x04, 0xD9, 0xF2,
+ 0xA0, 0xDF, 0xF4, 0x0A, 0x5A, 0xD8, 0xF6, 0xA0,
+ 0xFA, 0x80, 0x90, 0x38, 0xF3, 0xDE, 0xDA, 0xF8,
+ 0xF4, 0x0A, 0x5A, 0xD8, 0xF1, 0xBD, 0x95, 0xFC,
+ 0xC1, 0x04, 0xD9, 0xBD, 0xBD, 0xF4, 0x0A, 0x5A,
+ 0xDA, 0xBD, 0xBD, 0xD8, 0xF6, 0xBC, 0xBC, 0xBD,
+ 0xBD, 0xBE, 0xBE, 0xB5, 0xA7, 0x84, 0x92, 0x1A,
+ 0xF8, 0xF9, 0xD1, 0xDB, 0x84, 0x93, 0xF7, 0x6A,
+ 0xB6, 0x87, 0x96, 0xF3, 0x09, 0xFF, 0xDA, 0xBC,
+ 0xBD, 0xBE, 0xD8, 0xF3, 0xBC, 0xBC, 0xBD, 0xBD,
+ 0xBE, 0xBE, 0xB9, 0xB2, 0xA9, 0x80, 0xCD, 0xF2,
+ 0xC4, 0xC5, 0xBA, 0xF3, 0xA0, 0xD0, 0xDE, 0xB1,
+ 0xB4, 0xF7, 0xA7, 0x89, 0x91, 0x72, 0x89, 0x91,
+ 0x47, 0xB6, 0x97, 0x4A, 0xB9, 0xF2, 0xA9, 0xD0,
+ 0xFA, 0xF9, 0xD1, 0xD9, 0xF4, 0x0A, 0x8E, 0xD8,
+ 0xF3, 0xBA, 0xA7, 0xF9, 0xDB, 0xFB, 0xD9, 0xF1,
+ 0xB9, 0xB0, 0x81, 0xA9, 0xC3, 0xF2, 0xC5, 0xF3,
+ 0xBA, 0xA0, 0xD0, 0xF8, 0xD8, 0xF1, 0xB1, 0x89,
+ 0xA7, 0xDF, 0xDF, 0xDF, 0xF2, 0xA7, 0xC3, 0xCB,
+ 0xC5, 0xF1, 0xB2, 0xB5, 0xB9, 0x87, 0x97, 0xA5,
+ 0x22, 0xF0, 0x48, 0x70, 0x3C, 0x98, 0x40, 0x68,
+ 0x34, 0x58, 0x99, 0x60, 0xF1, 0xBC, 0xB3, 0x8E,
+ 0x95, 0xAA, 0x25, 0x4D, 0x75, 0xBC, 0xBC, 0xB8,
+ 0xB0, 0xB4, 0xA7, 0x88, 0x9F, 0xF7, 0x5A, 0xF9,
+ 0xD9, 0xF1, 0xBA, 0xA5, 0xDF, 0xDF, 0xDF, 0xB8,
+ 0xDA, 0xF3, 0xA8, 0xF8, 0x88, 0x9D, 0xD0, 0x7C,
+ 0xD8, 0xF7, 0xA7, 0x88, 0x9F, 0x52, 0xF9, 0xD9,
+ 0xF1, 0xBA, 0xA4, 0xDF, 0xDF, 0xDF, 0xB8, 0xDA,
+ 0xF3, 0xA8, 0x88, 0x9C, 0xD0, 0xDF, 0x68, 0x70,
+ 0x9D, 0x60, 0x70, 0x78, 0xD8, 0xF7, 0xA7, 0x88,
+ /* bank 10: 0x0A00 */
+ 0x9F, 0x42, 0xF9, 0xBA, 0xA0, 0xD0, 0xF3, 0xD9,
+ 0xDE, 0xD8, 0xF8, 0xF9, 0xD1, 0xB8, 0xDA, 0xA8,
+ 0x88, 0x9E, 0xD0, 0x64, 0x68, 0xD8, 0xA8, 0x84,
+ 0x98, 0xD0, 0xF7, 0x7E, 0xF0, 0xB2, 0xB6, 0xBA,
+ 0x85, 0x91, 0xA7, 0x24, 0x70, 0x59, 0x44, 0x69,
+ 0x38, 0x64, 0x48, 0x31, 0x2D, 0x51, 0x79, 0x87,
+ 0xF1, 0xA1, 0x00, 0x2C, 0x54, 0x7C, 0xF0, 0x81,
+ 0xA7, 0x04, 0x28, 0x50, 0x78, 0xFD, 0x7F, 0xF1,
+ 0xA7, 0x87, 0x96, 0x59, 0x91, 0xA1, 0x02, 0x0E,
+ 0x16, 0x1E, 0xF0, 0x84, 0x91, 0xA7, 0x24, 0x70,
+ 0x59, 0x44, 0x69, 0x38, 0x64, 0x48, 0x31, 0x2D,
+ 0x51, 0x79, 0xA2, 0x87, 0x0D, 0x20, 0x59, 0x70,
+ 0x15, 0x38, 0x40, 0x69, 0xA4, 0xF1, 0x62, 0xF0,
+ 0x19, 0x31, 0x48, 0xB8, 0xB1, 0xB4, 0xF1, 0xA6,
+ 0x80, 0xC6, 0xF4, 0xB0, 0x81, 0xF3, 0xA7, 0xC6,
+ 0xB1, 0x8F, 0x97, 0xF7, 0x02, 0xF9, 0xDA, 0xF4,
+ 0x0B, 0xBD, 0xD8, 0xB0, 0xF7, 0xA7, 0x88, 0x9F,
+ 0x52, 0xF9, 0xD9, 0xF4, 0x0B, 0xB6, 0xD8, 0xF1,
+ 0xB2, 0xB6, 0xA6, 0x82, 0x92, 0x2A, 0xF0, 0x50,
+ 0xFD, 0x08, 0xF1, 0xA7, 0x84, 0x94, 0x02, 0xFD,
+ 0x08, 0xB0, 0xB4, 0x86, 0x97, 0x00, 0xB1, 0xBA,
+ 0xA7, 0x81, 0x61, 0xD9, 0xF4, 0x0B, 0xF3, 0xD8,
+ 0xF1, 0x41, 0xDA, 0xF4, 0x0B, 0xF3, 0xD8, 0xF1,
+ 0xB8, 0xB2, 0xA6, 0x82, 0xC0, 0xD8, 0xF1, 0xB0,
+ 0xB6, 0x86, 0x92, 0xA7, 0x16, 0xFD, 0x04, 0x0F,
+ 0xFD, 0x04, 0xF0, 0xBA, 0x87, 0x91, 0xA7, 0x24,
+ 0x58, 0x3D, 0x40, 0x34, 0x49, 0x2D, 0x51, 0xB2,
+ 0x87, 0xF1, 0xA1, 0x00, 0x2C, 0x54, 0x7C, 0xF0,
+ 0x81, 0xA7, 0x04, 0x28, 0x50, 0x78, 0xFD, 0x7F,
+ 0xF1, 0xA7, 0x87, 0x96, 0x59, 0x91, 0xA1, 0x02,
+ 0x0E, 0x16, 0x1E, 0xD8, 0xF7, 0xB0, 0xB4, 0xBA,
+ 0x88, 0x9E, 0xA7, 0x6A, 0xF9, 0xD9, 0xF4, 0x0D,
+ /* bank 11: 0x0B00 */
+ 0x0B, 0xD8, 0xF0, 0xB1, 0xB5, 0x8A, 0x9A, 0xA3,
+ 0x2C, 0x50, 0x78, 0xF2, 0xA5, 0xDE, 0xF8, 0xF8,
+ 0xF1, 0xB5, 0xB2, 0xA7, 0x83, 0x90, 0x21, 0xDB,
+ 0xB6, 0xB1, 0x80, 0x93, 0x29, 0xD9, 0xF2, 0xA5,
+ 0xF8, 0xD8, 0xF1, 0xB2, 0xB6, 0xA7, 0x83, 0x93,
+ 0x31, 0xF3, 0xA5, 0xDE, 0xD9, 0xF8, 0xF8, 0xD8,
+ 0xF1, 0xA9, 0x89, 0x99, 0xF0, 0x34, 0x83, 0x38,
+ 0xF1, 0xA7, 0x29, 0xF5, 0x87, 0x90, 0x18, 0xD9,
+ 0xF3, 0xA5, 0xF8, 0xD8, 0xA8, 0x80, 0x91, 0xF0,
+ 0x0C, 0x31, 0x14, 0x28, 0x1C, 0x20, 0x04, 0x39,
+ 0xA7, 0x88, 0x98, 0x04, 0x28, 0x51, 0x79, 0x1D,
+ 0x30, 0x14, 0x38, 0xB1, 0xB8, 0x8A, 0xA7, 0xD0,
+ 0x97, 0x2C, 0x50, 0x50, 0x78, 0x78, 0xBC, 0xBA,
+ 0xB0, 0xA7, 0x85, 0x98, 0x04, 0x28, 0x50, 0x78,
+ 0xF1, 0x84, 0x97, 0x29, 0xD9, 0xBE, 0xB8, 0xA5,
+ 0x8D, 0x98, 0x20, 0x2C, 0x34, 0x3C, 0xBE, 0xBE,
+ 0xBA, 0xAA, 0xDE, 0xDF, 0xF8, 0xF4, 0x0C, 0x95,
+ 0xD8, 0xF1, 0xBA, 0xAA, 0xF8, 0xA7, 0x84, 0x9A,
+ 0x01, 0xD9, 0xAA, 0xDF, 0xF8, 0xD8, 0xF1, 0xBC,
+ 0xBC, 0x9A, 0xFC, 0xC1, 0x04, 0xD9, 0xAA, 0xFB,
+ 0xA6, 0xB2, 0x89, 0x96, 0x42, 0xB4, 0x97, 0xF0,
+ 0x78, 0xA7, 0x86, 0xF1, 0x38, 0xFD, 0x01, 0xB6,
+ 0x97, 0x01, 0xA6, 0xD0, 0xB6, 0x9A, 0x52, 0x87,
+ 0xF0, 0x18, 0xD8, 0xBD, 0xB0, 0xB4, 0xBA, 0x87,
+ 0x96, 0xA7, 0xF5, 0x78, 0xBD, 0xBD, 0xF3, 0xD9,
+ 0xA5, 0xF8, 0xD8, 0xB2, 0xB6, 0xF1, 0xA9, 0x89,
+ 0x93, 0x1A, 0xB0, 0x87, 0x99, 0x60, 0xB8, 0xA7,
+ 0xD0, 0xB2, 0x89, 0xC1, 0xB0, 0xBA, 0xF3, 0xA5,
+ 0xF9, 0xF9, 0xB8, 0xF1, 0xDA, 0xA7, 0xD0, 0xDF,
+ 0xD8, 0xA7, 0xD0, 0xFA, 0xF9, 0xD1, 0xBA, 0xDA,
+ 0xA7, 0x87, 0x90, 0x6A, 0x66, 0xB2, 0xA0, 0x87,
+ 0x01, 0x2C, 0xF0, 0xA7, 0x80, 0x90, 0x04, 0x28,
+ /* bank 12: 0x0C00 */
+ 0xFD, 0x7F, 0xF1, 0xA7, 0x87, 0x96, 0x59, 0x90,
+ 0xA0, 0x02, 0x0E, 0xD8, 0xF0, 0xBA, 0xB2, 0xB6,
+ 0xA8, 0x80, 0x91, 0x0C, 0x31, 0x14, 0x28, 0x1C,
+ 0x20, 0x04, 0x39, 0xD8, 0xF7, 0xB8, 0xB4, 0xB0,
+ 0xA7, 0x9D, 0x88, 0x72, 0xF9, 0xBC, 0xBD, 0xBE,
+ 0xD9, 0xF4, 0x0E, 0x72, 0xD8, 0xF2, 0xB8, 0xAD,
+ 0xF8, 0xF9, 0xD1, 0xDA, 0xDE, 0xBA, 0xA1, 0xDE,
+ 0xAE, 0xDE, 0xF8, 0xD8, 0xF2, 0xB1, 0xB5, 0xB9,
+ 0xAE, 0xF9, 0xDA, 0xF4, 0x0E, 0x59, 0xD8, 0xF2,
+ 0x8E, 0xC2, 0xF1, 0xB2, 0x80, 0x9A, 0xF5, 0xAF,
+ 0x24, 0xD9, 0xF4, 0x0E, 0x59, 0xD8, 0xF5, 0x44,
+ 0xD9, 0xF4, 0x0E, 0x59, 0xD8, 0xF5, 0x64, 0xD9,
+ 0xF4, 0x0E, 0x59, 0xD8, 0xF1, 0xB1, 0xB6, 0x8B,
+ 0x90, 0xAF, 0x2D, 0x55, 0x7D, 0xB5, 0x8C, 0x9F,
+ 0xAD, 0x0E, 0x16, 0x1E, 0x8B, 0x9D, 0xAB, 0x2C,
+ 0x54, 0x7C, 0x8D, 0x9F, 0xAA, 0x2E, 0x56, 0x7E,
+ 0x8A, 0x9C, 0xAA, 0x2C, 0x54, 0x7C, 0x9B, 0xAC,
+ 0x26, 0x46, 0x66, 0xAF, 0x8D, 0x9D, 0x00, 0x9C,
+ 0x0D, 0xDB, 0x11, 0x8F, 0x19, 0xF4, 0x0D, 0x9B,
+ 0xD8, 0x0E, 0x59, 0xD8, 0xF1, 0xB2, 0x81, 0xB6,
+ 0x90, 0xAF, 0x2D, 0x55, 0x7D, 0xB1, 0x8F, 0xB5,
+ 0x9F, 0xAF, 0xF5, 0x2C, 0x54, 0x7C, 0xF1, 0xB2,
+ 0x8C, 0x9F, 0xAD, 0x6D, 0xDB, 0x71, 0x79, 0xF4,
+ 0x0D, 0xC9, 0xD8, 0xF3, 0xBA, 0xA1, 0xDE, 0xF8,
+ 0xF1, 0x80, 0xA1, 0xC3, 0xC5, 0xC7, 0xF4, 0x0D,
+ 0xD8, 0xD8, 0xF3, 0xB6, 0xBA, 0x91, 0xFC, 0xC0,
+ 0x28, 0xDA, 0xA1, 0xF8, 0xD9, 0xF4, 0x0E, 0x59,
+ 0xD8, 0xF3, 0xB9, 0xAE, 0xF8, 0xF9, 0xD1, 0xD9,
+ 0xF8, 0xF4, 0x0E, 0x59, 0xD8, 0xF1, 0xBA, 0xB1,
+ 0xB5, 0xA0, 0x8B, 0x93, 0x3E, 0x5E, 0x7E, 0xAB,
+ 0x83, 0xC0, 0xC5, 0xB2, 0xB6, 0xA3, 0x87, 0xC0,
+ 0xC3, 0xC5, 0xC7, 0xA2, 0x88, 0xC0, 0xC3, 0xC5,
+ /* bank 13: 0x0D00 */
+ 0xC7, 0xA4, 0x86, 0xC0, 0xC3, 0xC5, 0xC7, 0xA5,
+ 0x85, 0xC4, 0xC7, 0xAC, 0x8D, 0xC0, 0xF3, 0xAE,
+ 0xDE, 0xF8, 0xF4, 0x11, 0x36, 0xD8, 0xF1, 0xA7,
+ 0x83, 0xC0, 0xC3, 0xC5, 0xC7, 0xA8, 0x82, 0xC0,
+ 0xC3, 0xC5, 0xC7, 0xA6, 0x84, 0xC0, 0xC3, 0xC5,
+ 0xC7, 0xA5, 0x85, 0xD0, 0xC0, 0xC3, 0x8D, 0x9D,
+ 0xAF, 0x39, 0xD9, 0xF4, 0x0E, 0x59, 0xD8, 0xF1,
+ 0x83, 0xB5, 0x9E, 0xAE, 0x34, 0xFD, 0x0A, 0x54,
+ 0xFD, 0x0A, 0x74, 0xFD, 0x0A, 0xF2, 0xAF, 0xDE,
+ 0xF8, 0xF8, 0xF8, 0xB6, 0x81, 0x9F, 0x05, 0xF8,
+ 0xF9, 0xD1, 0xDA, 0x8F, 0xA1, 0xC0, 0xF4, 0x0E,
+ 0x60, 0xD8, 0xF2, 0xBA, 0xAE, 0xF8, 0xF9, 0xD1,
+ 0xDA, 0xF3, 0xBE, 0xBE, 0xBC, 0xBC, 0xBD, 0xBD,
+ 0xB8, 0xB0, 0xB4, 0xA5, 0x85, 0x9C, 0x08, 0xBE,
+ 0xBC, 0xBD, 0xD8, 0xF7, 0xBC, 0xBC, 0xBD, 0xBD,
+ 0xBB, 0xB4, 0xB0, 0xAF, 0x9E, 0x88, 0x62, 0xF9,
+ 0xBC, 0xBD, 0xD9, 0xF4, 0x10, 0xB4, 0xD8, 0xF1,
+ 0xBC, 0xBC, 0xB1, 0x85, 0xBA, 0xB5, 0xA0, 0x98,
+ 0x06, 0x26, 0x46, 0xBC, 0xB9, 0xB3, 0xB6, 0xF1,
+ 0xAF, 0x81, 0x90, 0x2D, 0x55, 0x7D, 0xB1, 0xB5,
+ 0xAF, 0x8F, 0x9F, 0xF5, 0x2C, 0x54, 0x7C, 0xF1,
+ 0xBB, 0xAF, 0x86, 0x9F, 0x69, 0xDB, 0x71, 0x79,
+ 0xDA, 0xF3, 0xA0, 0xDF, 0xF8, 0xF1, 0xA1, 0xDE,
+ 0xF2, 0xF8, 0xD8, 0xB3, 0xB7, 0xF1, 0x8C, 0x9B,
+ 0xAF, 0x19, 0xD9, 0xAC, 0xDE, 0xF3, 0xA0, 0xDF,
+ 0xF8, 0xD8, 0xAF, 0x80, 0x90, 0x69, 0xD9, 0xA0,
+ 0xFA, 0xF1, 0xB2, 0x80, 0xA1, 0xC3, 0xC5, 0xC7,
+ 0xF2, 0xA0, 0xD0, 0xDF, 0xF8, 0xF4, 0x10, 0x9E,
+ 0xD8, 0xF2, 0xA0, 0xD0, 0xDF, 0xF1, 0xBC, 0xBC,
+ 0xB1, 0xAD, 0x8A, 0x9E, 0x26, 0x46, 0x66, 0xBC,
+ 0xB3, 0xB3, 0xF3, 0xA2, 0xDE, 0xF8, 0xF4, 0x10,
+ 0xBF, 0xD8, 0xF1, 0xAA, 0x8D, 0xC1, 0xF2, 0xA1,
+ /* bank 14: 0x0E00 */
+ 0xF8, 0xF9, 0xD1, 0xDA, 0xF4, 0x0F, 0x2A, 0xD8,
+ 0xF1, 0xAF, 0x8A, 0x9A, 0x21, 0x8F, 0x90, 0xF5,
+ 0x10, 0xDA, 0xF4, 0x0F, 0x2A, 0xD8, 0xF1, 0x91,
+ 0xFC, 0xC0, 0x04, 0xD9, 0xF4, 0x0F, 0x71, 0xD8,
+ 0xF3, 0xA1, 0xDE, 0xF8, 0xA0, 0xDF, 0xF8, 0xF4,
+ 0x10, 0x9E, 0xF3, 0x91, 0xFC, 0xC0, 0x07, 0xD9,
+ 0xF4, 0x0F, 0x71, 0xD8, 0xF1, 0xAF, 0xB1, 0x84,
+ 0x9C, 0x01, 0xB3, 0xB5, 0x80, 0x97, 0xDB, 0xF3,
+ 0x21, 0xB9, 0xA7, 0xD9, 0xF8, 0xF4, 0x0F, 0x71,
+ 0xD8, 0xF3, 0xB9, 0xA7, 0xDE, 0xF8, 0xBB, 0xF1,
+ 0xA3, 0x87, 0xC0, 0xC3, 0xC5, 0xC7, 0xA4, 0x88,
+ 0xC0, 0xC3, 0xC5, 0xC7, 0xA5, 0x89, 0xC0, 0xC3,
+ 0xC5, 0xC7, 0xA6, 0x86, 0xC4, 0xC7, 0xA1, 0x82,
+ 0xC3, 0xC5, 0xC7, 0xF3, 0xA1, 0xDE, 0xF4, 0x10,
+ 0xB4, 0xD8, 0xF1, 0xBB, 0xB3, 0xB7, 0xA1, 0xF8,
+ 0xF9, 0xD1, 0xDA, 0xF2, 0xA0, 0xD0, 0xDF, 0xF8,
+ 0xD8, 0xF1, 0xB9, 0xB1, 0xB6, 0xA8, 0x87, 0x90,
+ 0x2D, 0x55, 0x7D, 0xF5, 0xB5, 0xA8, 0x88, 0x98,
+ 0x2C, 0x54, 0x7C, 0xF1, 0xAF, 0x86, 0x98, 0x29,
+ 0xDB, 0x31, 0x39, 0xF4, 0x10, 0xB4, 0xD8, 0xF1,
+ 0xB3, 0xB6, 0xA7, 0x8A, 0x90, 0x4C, 0x54, 0x5C,
+ 0xBA, 0xA0, 0x81, 0x90, 0x2D, 0x55, 0x7D, 0xBB,
+ 0xF2, 0xA2, 0xF8, 0xF9, 0xD1, 0xDA, 0xDE, 0xF4,
+ 0x10, 0xB4, 0xD8, 0xF1, 0xBA, 0xB0, 0xAB, 0x8F,
+ 0xC0, 0xC7, 0xB3, 0xA3, 0x83, 0xC0, 0xC3, 0xC5,
+ 0xC7, 0xA2, 0x84, 0xC0, 0xC3, 0xC5, 0xC7, 0xA4,
+ 0x85, 0xC0, 0xC3, 0xC5, 0xC7, 0xA5, 0x86, 0xC0,
+ 0xC3, 0xAC, 0x8C, 0xC2, 0xF3, 0xAE, 0xDE, 0xF8,
+ 0xF8, 0xF4, 0x11, 0x36, 0xD8, 0xF1, 0xB2, 0xBB,
+ 0xA3, 0x83, 0xC0, 0xC3, 0xC5, 0xC7, 0xA4, 0x82,
+ 0xC0, 0xC3, 0xC5, 0xC7, 0xA5, 0x84, 0xC0, 0xC3,
+ 0xC5, 0xC7, 0xA6, 0x85, 0xC0, 0xC3, 0xAC, 0x8C,
+ /* bank 15: 0x0F00 */
+ 0xC4, 0xB3, 0xB7, 0xAF, 0x85, 0x95, 0x56, 0xFD,
+ 0x0F, 0x86, 0x96, 0x06, 0xFD, 0x0F, 0xF0, 0x84,
+ 0x9F, 0xAF, 0x4C, 0x70, 0xFD, 0x0F, 0xF1, 0x86,
+ 0x96, 0x2E, 0xFD, 0x0F, 0x84, 0x9F, 0x72, 0xFD,
+ 0x0F, 0xDF, 0xAF, 0x2C, 0x54, 0x7C, 0xAF, 0x8C,
+ 0x69, 0xDB, 0x71, 0x79, 0x8B, 0x9C, 0x61, 0xF4,
+ 0x10, 0x35, 0xDA, 0x10, 0xB4, 0xD8, 0xF1, 0xAB,
+ 0x83, 0x91, 0x28, 0xFD, 0x05, 0x54, 0xFD, 0x05,
+ 0x7C, 0xFD, 0x05, 0xB8, 0xBD, 0xBD, 0xB5, 0xA3,
+ 0x8B, 0x95, 0x05, 0x2D, 0x55, 0xBD, 0xB4, 0xBB,
+ 0xAD, 0x8E, 0x93, 0x0E, 0x16, 0x1E, 0xB7, 0xF3,
+ 0xA2, 0xDE, 0xF8, 0xF8, 0xF4, 0x10, 0xBF, 0xD8,
+ 0xF2, 0xA1, 0xF8, 0xF9, 0xD1, 0xD9, 0xF1, 0xAF,
+ 0x8D, 0x9A, 0x01, 0xF5, 0x8F, 0x90, 0xDB, 0x00,
+ 0xF4, 0x10, 0xB4, 0xDA, 0xF1, 0xAA, 0x8D, 0xC0,
+ 0xAE, 0x8B, 0xC1, 0xC3, 0xC5, 0xA1, 0xDE, 0xA7,
+ 0x83, 0xC0, 0xC3, 0xC5, 0xC7, 0xA8, 0x84, 0xC0,
+ 0xC3, 0xC5, 0xC7, 0xA9, 0x85, 0xC0, 0xC3, 0xC5,
+ 0xC7, 0xA6, 0x86, 0xD0, 0xC0, 0xC3, 0xA2, 0x81,
+ 0xC3, 0xC5, 0xC7, 0xF4, 0x10, 0xB4, 0xF1, 0xBB,
+ 0xB3, 0xA3, 0xDE, 0xDF, 0xDF, 0xDF, 0xA4, 0x8C,
+ 0xC4, 0xC5, 0xC5, 0xC5, 0xA5, 0xDE, 0xDF, 0xDF,
+ 0xDF, 0xA6, 0xDE, 0xDF, 0xD8, 0xF3, 0xB9, 0xAE,
+ 0xDF, 0xBA, 0xAE, 0xDE, 0xBB, 0xA2, 0xDE, 0xD8,
+ 0xF3, 0xA2, 0xF8, 0xF9, 0xD1, 0xD9, 0xF4, 0x11,
+ 0x34, 0xD8, 0xF5, 0xAD, 0x8D, 0x9D, 0x2C, 0x54,
+ 0x7C, 0xF1, 0xAF, 0x49, 0xDA, 0xC3, 0xC5, 0xD9,
+ 0xC5, 0xC3, 0xD8, 0xAF, 0x9F, 0x69, 0xD0, 0xDA,
+ 0xC7, 0xD9, 0x8F, 0xC3, 0x8D, 0xAF, 0xC7, 0xD8,
+ 0xB9, 0xA9, 0x8F, 0x9F, 0xF0, 0x54, 0x78, 0xF1,
+ 0xFD, 0x0F, 0xA6, 0xB1, 0x89, 0xC2, 0xB3, 0xAF,
+ 0x8F, 0x9F, 0x2E, 0xFD, 0x11, 0xB1, 0xB5, 0xA9,
+ /* bank 16: 0x1000 */
+ 0x89, 0x9F, 0x2C, 0xF3, 0xAE, 0xDF, 0xF8, 0xF8,
+ 0xF4, 0x12, 0xEB, 0xD8, 0xF1, 0xAD, 0x86, 0x99,
+ 0x06, 0xFD, 0x10, 0xDF, 0xF8, 0xFD, 0x0F, 0xAD,
+ 0x8D, 0x9D, 0x4C, 0xBB, 0xB3, 0xAD, 0x8F, 0x9D,
+ 0x2A, 0xFD, 0x0F, 0xB7, 0x92, 0xFC, 0xC0, 0x04,
+ 0xD9, 0xF4, 0x0E, 0xF9, 0xD8, 0xFC, 0xC0, 0x08,
+ 0xD9, 0xF4, 0x10, 0x5F, 0xD8, 0xF1, 0xD8, 0xF3,
+ 0xBA, 0xB2, 0xB6, 0xAE, 0xF8, 0xF9, 0xD1, 0xD9,
+ 0xF4, 0x12, 0xE9, 0xD8, 0xF1, 0xAF, 0xDE, 0xF9,
+ 0xFD, 0x0F, 0x80, 0x90, 0x2C, 0x54, 0x7C, 0xA0,
+ 0x2A, 0xF0, 0x50, 0x78, 0xFD, 0x0F, 0xF1, 0xA2,
+ 0x82, 0x9C, 0x00, 0x24, 0x44, 0x64, 0xA9, 0x8F,
+ 0x94, 0xF0, 0x04, 0xFD, 0x0F, 0x0C, 0x30, 0xFD,
+ 0x0F, 0x1C, 0x95, 0x20, 0x48, 0xFD, 0x0F, 0xF1,
+ 0x99, 0xC1, 0x2C, 0x54, 0x7C, 0xAA, 0x82, 0x99,
+ 0x02, 0xFD, 0x0F, 0x2E, 0xFD, 0x0F, 0x56, 0xFD,
+ 0x0F, 0x7E, 0xFD, 0x0F, 0xAC, 0x83, 0x9F, 0xF0,
+ 0x04, 0x28, 0x50, 0x78, 0xFD, 0x0F, 0x8C, 0x90,
+ 0xF1, 0x21, 0xF5, 0x8C, 0x9C, 0x2C, 0xF1, 0xAF,
+ 0xDE, 0xF1, 0x89, 0xAF, 0x9F, 0xFC, 0xC0, 0x00,
+ 0xD9, 0xC1, 0x8A, 0xC1, 0x82, 0xC1, 0xD8, 0xFC,
+ 0xC0, 0x04, 0xD9, 0xC3, 0x8A, 0xC3, 0x82, 0xC3,
+ 0xD8, 0xFC, 0xC0, 0x08, 0xD9, 0xC5, 0x8A, 0xC5,
+ 0x82, 0xC5, 0xD8, 0xFC, 0xC0, 0x0C, 0xD9, 0xC7,
+ 0x8A, 0xC7, 0x82, 0xC7, 0xD8, 0xFC, 0xC0, 0x10,
+ 0xD9, 0xF4, 0x12, 0xA3, 0xD8, 0xF1, 0x8B, 0xAB,
+ 0xD0, 0xC0, 0x9F, 0x2E, 0xFD, 0x0F, 0xA0, 0xDE,
+ 0xAB, 0xD0, 0x90, 0x65, 0xA0, 0x8F, 0x9F, 0x4A,
+ 0xFD, 0x0F, 0xAB, 0x8B, 0x90, 0x00, 0xB9, 0xA9,
+ 0xC1, 0xF3, 0xAE, 0xDF, 0xF8, 0xF4, 0x12, 0xEB,
+ 0xD8, 0xF1, 0xBA, 0xB1, 0xB6, 0x89, 0xAB, 0xC1,
+ 0xB2, 0xAF, 0xD0, 0x8B, 0x9F, 0x3E, 0xFD, 0x0F,
+ /* bank 17: 0x1100 */
+ 0x5A, 0xFD, 0x0F, 0x9F, 0xFC, 0xC0, 0x00, 0xD9,
+ 0xF1, 0x8F, 0xA2, 0xC6, 0xD8, 0xFC, 0xC0, 0x04,
+ 0xD9, 0x8F, 0xA2, 0xC7, 0x84, 0xAB, 0xD0, 0xC0,
+ 0xAF, 0x8A, 0x9B, 0x1E, 0xFD, 0x0F, 0x36, 0xFD,
+ 0x0F, 0xA4, 0x8F, 0x30, 0xAA, 0x9A, 0x40, 0xD8,
+ 0x9F, 0xFC, 0xC0, 0x08, 0xD9, 0x8F, 0xA2, 0xD0,
+ 0xC6, 0x84, 0xAB, 0xD0, 0xC2, 0xAF, 0x8A, 0x9B,
+ 0x1E, 0xFD, 0x0F, 0x56, 0xFD, 0x0F, 0xA4, 0x8F,
+ 0x34, 0xAA, 0x9A, 0x40, 0x84, 0xAB, 0xD0, 0xC4,
+ 0xAF, 0x8A, 0x9B, 0x3E, 0xFD, 0x0F, 0x56, 0xFD,
+ 0x0F, 0xA4, 0xD0, 0x8F, 0x30, 0xAA, 0x9A, 0x4C,
+ 0xD8, 0x9F, 0xFC, 0xC0, 0x0C, 0xD9, 0x8F, 0xA2,
+ 0xD0, 0xC7, 0x84, 0xAB, 0xD0, 0xC6, 0xAF, 0x8A,
+ 0x9B, 0x1E, 0xFD, 0x0F, 0x76, 0xFD, 0x0F, 0xA4,
+ 0xD0, 0x8F, 0x34, 0xAA, 0x9A, 0x40, 0x85, 0xAB,
+ 0xD0, 0xC0, 0xAF, 0x8A, 0x9B, 0x3E, 0xFD, 0x0F,
+ 0x76, 0xFD, 0x0F, 0xA5, 0x8F, 0x30, 0xAA, 0x9A,
+ 0x4C, 0x85, 0xAB, 0xD0, 0xC2, 0xAF, 0x8A, 0x9B,
+ 0x5E, 0xFD, 0x0F, 0x76, 0xFD, 0x0F, 0xA5, 0x8F,
+ 0x34, 0xAA, 0xD0, 0x9A, 0x50, 0xD8, 0xAF, 0xF8,
+ 0xF4, 0x11, 0x99, 0xF1, 0xD8, 0x8B, 0x9C, 0xAF,
+ 0x2A, 0xFD, 0x0F, 0x8A, 0x9F, 0xB9, 0xAF, 0x02,
+ 0xFD, 0x0F, 0x26, 0xFD, 0x0F, 0x46, 0xFD, 0x0F,
+ 0x66, 0xFD, 0x0F, 0x83, 0xB5, 0x9F, 0xBA, 0xA3,
+ 0x00, 0x2C, 0x54, 0x7C, 0xB6, 0x82, 0x92, 0xA0,
+ 0x31, 0xD9, 0xAD, 0xC3, 0xDA, 0xAD, 0xC5, 0xD8,
+ 0x8D, 0xA0, 0x39, 0xDA, 0x82, 0xAD, 0xC7, 0xD8,
+ 0xF3, 0x9E, 0xFC, 0xC0, 0x04, 0xD9, 0xF4, 0x0E,
+ 0x15, 0xD8, 0xFC, 0xC0, 0x08, 0xD9, 0xF4, 0x0F,
+ 0xE4, 0xD8, 0xF1, 0xD8, 0xF1, 0xB9, 0xB1, 0xB5,
+ 0xA9, 0xDE, 0xF8, 0x89, 0x99, 0xAF, 0x31, 0xD9,
+ 0xF4, 0x13, 0x3F, 0xD8, 0xF1, 0x85, 0xAF, 0x29,
+ /* bank 18: 0x1200 */
+ 0xD9, 0x84, 0xA9, 0xC2, 0xD8, 0x85, 0xAF, 0x49,
+ 0xD9, 0x84, 0xA9, 0xC4, 0xD8, 0x85, 0xAF, 0x69,
+ 0xD9, 0x84, 0xA9, 0xC6, 0xD8, 0x89, 0xAF, 0x39,
+ 0xDA, 0x8E, 0xA9, 0x50, 0xF4, 0x13, 0x3F, 0xD8,
+ 0xF1, 0x89, 0xAA, 0x7C, 0xFD, 0x02, 0x9A, 0x68,
+ 0xD8, 0xF1, 0xAA, 0xFB, 0xDA, 0x89, 0x99, 0xAF,
+ 0x26, 0xFD, 0x0F, 0x8F, 0x95, 0x25, 0x89, 0x9F,
+ 0xA9, 0x12, 0xFD, 0x0F, 0xF4, 0x13, 0x28, 0xD8,
+ 0xF3, 0x9E, 0xFC, 0xC1, 0x04, 0xD9, 0xF4, 0x11,
+ 0xF0, 0xD8, 0xFC, 0xC1, 0x08, 0xD9, 0xF4, 0x11,
+ 0x0B, 0xD8, 0xF1, 0xBE, 0xBC, 0xBC, 0xBD, 0xBD,
+ 0xF7, 0xB8, 0xB4, 0xB0, 0xAC, 0x84, 0x9D, 0x12,
+ 0xF9, 0xF2, 0xBC, 0xBC, 0x8A, 0xA7, 0xD0, 0xD9,
+ 0xC3, 0xDA, 0xC5, 0xD8, 0xBC, 0xBD, 0xBD, 0xF3,
+ 0x8F, 0xA8, 0xC0, 0xF9, 0xAC, 0x84, 0x97, 0xF5,
+ 0x1A, 0xF1, 0xF8, 0xF9, 0xD1, 0xDA, 0xA8, 0xDE,
+ 0xD8, 0x95, 0xFC, 0xC1, 0x03, 0xD9, 0xA8, 0xDE,
+ 0xD8, 0xBC, 0xBC, 0xF1, 0x98, 0xFC, 0xC0, 0x1C,
+ 0xDB, 0x95, 0xFC, 0xC0, 0x03, 0xA5, 0xDE, 0xA4,
+ 0xDE, 0xD8, 0xAC, 0x88, 0x95, 0x00, 0xD1, 0xD9,
+ 0xA5, 0xF8, 0xD8, 0xA4, 0xFC, 0x80, 0x04, 0x88,
+ 0x95, 0xA4, 0xFC, 0x08, 0x04, 0x20, 0xF7, 0xBC,
+ 0xBD, 0xB5, 0xAC, 0x84, 0x9F, 0xF6, 0x02, 0xF8,
+ 0xF9, 0xD1, 0xDB, 0x84, 0x93, 0xF7, 0x6A, 0xF9,
+ 0xD9, 0xF3, 0xBC, 0xBC, 0xA8, 0x88, 0x92, 0x18,
+ 0xBC, 0xD8, 0xBC, 0xBC, 0xB4, 0xA8, 0x88, 0x9E,
+ 0x08, 0xF4, 0xBE, 0xA1, 0xD0, 0xBC, 0xF7, 0xBE,
+ 0xBE, 0xB5, 0xAC, 0x84, 0x93, 0x6A, 0xF9, 0xBD,
+ 0xBD, 0xB4, 0xD9, 0xF2, 0xAC, 0x8C, 0x97, 0x18,
+ 0xF6, 0x84, 0x9C, 0x02, 0xF8, 0xF9, 0xDB, 0xD1,
+ 0xF1, 0xA5, 0xDF, 0xD8, 0xF7, 0xBE, 0xBD, 0xA7,
+ 0x9D, 0x88, 0x7A, 0xF9, 0xD9, 0xF4, 0x15, 0x8B,
+ /* bank 19: 0x1300 */
+ 0xD8, 0xF1, 0xBE, 0xBE, 0xAC, 0xDE, 0xDF, 0xAC,
+ 0x88, 0x9F, 0xF7, 0x5A, 0x56, 0xF1, 0xBC, 0xBC,
+ 0xBD, 0xBD, 0x95, 0xFC, 0xC0, 0x07, 0xDA, 0xF4,
+ 0x15, 0x2C, 0xD8, 0xF1, 0xFC, 0xC0, 0x00, 0xDB,
+ 0x9C, 0xFC, 0xC1, 0x00, 0xF4, 0x15, 0x51, 0xD8,
+ 0xF1, 0xAC, 0x95, 0xFC, 0xC0, 0x08, 0xDA, 0xF4,
+ 0x14, 0x72, 0xD8, 0xF1, 0x82, 0x90, 0x79, 0x2D,
+ 0x55, 0xF5, 0x8C, 0x9C, 0x04, 0xAC, 0x2C, 0x54,
+ 0xF1, 0xBC, 0xBC, 0x80, 0x5D, 0xDB, 0x49, 0x51,
+ 0xF4, 0xBC, 0x14, 0x50, 0xDA, 0xBC, 0x15, 0x28,
+ 0xD8, 0xF5, 0x86, 0x98, 0x38, 0xD9, 0xF1, 0x82,
+ 0x90, 0x2D, 0xD8, 0xAC, 0xD0, 0x86, 0x98, 0xF5,
+ 0x5C, 0xD9, 0xF1, 0x82, 0x90, 0x55, 0xD8, 0xAC,
+ 0x8C, 0x9C, 0x00, 0x00, 0xA5, 0xDF, 0xF8, 0xF4,
+ 0x14, 0x7D, 0xD8, 0xF1, 0x82, 0x96, 0x2D, 0x55,
+ 0x7D, 0x8C, 0x9C, 0x34, 0x18, 0xF1, 0xAC, 0x95,
+ 0xF5, 0x1C, 0xD9, 0xF4, 0x15, 0x28, 0xD8, 0xF1,
+ 0xAC, 0x83, 0x90, 0x45, 0xD9, 0xA0, 0xF8, 0xAC,
+ 0x8C, 0x9C, 0x06, 0xD2, 0xA1, 0x91, 0x00, 0x2C,
+ 0x81, 0xD6, 0xF0, 0xA1, 0xD0, 0x8C, 0x9C, 0x28,
+ 0xD3, 0x87, 0xD4, 0xA7, 0x8C, 0x20, 0xD3, 0xF1,
+ 0xA4, 0x84, 0x90, 0x2C, 0x54, 0x7C, 0xD8, 0xAC,
+ 0x83, 0x90, 0x45, 0xD9, 0xF4, 0x15, 0x51, 0xD8,
+ 0xF1, 0xAC, 0x81, 0x91, 0x02, 0xFD, 0x18, 0x85,
+ 0x66, 0xFD, 0x1F, 0x88, 0x4E, 0xFD, 0x1D, 0x87,
+ 0xD4, 0xFD, 0x56, 0xF0, 0x81, 0x9C, 0xAB, 0xD6,
+ 0xFD, 0x08, 0x31, 0x8C, 0x10, 0x10, 0x01, 0x01,
+ 0x01, 0x39, 0xAC, 0x8B, 0x98, 0xF5, 0x08, 0xD9,
+ 0xF4, 0x15, 0x28, 0xD8, 0xF1, 0xA9, 0x82, 0x96,
+ 0x01, 0x95, 0xFC, 0xC1, 0x00, 0xDA, 0xF4, 0x15,
+ 0x00, 0xDB, 0xF1, 0xAC, 0x89, 0x93, 0xF5, 0x18,
+ 0xF1, 0xA5, 0xDF, 0xF8, 0xD8, 0xF4, 0x15, 0x2C,
+ /* bank 20: 0x1400 */
+ 0xD8, 0xF1, 0xA4, 0x84, 0x95, 0x34, 0xFD, 0x08,
+ 0x54, 0xFD, 0x08, 0x74, 0xFD, 0x08, 0xA9, 0x94,
+ 0xF5, 0x2C, 0x54, 0x7C, 0xF1, 0xAC, 0x87, 0x99,
+ 0x49, 0xDB, 0x51, 0x59, 0x84, 0xAB, 0xC3, 0xC5,
+ 0xC7, 0x82, 0xA6, 0xC0, 0xF3, 0xAA, 0xDF, 0xF8,
+ 0xD8, 0xF1, 0xA5, 0xDF, 0xD8, 0xF1, 0xA0, 0xDE,
+ 0xA1, 0xDE, 0xDF, 0xDF, 0xDF, 0xA7, 0xDE, 0xDF,
+ 0xA4, 0xDF, 0xDF, 0xDF, 0xA2, 0x95, 0xFC, 0xC0,
+ 0x01, 0xD9, 0x80, 0xC3, 0xC5, 0xC7, 0xA8, 0x83,
+ 0xC1, 0xDA, 0x86, 0xC3, 0xC5, 0xC7, 0xA8, 0x83,
+ 0xC3, 0xD8, 0xF1, 0x9A, 0xFC, 0xC1, 0x04, 0xD9,
+ 0xAC, 0x82, 0x96, 0x01, 0xF3, 0xAA, 0xDE, 0xF8,
+ 0xF8, 0xF8, 0xDB, 0xF5, 0xAC, 0x8C, 0x9A, 0x18,
+ 0xF3, 0xAA, 0xF9, 0xD8, 0xAC, 0x8A, 0x9A, 0x41,
+ 0xD1, 0xAA, 0xD0, 0xC0, 0xD9, 0xF2, 0xAC, 0x85,
+ 0x9A, 0x41, 0xDB, 0xD1, 0xBC, 0xBD, 0xBE, 0xF4,
+ 0x15, 0x8B, 0xD8, 0xF3, 0xBC, 0xBD, 0xBE, 0xA5,
+ 0x85, 0x9C, 0x10, 0xD8, 0xF1, 0xBB, 0xB2, 0xB6,
+ 0xF2, 0xBE, 0xA1, 0xF8, 0xF9, 0xD1, 0xBE, 0xBE,
+ 0xBA, 0xDA, 0xA5, 0xDE, 0xD8, 0xA7, 0x82, 0x95,
+ 0x65, 0xD1, 0x85, 0xA2, 0xD0, 0xC1, 0xD9, 0xB5,
+ 0xA7, 0x86, 0x93, 0x31, 0xDB, 0xD1, 0xF4, 0x15,
+ 0xBA, 0xD8, 0xF3, 0xB8, 0xB0, 0xB4, 0xA5, 0x85,
+ 0x9C, 0x18, 0xD8, 0xF1, 0xBA, 0xB2, 0xB6, 0x81,
+ 0x96, 0xA1, 0xF8, 0xF9, 0xB9, 0xA6, 0xDA, 0xC3,
+ 0xC5, 0xC7, 0xD9, 0x2D, 0x4D, 0x6D, 0xD8, 0xBA,
+ 0x88, 0xA8, 0xF8, 0xF9, 0xA7, 0xDA, 0xC3, 0xC5,
+ 0xC7, 0xD9, 0x2D, 0x4D, 0x6D, 0xD8, 0xF2, 0xB0,
+ 0xB9, 0xA3, 0xFA, 0xF9, 0xD1, 0xDA, 0xB8, 0x8F,
+ 0xA7, 0xC0, 0xF9, 0xB5, 0x87, 0x93, 0xF6, 0x0A,
+ 0xF2, 0xB4, 0xA4, 0x84, 0x97, 0x24, 0xA4, 0x84,
+ 0x9E, 0x3C, 0xD8, 0xF7, 0xB9, 0xB0, 0xB5, 0xA6,
+ /* bank 21: 0x1500 */
+ 0x88, 0x95, 0x5A, 0xF9, 0xDA, 0xF1, 0xAB, 0xF8,
+ 0xD8, 0xB8, 0xB4, 0xF3, 0x98, 0xFC, 0xC0, 0x04,
+ 0xDA, 0xF4, 0x16, 0x64, 0xD8, 0xF2, 0xA9, 0xD0,
+ 0xF8, 0x89, 0x9B, 0xA7, 0x51, 0xD9, 0xA9, 0xD0,
+ 0xDE, 0xA4, 0x84, 0x9E, 0x2C, 0xD8, 0xA8, 0xFA,
+ 0x88, 0x9A, 0xA7, 0x29, 0xD9, 0xA8, 0xDF, 0xA4,
+ 0x84, 0x9D, 0x34, 0xD8, 0xA8, 0xD0, 0xF8, 0x88,
+ 0x9A, 0xA7, 0x51, 0xD9, 0xA8, 0xD0, 0xDE, 0xA4,
+ 0x84, 0x9D, 0x2C, 0xD8, 0xA8, 0xD0, 0xFA, 0x88,
+ 0x9A, 0xA7, 0x79, 0xD9, 0xA8, 0xD0, 0xDF, 0xA4,
+ 0x84, 0x9D, 0x24, 0xD8, 0xF3, 0xA9, 0xD0, 0xF8,
+ 0x89, 0x9B, 0xA7, 0x51, 0xD9, 0xA9, 0xD0, 0xDE,
+ 0xA4, 0x84, 0x9C, 0x2C, 0xD8, 0xF7, 0xA7, 0x88,
+ 0x9F, 0x52, 0xF9, 0xD9, 0xF4, 0x16, 0xA1, 0xD8,
+ 0xF1, 0xB9, 0xA2, 0xFA, 0xF3, 0xB8, 0xA9, 0xD0,
+ 0xFA, 0x89, 0x9B, 0xA7, 0x79, 0xD9, 0xA9, 0xD0,
+ 0xDF, 0xA4, 0x84, 0x9C, 0x24, 0xD8, 0xA7, 0x84,
+ 0x9D, 0xF7, 0x12, 0xF9, 0xD9, 0xF4, 0x16, 0xA1,
+ 0xD8, 0xF2, 0xA8, 0xD0, 0xF8, 0x88, 0x9A, 0xA7,
+ 0x51, 0xD9, 0xA8, 0xD0, 0xDE, 0xA4, 0x84, 0x9D,
+ 0x2C, 0xD8, 0xF7, 0xA7, 0x88, 0x9F, 0x42, 0xF9,
+ 0xD9, 0xF4, 0x16, 0xE8, 0xD8, 0xF3, 0xA9, 0xF8,
+ 0x89, 0x9B, 0xA7, 0x01, 0xD9, 0xA9, 0xDE, 0xA4,
+ 0x84, 0x9C, 0x3C, 0xD8, 0xA9, 0xFA, 0x89, 0x9B,
+ 0xA7, 0x29, 0xD9, 0xA9, 0xDF, 0xA4, 0x84, 0x9C,
+ 0x34, 0xD8, 0xF2, 0xA9, 0xFA, 0x89, 0x9B, 0xA7,
+ 0x29, 0xD9, 0xA9, 0xDF, 0xA4, 0x84, 0x9E, 0x34,
+ 0xD8, 0xA9, 0xD0, 0xFA, 0x89, 0x9B, 0xA7, 0x79,
+ 0xD9, 0xA9, 0xD0, 0xDF, 0xA4, 0x84, 0x9E, 0x24,
+ 0xD8, 0xF2, 0xA4, 0x84, 0x9D, 0x3C, 0xF1, 0xA7,
+ 0xDE, 0xF2, 0x84, 0xCA, 0x97, 0xA4, 0x24, 0xA5,
+ 0x94, 0xF6, 0x0A, 0xF7, 0x85, 0x02, 0xF8, 0xF9,
+ /* bank 22: 0x1600 */
+ 0xD1, 0xD9, 0xF6, 0x9B, 0x02, 0xD8, 0xA7, 0xB1,
+ 0x80, 0x95, 0x42, 0xF8, 0xF9, 0xD1, 0xD9, 0xF4,
+ 0x18, 0x5B, 0xD8, 0xF0, 0xB0, 0x85, 0xA4, 0xD0,
+ 0xC0, 0xDD, 0xF2, 0xC0, 0xDC, 0xF6, 0xA7, 0x9F,
+ 0x02, 0xF9, 0xD9, 0xF3, 0xA5, 0xDE, 0xDA, 0xF0,
+ 0xDD, 0xF2, 0xC8, 0xDC, 0xD8, 0x85, 0x95, 0xA5,
+ 0x00, 0xD9, 0x86, 0xF0, 0xDD, 0xF2, 0xCA, 0xCC,
+ 0xCE, 0xDC, 0xD8, 0x85, 0x00, 0xD9, 0x80, 0xF0,
+ 0xDD, 0xF2, 0xCC, 0xC6, 0xCE, 0xDC, 0xD8, 0x85,
+ 0x00, 0xD9, 0xB1, 0x89, 0xF0, 0xDD, 0xF2, 0xC2,
+ 0xCA, 0xC4, 0xDC, 0xD8, 0xB0, 0x85, 0x00, 0xD9,
+ 0x81, 0xF0, 0xDD, 0xF2, 0xC6, 0xCE, 0x82, 0xC0,
+ 0xC8, 0xDC, 0xD8, 0x85, 0x00, 0xB1, 0xD9, 0x86,
+ 0xF0, 0xDD, 0xF1, 0xC2, 0xC4, 0xC6, 0xDC, 0xD8,
+ 0xB0, 0xF2, 0x85, 0x00, 0xD9, 0xB2, 0x87, 0xF0,
+ 0xDD, 0xF1, 0xC2, 0xC4, 0xC6, 0xF2, 0xB2, 0x86,
+ 0xC4, 0xDC, 0xD8, 0xB0, 0x85, 0x00, 0xB1, 0xD9,
+ 0x8F, 0xF0, 0xDD, 0xF2, 0xC2, 0xC4, 0xC6, 0xDC,
+ 0xD8, 0xB0, 0x85, 0x00, 0x00, 0xD9, 0x82, 0xF0,
+ 0xDD, 0xF2, 0xC2, 0xCA, 0xC4, 0xDC, 0xD8, 0x85,
+ 0x00, 0xD9, 0x85, 0xF0, 0xDD, 0xF1, 0xC2, 0xC4,
+ 0xC6, 0xDC, 0xD8, 0xF2, 0x85, 0x00, 0xD9, 0xB1,
+ 0x8A, 0xF0, 0xDD, 0xF1, 0xC2, 0xC4, 0xC6, 0xDC,
+ 0xD8, 0xB0, 0xF2, 0x85, 0x00, 0xD9, 0xB1, 0xF0,
+ 0xDD, 0xF1, 0x82, 0xC4, 0xDC, 0xD8, 0xB0, 0xF3,
+ 0xA5, 0xF8, 0xF9, 0xD1, 0xD9, 0xF4, 0x18, 0x10,
+ 0xD8, 0xF3, 0x85, 0x95, 0xA5, 0x00, 0x00, 0xD9,
+ 0xBE, 0xF2, 0xBA, 0xAE, 0xDE, 0xBE, 0xBE, 0xBC,
+ 0xB2, 0x81, 0xF0, 0xDD, 0xF3, 0xC8, 0xDC, 0xBC,
+ 0xBC, 0xD8, 0xB0, 0xB8, 0x85, 0xA5, 0x00, 0xD9,
+ 0xF2, 0xBE, 0xBE, 0xAA, 0xDE, 0xBE, 0xBC, 0xBC,
+ 0x8A, 0xF0, 0xDD, 0xF3, 0xC0, 0xDC, 0xBC, 0xD8,
+ /* bank 23: 0x1700 */
+ 0x85, 0xA5, 0x00, 0xD9, 0xB9, 0xF2, 0xA3, 0xD0,
+ 0xDE, 0xB2, 0x85, 0xF0, 0xDD, 0xF3, 0xC8, 0xDC,
+ 0xD8, 0xF6, 0xB8, 0xB0, 0xA7, 0x84, 0x9D, 0x5A,
+ 0xF8, 0xF9, 0xD1, 0xDA, 0xB1, 0x80, 0xF0, 0xDD,
+ 0xF3, 0xC4, 0xDC, 0xD8, 0xF2, 0x86, 0xB9, 0xAF,
+ 0xC3, 0xC5, 0xC7, 0xF2, 0xB9, 0xA3, 0xDF, 0xB8,
+ 0xB0, 0xB4, 0xA7, 0x84, 0x9D, 0xF7, 0x1A, 0xF9,
+ 0xD9, 0xF4, 0x18, 0x49, 0xD8, 0xF1, 0xB9, 0xB1,
+ 0xB5, 0xA6, 0x83, 0x9B, 0x61, 0xD9, 0xF4, 0x18,
+ 0x5B, 0xD8, 0xF6, 0xB8, 0xB0, 0xB4, 0xA7, 0x84,
+ 0x94, 0x5A, 0xF8, 0xF9, 0xD1, 0xDA, 0xFE, 0xF1,
+ 0xB9, 0xAB, 0xDE, 0xD8, 0xF1, 0xB8, 0xB0, 0xB4,
+ 0xA7, 0x88, 0x9C, 0xF7, 0x6A, 0xF9, 0xD9, 0xFF,
+ 0xD8, 0xF1, 0xBB, 0xAA, 0xF9, 0xDA, 0xFF, 0xD8,
+ 0xB3, 0x8A, 0xC2, 0xB2, 0x8B, 0xB6, 0x94, 0xBA,
+ 0xA7, 0x22, 0xB7, 0x93, 0xF0, 0x31, 0x31, 0x20,
+ 0xD3, 0x8F, 0xB6, 0x9C, 0xAB, 0x01, 0x29, 0x51,
+ 0x79, 0xAF, 0xC2, 0xC5, 0xC7, 0x8B, 0x9B, 0xF1,
+ 0x04, 0xFD, 0x01, 0x87, 0xD4, 0x8E, 0x9D, 0xAB,
+ 0xF0, 0x01, 0x29, 0x51, 0x79, 0xAE, 0xC2, 0xC5,
+ 0xC7, 0x8B, 0x9B, 0xF1, 0x04, 0xFD, 0x01, 0xB3,
+ 0x81, 0x94, 0xBB, 0xA7, 0x62, 0xB7, 0x93, 0xF0,
+ 0x71, 0x71, 0x60, 0x85, 0x94, 0x01, 0x29, 0x51,
+ 0x79, 0xA5, 0xC2, 0xC5, 0xC7, 0x87, 0x97, 0xF1,
+ 0x04, 0xFD, 0x01, 0x81, 0xB6, 0x94, 0xA7, 0x02,
+ 0xB7, 0x93, 0xF0, 0x11, 0x11, 0x00, 0x8E, 0x9B,
+ 0x01, 0x29, 0x51, 0x79, 0xAE, 0xC2, 0xC5, 0xC7,
+ 0x87, 0x97, 0xF1, 0x04, 0xFD, 0x01, 0x83, 0xA3,
+ 0xC2, 0xC5, 0xC7, 0xB2, 0x84, 0xC1, 0xB0, 0xB4,
+ 0xB8, 0x88, 0x9D, 0xA7, 0xF7, 0x62, 0xF9, 0xD9,
+ 0xF4, 0x19, 0x5E, 0xD8, 0xF1, 0xBE, 0xAA, 0xF8,
+ 0xFA, 0xAB, 0xDE, 0xBC, 0x8B, 0xBD, 0x9B, 0xBE,
+ /* bank 24: 0x1800 */
+ 0xBE, 0xBA, 0xAF, 0xD0, 0xFC, 0x58, 0x00, 0x10,
+ 0xBE, 0xB8, 0xFC, 0xC0, 0x04, 0xDB, 0xFC, 0xC1,
+ 0x00, 0xAA, 0xDE, 0xDF, 0xAC, 0xDE, 0xDF, 0xAB,
+ 0xDF, 0xF8, 0xD8, 0xAC, 0xFC, 0x90, 0x00, 0x8C,
+ 0xFC, 0x09, 0x04, 0x00, 0x8A, 0x9C, 0xA9, 0x31,
+ 0xD9, 0xAA, 0xDF, 0xAC, 0xDF, 0xD8, 0x9B, 0xFC,
+ 0xC0, 0x04, 0xDB, 0x9A, 0xA9, 0x19, 0xAC, 0xF8,
+ 0xD8, 0x9B, 0xFC, 0xC1, 0x04, 0xDB, 0x9A, 0xA9,
+ 0x11, 0xAB, 0xDF, 0x8C, 0x9C, 0xA9, 0x19, 0xD9,
+ 0xF3, 0xBC, 0xBC, 0xBD, 0xBD, 0xBE, 0xBE, 0x8D,
+ 0x94, 0xA4, 0xD0, 0x1D, 0xF4, 0x42, 0xDA, 0xF1,
+ 0xBC, 0xBC, 0xBD, 0xBD, 0xBE, 0xBE, 0xD8, 0xF1,
+ 0xB1, 0x8B, 0xB5, 0x9A, 0xB9, 0xA6, 0x41, 0xD9,
+ 0xAA, 0xF8, 0xF5, 0xB2, 0x8F, 0xB6, 0x9F, 0xA6,
+ 0x78, 0x8E, 0x9E, 0x7C, 0xF1, 0xB1, 0x81, 0xB5,
+ 0x96, 0x05, 0x2D, 0x8E, 0xA6, 0x72, 0x7E, 0x81,
+ 0xA1, 0x00, 0x2C, 0xF4, 0x19, 0xAA, 0xD8, 0xF1,
+ 0xAA, 0xDE, 0x81, 0x91, 0xA6, 0x2C, 0xFD, 0x02,
+ 0x96, 0x29, 0x92, 0xFC, 0xC0, 0x03, 0xD9, 0x96,
+ 0x29, 0xD8, 0xA2, 0xDE, 0xF8, 0x86, 0x91, 0xA6,
+ 0x21, 0xDB, 0x8B, 0x61, 0xA2, 0xDE, 0xB3, 0x86,
+ 0xA4, 0xC0, 0xD8, 0xF3, 0xBB, 0xB3, 0xB7, 0xA2,
+ 0xF8, 0xF2, 0xF8, 0xF1, 0x80, 0x9D, 0xAD, 0xD0,
+ 0x7C, 0xF2, 0xA2, 0xFA, 0xF9, 0xD1, 0xF1, 0xB9,
+ 0xAC, 0xD9, 0xDE, 0xDA, 0xF8, 0xD8, 0xF2, 0xA6,
+ 0x82, 0x92, 0x49, 0xF9, 0xDB, 0xF1, 0xB1, 0x8C,
+ 0xB5, 0x9C, 0x21, 0xD9, 0xF5, 0xB3, 0x85, 0xB7,
+ 0x95, 0x78, 0x8E, 0x9E, 0x7C, 0xF1, 0xB1, 0x8D,
+ 0xB5, 0x9D, 0xAD, 0x1A, 0xF0, 0x96, 0x40, 0x9D,
+ 0x3C, 0x96, 0x48, 0xD8, 0xF1, 0xB1, 0x8E, 0xB5,
+ 0x9D, 0xB9, 0xA6, 0x2A, 0x8D, 0x96, 0x05, 0xD9,
+ 0xF4, 0x1A, 0x23, 0xD8, 0xF2, 0xB3, 0x82, 0xB7,
+ /* bank 25: 0x1900 */
+ 0x92, 0xBB, 0xAF, 0x49, 0xF9, 0xF9, 0xDB, 0xF1,
+ 0xB1, 0x8C, 0xB5, 0x9C, 0xB9, 0xA6, 0x21, 0xF4,
+ 0x1A, 0x23, 0xD8, 0xF1, 0xB3, 0x8E, 0xBB, 0xA8,
+ 0xD0, 0xC4, 0xC7, 0xF3, 0xB9, 0xAC, 0xD0, 0xDE,
+ 0xF4, 0x1A, 0x34, 0xD8, 0xF1, 0xB3, 0x85, 0xBB,
+ 0xA8, 0xD0, 0xC4, 0xC7, 0xF3, 0xB9, 0xAC, 0xD0,
+ 0xDE, 0xF8, 0xDF, 0xF8, 0xD8, 0xF3, 0xB5, 0x9C,
+ 0xFC, 0xC3, 0x04, 0xDB, 0xFC, 0xC2, 0x00, 0xD9,
+ 0xF2, 0xAC, 0xD0, 0xDE, 0xD8, 0xF2, 0xBB, 0xAF,
+ 0xB7, 0x92, 0xB3, 0x82, 0x19, 0x80, 0xA2, 0xD9,
+ 0x26, 0xF3, 0xA7, 0xD0, 0xDF, 0xD8, 0xF1, 0xAF,
+ 0x89, 0x98, 0x19, 0xA9, 0x80, 0xD9, 0x38, 0xD8,
+ 0xAF, 0x89, 0x39, 0xA9, 0x80, 0xDA, 0x3C, 0xD8,
+ 0xAF, 0x2E, 0x88, 0xF5, 0x75, 0xDA, 0xFF, 0xD8,
+ 0x71, 0xDA, 0xF1, 0xFF, 0xD8, 0x82, 0xA7, 0xF3,
+ 0xC1, 0xF2, 0x80, 0xC2, 0xF1, 0x97, 0x86, 0x49,
+ 0x2E, 0xA6, 0xD0, 0x50, 0x96, 0x86, 0xAF, 0x75,
+ 0xD9, 0x88, 0xA2, 0xD0, 0xF3, 0xC0, 0xC3, 0xF1,
+ 0xDA, 0x8F, 0x96, 0xA2, 0xD0, 0xF3, 0xC2, 0xC3,
+ 0x82, 0xB6, 0x9B, 0x78, 0x78, 0xF1, 0xD8, 0xB7,
+ 0xAF, 0xDF, 0xF9, 0x89, 0x99, 0xAF, 0x10, 0x80,
+ 0x9F, 0x21, 0xDA, 0x2E, 0xD8, 0x89, 0x99, 0xAF,
+ 0x31, 0xDA, 0xDF, 0xD8, 0xAF, 0x82, 0x92, 0xF3,
+ 0x41, 0xD9, 0xF1, 0xDF, 0xD8, 0xAF, 0x82, 0xF3,
+ 0x19, 0xD9, 0xF1, 0xDF, 0xD8, 0xF1, 0x89, 0x90,
+ 0xAF, 0xD0, 0x09, 0x8F, 0x99, 0xAF, 0x51, 0xDB,
+ 0x89, 0x31, 0xF3, 0x82, 0x92, 0x19, 0xF2, 0xB1,
+ 0x8C, 0xB5, 0x9C, 0x71, 0xD9, 0xF1, 0xDF, 0xF9,
+ 0xF2, 0xB9, 0xAC, 0xD0, 0xF8, 0xF8, 0xF3, 0xDF,
+ 0xD8, 0xB3, 0xB7, 0xBB, 0x82, 0xAC, 0xF3, 0xC0,
+ 0xA2, 0x80, 0x22, 0xF1, 0xA9, 0x22, 0x26, 0x9F,
+ 0xAF, 0x29, 0xDA, 0xAC, 0xDE, 0xFF, 0xD8, 0xA2,
+ /* bank 26: 0x1A00 */
+ 0xF2, 0xDE, 0xF1, 0xA9, 0xDF, 0xB5, 0x92, 0xFC,
+ 0xC0, 0x00, 0xD9, 0xFF, 0xD8, 0xAD, 0xD0, 0xDE,
+ 0xF8, 0xB1, 0x84, 0xB6, 0x96, 0xBA, 0xA7, 0xD0,
+ 0x7E, 0xB7, 0x96, 0xA7, 0x01, 0xB2, 0x87, 0x9D,
+ 0x05, 0xDB, 0xB3, 0x8D, 0xB6, 0x97, 0x79, 0xF3,
+ 0xB1, 0x8C, 0x96, 0x49, 0xF1, 0xBB, 0xAD, 0xD0,
+ 0xF8, 0xD8, 0xF3, 0xB9, 0xAC, 0xD0, 0xF8, 0xF9,
+ 0xD1, 0xD9, 0xF1, 0xBB, 0xAD, 0xD0, 0xF8, 0xD8,
+ 0xB3, 0xB7, 0xBB, 0x97, 0x8C, 0xAF, 0xF3, 0x79,
+ 0xD9, 0xF4, 0x1B, 0x6D, 0xD8, 0xF1, 0xB1, 0x82,
+ 0xB9, 0xA2, 0xD0, 0xC2, 0xB3, 0xF2, 0xB9, 0xA3,
+ 0xFA, 0xF1, 0xBB, 0xAA, 0xD0, 0xF8, 0xB8, 0xB0,
+ 0xB4, 0xA7, 0x88, 0x9C, 0xF7, 0x72, 0xF9, 0xF4,
+ 0xDA, 0x44, 0xD8, 0x1B, 0x80, 0xD8, 0xF3, 0xB3,
+ 0xB7, 0xBB, 0xA7, 0xD0, 0xFA, 0x97, 0x8C, 0xAF,
+ 0x79, 0xDA, 0xF1, 0x87, 0x9A, 0xAA, 0xD0, 0x70,
+ 0xD8, 0xF2, 0xBB, 0xB3, 0xB7, 0x82, 0x92, 0xAF,
+ 0x31, 0xDA, 0xF4, 0x1B, 0xBD, 0xD8, 0xF1, 0x8D,
+ 0x96, 0xA6, 0x40, 0xAC, 0x8C, 0x9C, 0x0C, 0x30,
+ 0xBA, 0x8D, 0x9D, 0xA7, 0x39, 0xDB, 0xF3, 0xB1,
+ 0x8C, 0xB6, 0x96, 0x49, 0xD9, 0xF1, 0x84, 0xB5,
+ 0x94, 0xB9, 0xA4, 0xD0, 0x5E, 0xF0, 0xB7, 0x9D,
+ 0x38, 0xD8, 0xF1, 0xBB, 0xAC, 0xDE, 0xD0, 0xDE,
+ 0xAD, 0xD0, 0xDF, 0xF1, 0xFF, 0xD8, 0xF3, 0xB9,
+ 0xAC, 0xD0, 0xF8, 0xF9, 0xD1, 0xD9, 0xF2, 0xBB,
+ 0xA2, 0xFA, 0xF8, 0xDA, 0xF2, 0xBB, 0xA2, 0xFA,
+ 0xD8, 0xF2, 0xBB, 0x82, 0xAF, 0xC2, 0xF9, 0xD1,
+ 0xD9, 0xF1, 0xB9, 0xAC, 0xDE, 0xAD, 0xDE, 0xDF,
+ 0xD8, 0xF1, 0x8C, 0x9C, 0xBB, 0xAC, 0xD0, 0x10,
+ 0xAC, 0xDE, 0xAD, 0xD0, 0xDF, 0x92, 0x82, 0xAF,
+ 0xF1, 0xCA, 0xF2, 0x35, 0xF1, 0x96, 0x8F, 0xA6,
+ 0xD9, 0x00, 0xD8, 0xF1, 0xFF,
+ /* bank 27: 0x1B00 */
+};
#endif /* ICM_DMP_FW_VER */
struct nvi_dmp nvi_dmp_icm = {
.fw_mem_addr = 0x90,
.fw_start = 0x08D0,
.dmp_reset_delay_ms = 25,
+ .fifo_mode = ICM_DMP_FIFO_MODE,
.dev_msk = ICM_DMP_DEV_MSK,
.en_msk = MSK_DEV_ALL,
.dd_n = ARRAY_SIZE(nvi_dmp_devs),
projects / sojka / nv-tegra / linux-3.10.git / blobdiff