tegra: dsi: Deselect CSI pads during calibration

[sojka/nv-tegra/linux-3.10.git] / drivers / video / tegra / dc / dsi.c

diff --git a/drivers/video/tegra/dc/dsi.c b/drivers/video/tegra/dc/dsi.c
index b770d83fac0554b6e663e1b92740ece10effd470..9fd64003ef3f8d11a405524aa3a5572b8049378e 100644 (file)
--- a/drivers/video/tegra/dc/dsi.c
+++ b/drivers/video/tegra/dc/dsi.c
@@ -1,7 +1,7 @@
 /*
  * drivers/video/tegra/dc/dsi.c
  *
- * Copyright (c) 2011-2014, NVIDIA CORPORATION, All rights reserved.
+ * Copyright (c) 2011-2015, NVIDIA CORPORATION, All rights reserved.
  *
  * This software is licensed under the terms of the GNU General Public
  * License version 2, as published by the Free Software Foundation, and
@@ -2094,7 +2094,7 @@ tegra_dsi_mipi_calibration_status(struct tegra_dc_dsi_data *dsi)
 #ifdef CONFIG_ARCH_TEGRA_12x_SOC
 static void tegra_dsi_mipi_calibration_12x(struct tegra_dc_dsi_data *dsi)
 {
-       u32 val;
+       u32 val, reg;
        struct clk *clk72mhz = NULL;
 
        clk72mhz = clk_get_sys("clk72mhz", NULL);
@@ -2129,6 +2129,15 @@ static void tegra_dsi_mipi_calibration_12x(struct tegra_dc_dsi_data *dsi)
                   DSI_PAD_PREEMP_PD(0x3) | DSI_PAD_PREEMP_PU(0x3));
        tegra_dsi_writel(dsi, val, DSI_PAD_CONTROL_3_VS1);
 
+       /* Deselect shared clk lane with DSI pads */
+       for (reg = MIPI_CAL_CILC_MIPI_CAL_CONFIG_2_0;
+               reg <= MIPI_CAL_CSIE_MIPI_CAL_CONFIG_2_0;
+               reg += 4) {
+               val = tegra_mipi_cal_read(dsi->mipi_cal, reg);
+               val &= ~(MIPI_CAL_SELA(0x1));
+               tegra_mipi_cal_write(dsi->mipi_cal, val, reg);
+       }
+
        /* Calibrate DSI 0 */
        if (dsi->info.ganged_type ||
                dsi->info.dsi_instance == DSI_INSTANCE_0) {
@@ -2371,6 +2380,8 @@ static void tegra_dsi_mipi_calibration_11x(struct tegra_dc_dsi_data *dsi)
 #endif
 static void tegra_dsi_pad_calibration(struct tegra_dc_dsi_data *dsi)
 {
+       u32 val = 0, reg;
+
        if (!dsi->ulpm)
                tegra_dsi_pad_enable(dsi);
        else
@@ -2382,6 +2393,15 @@ static void tegra_dsi_pad_calibration(struct tegra_dc_dsi_data *dsi)
 
                tegra_mipi_cal_clk_enable(dsi->mipi_cal);
 
+               /* Deselect CSI pads */
+               for (reg = MIPI_CAL_CILA_MIPI_CAL_CONFIG_0;
+                       reg <= MIPI_CAL_CILF_MIPI_CAL_CONFIG_0;
+                       reg += 4) {
+                       val = tegra_mipi_cal_read(dsi->mipi_cal, reg);
+                       val &= ~(MIPI_CAL_SELA(0x1));
+                       tegra_mipi_cal_write(dsi->mipi_cal, val, reg);
+               }
+
                tegra_mipi_cal_write(dsi->mipi_cal,
                        MIPI_BIAS_PAD_E_VCLAMP_REF(0x1),
                        MIPI_CAL_MIPI_BIAS_PAD_CFG0_0);