struct tegra_dc_nvsr_data;
+enum tegra_dc_cursor_size {
+ TEGRA_DC_CURSOR_SIZE_32X32 = 0,
+ TEGRA_DC_CURSOR_SIZE_64X64 = 1,
+ TEGRA_DC_CURSOR_SIZE_128X128 = 2,
+ TEGRA_DC_CURSOR_SIZE_256X256 = 3,
+};
+
+enum tegra_dc_cursor_format {
+ TEGRA_DC_CURSOR_FORMAT_2BIT_LEGACY = 0,
+ TEGRA_DC_CURSOR_FORMAT_RGBA_NON_PREMULT_ALPHA = 1,
+ TEGRA_DC_CURSOR_FORMAT_RGBA_PREMULT_ALPHA = 3,
+};
+
struct tegra_dc {
struct platform_device *ndev;
struct tegra_dc_platform_data *pdata;
struct tegra_dc_nvsr_data *nvsr;
bool disp_active_dirty;
-};
-enum tegra_dc_cursor_size {
- TEGRA_DC_CURSOR_SIZE_32X32 = 0,
- TEGRA_DC_CURSOR_SIZE_64X64 = 1,
- TEGRA_DC_CURSOR_SIZE_128X128 = 2,
- TEGRA_DC_CURSOR_SIZE_256X256 = 3,
+ struct tegra_dc_cursor {
+ bool dirty;
+ bool enabled;
+ dma_addr_t phys_addr;
+ u32 fg;
+ u32 bg;
+ unsigned clip_win;
+ int x;
+ int y;
+ enum tegra_dc_cursor_size size;
+ enum tegra_dc_cursor_format format;
+ } cursor;
};
-
-enum tegra_dc_cursor_format {
- TEGRA_DC_CURSOR_FORMAT_2BIT_LEGACY = 0,
- TEGRA_DC_CURSOR_FORMAT_RGBA_NON_PREMULT_ALPHA = 1,
- TEGRA_DC_CURSOR_FORMAT_RGBA_PREMULT_ALPHA = 3,
-};
-
#endif