/*
* ahci-tegra.c - AHCI SATA support for TEGRA AHCI device
*
- * Copyright (c) 2011-2014, NVIDIA Corporation. All rights reserved.
+ * Copyright (c) 2011-2015, NVIDIA Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
#define T_SATA0_NVOOB_SQUELCH_FILTER_LENGTH_SHIFT 26
#define T_SATA0_NVOOB_SQUELCH_FILTER_LENGTH_MASK (3 << 26)
+#define T_SATA0_FIFO_0 0x170
+#define T_SATA0_FIFO_0_L2P_FIFO_DEPTH (0x7 << 12)
+#define T_SATA0_FIFO_0_L2P_FIFO_DEPTH_MASK (0xf << 12)
+
+
#define PXSSTS_DEVICE_DETECTED (1 << 0)
#ifdef CONFIG_TEGRA_SATA_IDLE_POWERGATE
val |= (3 << T_SATA0_NVOOB_SQUELCH_FILTER_LENGTH_SHIFT);
scfg_writel(val, T_SATA0_NVOOB);
+ val = scfg_readl(T_SATA0_FIFO_0);
+ val = (val & ~T_SATA0_FIFO_0_L2P_FIFO_DEPTH_MASK) |
+ T_SATA0_FIFO_0_L2P_FIFO_DEPTH;
+ scfg_writel(val, T_SATA0_FIFO_0);
+
/*
* WAR: Before enabling SATA PLL shutdown, lockdet needs to be ignored.
* To ignore lockdet, T_SATA0_DBG0_OFFSET register bit 10 needs to