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1 /* Copyright (c) 2014-2016, NVIDIA CORPORATION.  All rights reserved.
2  *
3  * This software is licensed under the terms of the GNU General Public
4  * License version 2, as published by the Free Software Foundation, and
5  * may be copied, distributed, and modified under those terms.
6  *
7  * This program is distributed in the hope that it will be useful,
8  * but WITHOUT ANY WARRANTY; without even the implied warranty of
9  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
10  * GNU General Public License for more details.
11  */
12
13 /* Device mapping is done via three parameters:
14  * 1. If AKM_NVI_MPU_SUPPORT (defined below) is set, the code is included to
15  *    support the device behind an Invensense MPU running an NVI (NVidia/
16  *    Invensense) driver.
17  *    If AKM_NVI_MPU_SUPPORT is 0 then this driver is only for the device in a
18  *    stand-alone configuration without any dependencies on an Invensense MPU.
19  * 2. Device tree platform configuration nvi_config:
20  *    - auto = automatically detect if connected to host or MPU
21  *    - mpu = connected to MPU
22  *    - host = connected to host
23  *    This is only available if AKM_NVI_MPU_SUPPORT is set.
24  * 3. device in board file:
25  *    - ak89xx = automatically detect the device
26  *    - force the device for:
27  *      - ak8963
28  *      - ak8975
29  *      - ak09911
30  * If you have no clue what the device is and don't know how it is
31  * connected then use auto and akm89xx.  The auto-detect mechanisms are for
32  * platforms that have multiple possible configurations but takes longer to
33  * initialize.  No device identification and connect testing is done for
34  * specific configurations.
35  *
36  * An interrupt can be used to configure the device.  When an interrupt is
37  * defined in struct i2c_client.irq, the driver is configured to only use the
38  * device's continuous mode if the device supports it.  If the device does not
39  * support continuous mode, then the interrupt is not used.
40  * If the device is connected to the MPU, the interrupt from the board file is
41  * used as a SW flag.  The interrupt itself is never touched so any value can
42  * be used.  If the struct i2c_client.irq is > 0, then the driver will only use
43  * the continuous modes of the device if supported.  This frees the MPU
44  * auxiliary port used for writes.  This configuration would be used if another
45  * MPU auxiliary port was needed for another device connected to the MPU.
46  * If the device is connected to the host, the delay timing used in continuous
47  * mode is the one closest to the device's supported modes.  Example: A 70ms
48  * request will use the 125ms from the possible 10ms and 125ms on the AK8963.
49  * If the device is connected to the MPU, the delay timing used in continuous
50  * mode is equal to or the next fastest supported speed.
51  */
52 /* NVS = NVidia Sensor framework */
53 /* NVI = NVidia/Invensense */
54 /* See Nvs.cpp in the HAL for the NVS implementation of batch/flush. */
55 /* See NvsIio.cpp in the HAL for the IIO enable/disable extension mechanism. */
56
57
58 #include <linux/i2c.h>
59 #include <linux/module.h>
60 #include <linux/slab.h>
61 #include <linux/err.h>
62 #include <linux/delay.h>
63 #include <linux/regulator/consumer.h>
64 #include <linux/workqueue.h>
65 #include <linux/interrupt.h>
66 #include <linux/of.h>
67 #include <linux/nvs.h>
68 #if AKM_NVI_MPU_SUPPORT
69 #include <linux/mpu_iio.h>
70 #endif /* AKM_NVI_MPU_SUPPORT */
71
72 #define AKM_DRIVER_VERSION              (325)
73 #define AKM_VENDOR                      "AsahiKASEI"
74 #define AKM_NAME                        "ak89xx"
75 #define AKM_NAME_AK8963                 "ak8963"
76 #define AKM_NAME_AK8975                 "ak8975"
77 #define AKM_NAME_AK09911                "ak09911"
78 #define AKM_KBUF_SIZE                   (32)
79 #define AKM_DELAY_US_MAX                (255000)
80 #define AKM_HW_DELAY_POR_MS             (50)
81 #define AKM_HW_DELAY_TSM_MS             (10) /* Time Single Measurement */
82 #define AKM_HW_DELAY_US                 (100)
83 #define AKM_HW_DELAY_ROM_ACCESS_US      (200)
84 #define AKM_POLL_DELAY_MS_DFLT          (200)
85 #define AKM_MPU_RETRY_COUNT             (50)
86 #define AKM_MPU_RETRY_DELAY_MS          (20)
87 #define AKM_ERR_CNT_MAX                 (20)
88 /* HW registers */
89 #define AKM_WIA_ID                      (0x48)
90 #define AKM_DEVID_AK8963                (0x01)
91 #define AKM_DEVID_AK8975                (0x03)
92 #define AKM_DEVID_AK09911               (0x05)
93 #define AKM_REG_WIA                     (0x00)
94 #define AKM_REG_WIA2                    (0x01)
95 #define AKM_BIT_DRDY                    (0x01)
96 #define AKM_BIT_DOR                     (0x02)
97 #define AKM_BIT_DERR                    (0x04)
98 #define AKM_BIT_HOFL                    (0x08)
99 #define AKM_BIT_BITM                    (0x10)
100 #define AKM_BIT_SRST                    (0x01)
101 #define AKM_BIT_SELF                    (0x40)
102 #define AKM_MODE_POWERDOWN              (0x00)
103 #define AKM_MODE_SINGLE                 (0x01)
104
105 #define WR                              (0)
106 #define RD                              (1)
107 #define PORT_N                          (2)
108 #define AXIS_X                          (0)
109 #define AXIS_Y                          (1)
110 #define AXIS_Z                          (2)
111 #define AXIS_N                          (3)
112
113
114 /* regulator names in order of powering on */
115 static char *akm_vregs[] = {
116         "vdd",
117         "vid",
118 };
119
120 static char *akm_configs[] = {
121         "auto",
122         "mpu",
123         "host",
124 };
125
126 static unsigned short akm_i2c_addrs[] = {
127         0x0C,
128         0x0D,
129         0x0E,
130         0x0F,
131 };
132
133 struct akm_rr {
134         struct nvs_float max_range;
135         struct nvs_float resolution;
136         s16 range_lo[AXIS_N];
137         s16 range_hi[AXIS_N];
138 };
139
140 struct akm_cmode {
141         unsigned int t_us;
142         u8 mode;
143 };
144
145 struct akm_state {
146         struct i2c_client *i2c;
147         struct nvs_fn_if *nvs;
148         void *nvs_st;
149         struct sensor_cfg cfg;
150         struct regulator_bulk_data vreg[ARRAY_SIZE(akm_vregs)];
151         struct delayed_work dw;
152         struct akm_hal *hal;            /* Hardware Abstraction Layer */
153         u8 asa[AXIS_N];                 /* axis sensitivity adjustment */
154         u64 asa_q30[AXIS_N];            /* Q30 axis sensitivity adjustment */
155         unsigned int sts;               /* status flags */
156         unsigned int errs;              /* error count */
157         unsigned int enabled;           /* enable status */
158         unsigned int poll_delay_us;     /* requested sampling delay (us) */
159         unsigned int rr_i;              /* resolution/range index */
160         u16 i2c_addr;                   /* I2C address */
161         u8 dev_id;                      /* device ID */
162         bool irq_dis;                   /* interrupt host disable flag */
163         bool initd;                     /* set if initialized */
164         bool matrix_en;                 /* handle matrix internally */
165         bool mpu_en;                    /* if device behind MPU */
166         bool port_en[PORT_N];           /* enable status of MPU write port */
167         int port_id[PORT_N];            /* MPU port ID */
168         u8 data_out;                    /* write value to trigger a sample */
169         s16 magn_uc[AXIS_N];            /* uncalibrated sample data */
170         s16 magn[AXIS_N + 1];           /* data after calibration + status */
171         u8 nvi_config;                  /* NVI configuration */
172 };
173
174 struct akm_hal {
175         const char *part;
176         int version;
177         struct akm_rr *rr;
178         u8 rr_i_max;
179         struct nvs_float milliamp;
180         unsigned int delay_us_min;
181         unsigned int asa_shift;
182         u8 reg_start_rd;
183         u8 reg_st1;
184         u8 reg_st2;
185         u8 reg_cntl1;
186         u8 reg_mode;
187         u8 reg_reset;
188         u8 reg_astc;
189         u8 reg_asa;
190         u8 mode_mask;
191         u8 mode_self_test;
192         u8 mode_rom_read;
193         struct akm_cmode *cmode_tbl;
194         bool irq;
195         unsigned int mpu_id;
196 };
197
198
199 static void akm_err(struct akm_state *st)
200 {
201         st->errs++;
202         if (!st->errs)
203                 st->errs--;
204 }
205
206 static int akm_i2c_rd(struct akm_state *st, u8 reg, u16 len, u8 *val)
207 {
208         struct i2c_msg msg[2];
209
210         msg[0].addr = st->i2c_addr;
211         msg[0].flags = 0;
212         msg[0].len = 1;
213         msg[0].buf = &reg;
214         msg[1].addr = st->i2c_addr;
215         msg[1].flags = I2C_M_RD;
216         msg[1].len = len;
217         msg[1].buf = val;
218         if (i2c_transfer(st->i2c->adapter, msg, 2) != 2) {
219                 akm_err(st);
220                 return -EIO;
221         }
222
223         return 0;
224 }
225
226 static int akm_i2c_wr(struct akm_state *st, u8 reg, u8 val)
227 {
228         struct i2c_msg msg;
229         u8 buf[2];
230
231         if (st->i2c_addr) {
232                 buf[0] = reg;
233                 buf[1] = val;
234                 msg.addr = st->i2c_addr;
235                 msg.flags = 0;
236                 msg.len = 2;
237                 msg.buf = buf;
238                 if (i2c_transfer(st->i2c->adapter, &msg, 1) != 1) {
239                         akm_err(st);
240                         return -EIO;
241                 }
242         }
243
244         return 0;
245 }
246
247 static int akm_nvi_mpu_bypass_request(struct akm_state *st)
248 {
249         int ret = 0;
250 #if AKM_NVI_MPU_SUPPORT
251         int i;
252
253         if (st->mpu_en) {
254                 for (i = 0; i < AKM_MPU_RETRY_COUNT; i++) {
255                         ret = nvi_mpu_bypass_request(true);
256                         if ((!ret) || (ret == -EPERM))
257                                 break;
258
259                         msleep(AKM_MPU_RETRY_DELAY_MS);
260                 }
261                 if (ret == -EPERM)
262                         ret = 0;
263         }
264 #endif /* AKM_NVI_MPU_SUPPORT */
265         return ret;
266 }
267
268 static int akm_nvi_mpu_bypass_release(struct akm_state *st)
269 {
270         int ret = 0;
271
272 #if AKM_NVI_MPU_SUPPORT
273         if (st->mpu_en)
274                 ret = nvi_mpu_bypass_release();
275 #endif /* AKM_NVI_MPU_SUPPORT */
276         return ret;
277 }
278
279 static int akm_mode_wr(struct akm_state *st, u8 mode)
280 {
281         int ret = 0;
282
283 #if AKM_NVI_MPU_SUPPORT
284         if (st->mpu_en && !st->i2c->irq) {
285                 ret = nvi_mpu_data_out(st->port_id[WR], mode);
286         } else {
287                 ret = akm_nvi_mpu_bypass_request(st);
288                 if (!ret) {
289                         if (st->i2c->irq) {
290                                 ret = akm_i2c_wr(st, st->hal->reg_mode,
291                                                  AKM_MODE_POWERDOWN);
292                                 if (mode & st->hal->mode_mask) {
293                                         udelay(AKM_HW_DELAY_US);
294                                         ret |= akm_i2c_wr(st,
295                                                           st->hal->reg_mode,
296                                                           mode);
297                                 }
298                         } else {
299                                 ret = akm_i2c_wr(st, st->hal->reg_mode, mode);
300                         }
301                         akm_nvi_mpu_bypass_release(st);
302                 }
303         }
304 #else /* AKM_NVI_MPU_SUPPORT */
305         if (st->i2c->irq) {
306                 ret = akm_i2c_wr(st, st->hal->reg_mode,
307                                  AKM_MODE_POWERDOWN);
308                 if (mode & st->hal->mode_mask) {
309                         udelay(AKM_HW_DELAY_US);
310                         ret |= akm_i2c_wr(st,
311                                           st->hal->reg_mode,
312                                           mode);
313                 }
314         } else {
315                 ret = akm_i2c_wr(st, st->hal->reg_mode, mode);
316         }
317 #endif /* AKM_NVI_MPU_SUPPORT */
318         if (!ret)
319                 st->data_out = mode;
320         return ret;
321 }
322
323 static int akm_pm(struct akm_state *st, bool enable)
324 {
325         int ret = 0;
326
327         if (enable) {
328                 ret = nvs_vregs_enable(&st->i2c->dev, st->vreg,
329                                        ARRAY_SIZE(akm_vregs));
330                 if (ret > 0)
331                         mdelay(AKM_HW_DELAY_POR_MS);
332         } else {
333                 if (st->i2c->irq) {
334                         ret = nvs_vregs_sts(st->vreg, ARRAY_SIZE(akm_vregs));
335                         if ((ret < 0) || (ret == ARRAY_SIZE(akm_vregs))) {
336                                 ret = akm_mode_wr(st, AKM_MODE_POWERDOWN);
337                         } else if (ret > 0) {
338                                 ret = nvs_vregs_enable(&st->i2c->dev, st->vreg,
339                                                        ARRAY_SIZE(akm_vregs));
340                                 mdelay(AKM_HW_DELAY_POR_MS);
341                                 ret = akm_mode_wr(st, AKM_MODE_POWERDOWN);
342                         }
343                 }
344                 ret |= nvs_vregs_disable(&st->i2c->dev, st->vreg,
345                                          ARRAY_SIZE(akm_vregs));
346         }
347         if (ret > 0)
348                 ret = 0;
349         if (ret) {
350                 dev_err(&st->i2c->dev, "%s pwr=%x ERR=%d\n",
351                         __func__, enable, ret);
352         } else {
353                 if (st->sts & NVS_STS_SPEW_MSG)
354                         dev_info(&st->i2c->dev, "%s pwr=%x\n",
355                                  __func__, enable);
356         }
357         return ret;
358 }
359
360 static int akm_port_free(struct akm_state *st, int port)
361 {
362         int ret = 0;
363
364 #if AKM_NVI_MPU_SUPPORT
365         if (st->port_id[port] >= 0) {
366                 ret = nvi_mpu_port_free(st->port_id[port]);
367                 if (!ret)
368                         st->port_id[port] = -1;
369         }
370 #endif /* AKM_NVI_MPU_SUPPORT */
371         return ret;
372 }
373
374 static int akm_ports_free(struct akm_state *st)
375 {
376         int ret;
377
378         ret = akm_port_free(st, WR);
379         ret |= akm_port_free(st, RD);
380         return ret;
381 }
382
383 static void akm_pm_exit(struct akm_state *st)
384 {
385         akm_ports_free(st);
386         akm_pm(st, false);
387         nvs_vregs_exit(&st->i2c->dev, st->vreg, ARRAY_SIZE(akm_vregs));
388 }
389
390 static int akm_pm_init(struct akm_state *st)
391 {
392         int ret;
393
394         st->enabled = 0;
395         st->poll_delay_us = (AKM_POLL_DELAY_MS_DFLT * 1000);
396         st->initd = false;
397         st->mpu_en = false;
398         st->port_en[WR] = false;
399         st->port_en[RD] = false;
400         st->port_id[WR] = -1;
401         st->port_id[RD] = -1;
402         nvs_vregs_init(&st->i2c->dev,
403                        st->vreg, ARRAY_SIZE(akm_vregs), akm_vregs);
404         ret = akm_pm(st, true);
405         return ret;
406 }
407
408 static int akm_ports_enable(struct akm_state *st, bool enable)
409 {
410         int ret = 0;
411 #if AKM_NVI_MPU_SUPPORT
412         unsigned int port_mask = 0;
413         unsigned int i;
414
415         for (i = 0; i < PORT_N; i++) {
416                 if (enable != st->port_en[i] && st->port_id[i] >= 0)
417                         port_mask |= (1 << st->port_id[i]);
418         }
419
420         if (port_mask) {
421                 ret = nvi_mpu_enable(port_mask, enable);
422                 if (!ret) {
423                         for (i = 0; i < PORT_N; i++) {
424                                 if (st->port_id[i] >= 0 &&
425                                              port_mask & (1 << st->port_id[i]))
426                                         st->port_en[i] = enable;
427                         }
428                 }
429         }
430 #endif /* AKM_NVI_MPU_SUPPORT */
431
432         return ret;
433 }
434
435 static int akm_reset_dev(struct akm_state *st)
436 {
437         u8 val;
438         unsigned int i;
439         int ret = 0;
440
441         if (st->hal->reg_reset) {
442                 ret = akm_nvi_mpu_bypass_request(st);
443                 if (!ret) {
444                         ret = akm_i2c_wr(st, st->hal->reg_reset,
445                                          AKM_BIT_SRST);
446                         for (i = 0; i < AKM_HW_DELAY_POR_MS; i++) {
447                                 mdelay(1);
448                                 ret = akm_i2c_rd(st, st->hal->reg_reset,
449                                                  1, &val);
450                                 if (ret)
451                                         continue;
452
453                                 if (!(val & AKM_BIT_SRST))
454                                         break;
455                         }
456                         akm_nvi_mpu_bypass_release(st);
457                 }
458         }
459
460         return 0;
461 }
462
463 static int akm_mode(struct akm_state *st)
464 {
465         u8 mode;
466         unsigned int t_us;
467         unsigned int i;
468         int ret;
469
470         mode = AKM_MODE_SINGLE;
471         if (st->i2c->irq) {
472                 i = 0;
473                 while (st->hal->cmode_tbl[i].t_us) {
474                         mode = st->hal->cmode_tbl[i].mode;
475                         t_us = st->hal->cmode_tbl[i].t_us;
476                         if (st->poll_delay_us >= st->hal->cmode_tbl[i].t_us)
477                                 break;
478
479                         i++;
480                         if (!st->mpu_en) {
481                                 t_us -= st->hal->cmode_tbl[i].t_us;
482                                 t_us >>= 1;
483                                 t_us += st->hal->cmode_tbl[i].t_us;
484                                 if (st->poll_delay_us > t_us)
485                                         break;
486                         }
487                 }
488         }
489         if (st->rr_i)
490                 mode |= AKM_BIT_BITM;
491         ret = akm_mode_wr(st, mode);
492         return ret;
493 }
494
495 static s16 akm_matrix(struct akm_state *st,
496                       s16 x, s16 y, s16 z, unsigned int axis)
497 {
498         return ((st->cfg.matrix[0 + axis] == 1 ? x :
499                  (st->cfg.matrix[0 + axis] == -1 ? -x : 0)) +
500                 (st->cfg.matrix[3 + axis] == 1 ? y :
501                  (st->cfg.matrix[3 + axis] == -1 ? -y : 0)) +
502                 (st->cfg.matrix[6 + axis] == 1 ? z :
503                  (st->cfg.matrix[6 + axis] == -1 ? -z : 0)));
504 }
505
506 static void akm_calc(struct akm_state *st, s16 *data, bool be, bool matrix)
507 {
508         s16 x;
509         s16 y;
510         s16 z;
511         unsigned int axis;
512
513         for (axis = 0; axis < AXIS_N; axis++) {
514                 if (be)
515                         st->magn_uc[axis] = be16_to_cpup(&data[axis]);
516                 else
517                         st->magn_uc[axis] = data[axis];
518         }
519
520         x = (((s64)st->magn_uc[AXIS_X] * st->asa_q30[AXIS_X]) >> 30);
521         y = (((s64)st->magn_uc[AXIS_Y] * st->asa_q30[AXIS_Y]) >> 30);
522         z = (((s64)st->magn_uc[AXIS_Z] * st->asa_q30[AXIS_Z]) >> 30);
523         if (matrix) {
524                 for (axis = 0; axis < AXIS_N; axis++)
525                         st->magn[axis] = akm_matrix(st, x, y, z, axis);
526         } else {
527                 st->magn[AXIS_X] = x;
528                 st->magn[AXIS_Y] = y;
529                 st->magn[AXIS_Z] = z;
530         }
531 }
532
533 static int akm_read_sts(struct akm_state *st, u8 *data)
534 {
535         u8 st1;
536         u8 st2;
537         int ret = 0; /* assume still processing */
538
539         st1 = st->hal->reg_st1 - st->hal->reg_start_rd;
540         st2 = st->hal->reg_st2 - st->hal->reg_start_rd;
541         if (data[st2] & (AKM_BIT_HOFL | AKM_BIT_DERR)) {
542                 if (st->sts & NVS_STS_SPEW_MSG)
543                         dev_info(&st->i2c->dev, "%s ERR: STS2=0x%02x\n",
544                                  __func__, data[st2]);
545                 akm_err(st);
546                 ret = -1; /* error */
547         } else if (data[st1]) {
548                 if (data[st1] & AKM_BIT_DOR && st->sts & NVS_STS_SPEW_MSG)
549                         dev_info(&st->i2c->dev, "%s ERR: STS1=0x%02x\n",
550                                  __func__, data[st1]);
551                 if (data[st1] & AKM_BIT_DRDY)
552                         ret = 1; /* data ready to be reported */
553         }
554         return ret;
555 }
556
557 static int akm_read(struct akm_state *st)
558 {
559         s64 ts;
560         u8 data[10];
561         unsigned int i;
562         int ret;
563
564         ret = akm_i2c_rd(st, st->hal->reg_start_rd, 10, data);
565         if (ret)
566                 return ret;
567
568         ts = nvs_timestamp();
569         ret = akm_read_sts(st, data);
570         if (ret > 0) {
571                 i = st->hal->reg_st1 - st->hal->reg_start_rd + 1;
572                 akm_calc(st, (s16 *)&data[i], false, st->matrix_en);
573                 st->nvs->handler(st->nvs_st, &st->magn, ts);
574         }
575         return ret;
576 }
577
578 #if AKM_NVI_MPU_SUPPORT
579 static void akm_mpu_handler(u8 *data, unsigned int len, s64 ts, void *p_val)
580 {
581         struct akm_state *st = (struct akm_state *)p_val;
582         bool be = false;
583         unsigned int i;
584         int ret;
585
586         if (ts < 0)
587                 /* error - just drop */
588                 return;
589
590         if (!ts) {
591                 /* no timestamp means flush done */
592                 st->nvs->handler(st->nvs_st, NULL, 0);
593                 return;
594         }
595
596         if (st->enabled) {
597                 if (len == 2) {
598                         /* status from the DMP in big endian */
599                         st->magn[AXIS_N] = be16_to_cpup((s16 *)data);
600                         return;
601                 }
602
603                 if (len == 6) {
604                         /* this data is from the DMP in big endian */
605                         be = true;
606                         i = 0;
607                         ret = 1;
608                 } else {
609                         /* data in little endian */
610                         i = st->hal->reg_st1 - st->hal->reg_start_rd + 1;
611                         ret = akm_read_sts(st, data);
612                 }
613                 if (ret > 0) {
614                         akm_calc(st, (s16 *)&data[i], be, st->matrix_en);
615                         st->nvs->handler(st->nvs_st, &st->magn, ts);
616                 }
617         }
618 }
619 #endif /* AKM_NVI_MPU_SUPPORT */
620
621 static void akm_work(struct work_struct *ws)
622 {
623         struct akm_state *st = container_of((struct delayed_work *)ws,
624                                             struct akm_state, dw);
625         int ret;
626
627         st->nvs->nvs_mutex_lock(st->nvs_st);
628         if (st->enabled) {
629                 ret = akm_read(st);
630                 if (ret > 0) {
631                         akm_i2c_wr(st, st->hal->reg_mode, st->data_out);
632                 } else if (ret < 0) {
633                         akm_reset_dev(st);
634                         akm_mode(st);
635                 }
636                 schedule_delayed_work(&st->dw,
637                                       usecs_to_jiffies(st->poll_delay_us));
638         }
639         st->nvs->nvs_mutex_unlock(st->nvs_st);
640 }
641
642 static irqreturn_t akm_irq_thread(int irq, void *dev_id)
643 {
644         struct akm_state *st = (struct akm_state *)dev_id;
645         int ret;
646
647         ret = akm_read(st);
648         if (ret < 0) {
649                 akm_reset_dev(st);
650                 akm_mode(st);
651         }
652         return IRQ_HANDLED;
653 }
654
655 static int akm_self_test(struct akm_state *st)
656 {
657         u8 data[10];
658         u8 mode;
659         unsigned int i;
660         int ret;
661         int ret_t;
662
663         ret_t = akm_i2c_wr(st, st->hal->reg_mode, AKM_MODE_POWERDOWN);
664         udelay(AKM_HW_DELAY_US);
665         if (st->hal->reg_astc) {
666                 ret_t |= akm_i2c_wr(st, st->hal->reg_astc, AKM_BIT_SELF);
667                 udelay(AKM_HW_DELAY_US);
668         }
669         mode = st->hal->mode_self_test;
670         if (st->rr_i)
671                 mode |= AKM_BIT_BITM;
672         ret_t |= akm_i2c_wr(st, st->hal->reg_mode, mode);
673         mdelay(AKM_HW_DELAY_TSM_MS);
674         ret = akm_i2c_rd(st, st->hal->reg_start_rd, 10, data);
675         if (!ret) {
676                 ret = akm_read_sts(st, data);
677                 if (ret > 0) {
678                         i = st->hal->reg_st1 - st->hal->reg_start_rd + 1;
679                         akm_calc(st, (s16 *)&data[i], false, false);
680                         ret = 0;
681                 } else {
682                         ret = -EBUSY;
683                 }
684         }
685         ret_t |= ret;
686         if (st->hal->reg_astc)
687                 akm_i2c_wr(st, st->hal->reg_astc, 0);
688         if (ret_t) {
689                 dev_err(&st->i2c->dev, "%s ERR: %d\n",
690                         __func__, ret_t);
691         } else {
692                 if ((st->magn[AXIS_X] <
693                                st->hal->rr[st->rr_i].range_lo[AXIS_X]) ||
694                                 (st->magn[AXIS_X] >
695                                  st->hal->rr[st->rr_i].range_hi[AXIS_X]))
696                         ret_t |= 1 << AXIS_X;
697                 if ((st->magn[AXIS_Y] <
698                                st->hal->rr[st->rr_i].range_lo[AXIS_Y]) ||
699                                 (st->magn[AXIS_Y] >
700                                  st->hal->rr[st->rr_i].range_hi[AXIS_Y]))
701                         ret_t |= 1 << AXIS_Y;
702                 if ((st->magn[AXIS_Z] <
703                                st->hal->rr[st->rr_i].range_lo[AXIS_Z]) ||
704                                 (st->magn[AXIS_Z] >
705                                  st->hal->rr[st->rr_i].range_hi[AXIS_Z]))
706                         ret_t |= 1 << AXIS_Z;
707                 if (ret_t) {
708                         dev_err(&st->i2c->dev, "%s ERR: out_of_range %x\n",
709                                 __func__, ret_t);
710                 }
711         }
712         return ret_t;
713 }
714
715 static int akm_init_hw(struct akm_state *st)
716 {
717         unsigned int i;
718         int ret;
719
720         ret = akm_nvi_mpu_bypass_request(st);
721         if (!ret) {
722                 ret = akm_i2c_wr(st, st->hal->reg_mode,
723                                  st->hal->mode_rom_read);
724                 udelay(AKM_HW_DELAY_ROM_ACCESS_US);
725                 ret |= akm_i2c_rd(st, st->hal->reg_asa, 3, st->asa);
726                 akm_i2c_wr(st, st->hal->reg_mode, AKM_MODE_POWERDOWN);
727                 akm_self_test(st);
728                 akm_nvi_mpu_bypass_release(st);
729         }
730         if (ret) {
731                 dev_err(&st->i2c->dev, "%s ERR %d\n", __func__, ret);
732         } else {
733                 st->initd = true;
734                 for (i = 0; i < AXIS_N; i++) {
735                         if (!st->asa_q30[i])
736                                 /* use HW setting if no DT override */
737                                 st->asa_q30[i] = st->asa[i] + 128;
738                         st->asa_q30[i] <<= 30 - st->hal->asa_shift;
739                 }
740         }
741         return ret;
742 }
743
744 static void nvi_disable_irq(struct akm_state *st)
745 {
746         if (!st->irq_dis) {
747                 disable_irq_nosync(st->i2c->irq);
748                 st->irq_dis = true;
749         }
750 }
751
752 static void nvi_enable_irq(struct akm_state *st)
753 {
754         if (st->irq_dis) {
755                 enable_irq(st->i2c->irq);
756                 st->irq_dis = false;
757         }
758 }
759
760 static int akm_dis(struct akm_state *st)
761 {
762         int ret = 0;
763
764         if (st->mpu_en) {
765                 ret = akm_ports_enable(st, false);
766         } else {
767                 if (st->i2c->irq)
768                         nvi_disable_irq(st);
769                 else
770                         cancel_delayed_work(&st->dw);
771         }
772         if (!ret)
773                 st->enabled = 0;
774         return ret;
775 }
776
777 static int akm_disable(struct akm_state *st)
778 {
779         int ret;
780
781         ret = akm_dis(st);
782         if (!ret)
783                 akm_pm(st, false);
784         return ret;
785 }
786
787 static int akm_en(struct akm_state *st)
788 {
789         int ret = 0;
790
791         akm_pm(st, true);
792         if (!st->initd)
793                 ret = akm_init_hw(st);
794         return ret;
795 }
796
797 static int akm_enable(void *client, int snsr_id, int enable)
798 {
799         struct akm_state *st = (struct akm_state *)client;
800         int ret;
801
802         if (enable < 0)
803                 return st->enabled;
804
805         if (enable) {
806                 ret = akm_en(st);
807                 if (!ret) {
808                         ret = akm_mode(st);
809                         if (st->mpu_en)
810                                 ret |= akm_ports_enable(st, true);
811                         if (ret) {
812                                 akm_disable(st);
813                         } else {
814                                 st->enabled = 1;
815                                 if (!st->mpu_en) {
816                                         if (st->i2c->irq)
817                                                 nvi_enable_irq(st);
818                                         else
819                                                 schedule_delayed_work(&st->dw,
820                                                               usecs_to_jiffies(
821                                                            st->poll_delay_us));
822                                 }
823                         }
824                 }
825         } else {
826                 ret = akm_disable(st);
827         }
828         return ret;
829 }
830
831 static int akm_batch(void *client, int snsr_id, int flags,
832                      unsigned int period, unsigned int timeout)
833 {
834         struct akm_state *st = (struct akm_state *)client;
835         int ret = 0;
836
837         if (period < st->hal->delay_us_min)
838                 period = st->hal->delay_us_min;
839 #if AKM_NVI_MPU_SUPPORT
840         if (st->port_id[RD] >= 0)
841                 ret = nvi_mpu_batch(st->port_id[RD], period, timeout);
842         if (!ret)
843 #endif /* AKM_NVI_MPU_SUPPORT */
844                 st->poll_delay_us = period;
845         if (st->enabled && st->i2c->irq && !ret)
846                 ret = akm_mode(st);
847         return ret;
848 }
849
850 static int akm_flush(void *client, int snsr_id)
851 {
852         struct akm_state *st = (struct akm_state *)client;
853         int ret = -EINVAL;
854
855 #if AKM_NVI_MPU_SUPPORT
856         if (st->mpu_en)
857                 ret = nvi_mpu_flush(st->port_id[RD]);
858 #endif /* AKM_NVI_MPU_SUPPORT */
859         return ret;
860 }
861
862 static int akm_resolution(void *client, int snsr_id, int resolution)
863 {
864         struct akm_state *st = (struct akm_state *)client;
865         unsigned int rr_i = st->rr_i;
866         int ret = 0;
867
868         if (st->mpu_en)
869                 /* can't change resolutions at runtime when behind the MPU
870                  * since DMP has already been configured with the resolution.
871                  */
872                 return -EINVAL;
873
874         if (resolution < 0 || resolution > st->hal->rr_i_max)
875                 return -EINVAL;
876
877         st->rr_i = resolution;
878         if (st->enabled && (resolution != rr_i)) {
879                 ret = akm_mode(st);
880                 if (ret < 0)
881                         st->rr_i = rr_i;
882         }
883
884         st->cfg.max_range.ival = st->hal->rr[st->rr_i].max_range.ival;
885         st->cfg.max_range.fval = st->hal->rr[st->rr_i].max_range.fval;
886         st->cfg.resolution.ival = st->hal->rr[st->rr_i].resolution.ival;
887         st->cfg.resolution.fval = st->hal->rr[st->rr_i].resolution.fval;
888         st->cfg.scale.ival = st->hal->rr[st->rr_i].resolution.ival;
889         st->cfg.scale.fval = st->hal->rr[st->rr_i].resolution.fval;
890         return ret;
891 }
892
893 static int akm_reset(void *client, int snsr_id)
894 {
895         struct akm_state *st = (struct akm_state *)client;
896         unsigned int enabled = st->enabled;
897         int ret;
898
899         akm_dis(st);
900         akm_pm(st, true);
901         ret = akm_reset_dev(st);
902         akm_enable(st, snsr_id, enabled);
903         return ret;
904 }
905
906 static int akm_selftest(void *client, int snsr_id, char *buf)
907 {
908         struct akm_state *st = (struct akm_state *)client;
909         unsigned int enabled = st->enabled;
910         ssize_t t;
911         int ret;
912
913         akm_dis(st);
914         akm_en(st);
915         ret = akm_nvi_mpu_bypass_request(st);
916         if (!ret) {
917                 ret = akm_self_test(st);
918                 akm_nvi_mpu_bypass_release(st);
919         }
920         if (buf) {
921                 if (ret < 0) {
922                         t = snprintf(buf, PAGE_SIZE, "ERR: %d\n", ret);
923                 } else {
924                         if (ret > 0)
925                                 t = snprintf(buf, PAGE_SIZE, "%d FAIL", ret);
926                         else
927                                 t = snprintf(buf, PAGE_SIZE, "%d PASS", ret);
928                         t += snprintf(buf + t, PAGE_SIZE - t,
929                                       "   xyz: %hd %hd %hd   ",
930                                       st->magn[AXIS_X],
931                                       st->magn[AXIS_Y],
932                                       st->magn[AXIS_Z]);
933                         t += snprintf(buf + t, PAGE_SIZE - t,
934                                       "uncalibrated: %hd %hd %hd   ",
935                                       st->magn_uc[AXIS_X],
936                                       st->magn_uc[AXIS_Y],
937                                       st->magn_uc[AXIS_Z]);
938                         if (ret > 0) {
939                                 if (ret & (1 << AXIS_X))
940                                         t += snprintf(buf + t, PAGE_SIZE - t,
941                                                       "X ");
942                                 if (ret & (1 << AXIS_Y))
943                                         t += snprintf(buf + t, PAGE_SIZE - t,
944                                                       "Y ");
945                                 if (ret & (1 << AXIS_Z))
946                                         t += snprintf(buf + t, PAGE_SIZE - t,
947                                                       "Z ");
948                         }
949                         t += snprintf(buf + t, PAGE_SIZE - t, "\n");
950                 }
951         }
952         akm_enable(st, 0, enabled);
953         if (buf)
954                 return t;
955
956         return ret;
957 }
958
959 static int akm_regs(void *client, int snsr_id, char *buf)
960 {
961         struct akm_state *st = (struct akm_state *)client;
962         ssize_t t;
963         u8 data1[25];
964         u8 data2[3];
965         unsigned int i;
966         int ret;
967
968         if (!st->initd)
969                 t = snprintf(buf, PAGE_SIZE,
970                              "calibration: NEED ENABLE\n");
971         else
972                 t = snprintf(buf, PAGE_SIZE,
973                              "calibration: x=%#2x y=%#2x z=%#2x\n",
974                              st->asa[AXIS_X],
975                              st->asa[AXIS_Y],
976                              st->asa[AXIS_Z]);
977         ret = akm_nvi_mpu_bypass_request(st);
978         if (!ret) {
979                 ret = akm_i2c_rd(st, AKM_REG_WIA,
980                                  st->hal->reg_st2 + 1, data1);
981                 ret |= akm_i2c_rd(st, st->hal->reg_cntl1, 3, data2);
982                 akm_nvi_mpu_bypass_release(st);
983         }
984         if (ret) {
985                 t += snprintf(buf + t, PAGE_SIZE - t,
986                               "registers: ERR %d\n", ret);
987         } else {
988                 t += snprintf(buf + t, PAGE_SIZE - t,
989                               "registers:\n");
990                 for (i = 0; i <= st->hal->reg_st2; i++)
991                         t += snprintf(buf + t, PAGE_SIZE - t,
992                                       "%#2x=%#2x\n",
993                                       AKM_REG_WIA + i, data1[i]);
994                 for (i = 0; i < 3; i++)
995                         t += snprintf(buf + t, PAGE_SIZE - t,
996                                       "%#2x=%#2x\n",
997                                       st->hal->reg_cntl1 + i,
998                                       data2[i]);
999         }
1000         return t;
1001 }
1002
1003 static int akm_nvs_read(void *client, int snsr_id, char *buf)
1004 {
1005         struct akm_state *st = (struct akm_state *)client;
1006         ssize_t t;
1007
1008         t = snprintf(buf, PAGE_SIZE, "driver v.%u\n", AKM_DRIVER_VERSION);
1009         t += snprintf(buf + t, PAGE_SIZE - t, "irq=%d\n", st->i2c->irq);
1010         t += snprintf(buf + t, PAGE_SIZE - t, "mpu_en=%x\n", st->mpu_en);
1011         t += snprintf(buf + t, PAGE_SIZE - t, "nvi_config=%hhu\n",
1012                       st->nvi_config);
1013         t += snprintf(buf + t, PAGE_SIZE - t, "asa_q30_x=%llu\n",
1014                       st->asa_q30[AXIS_X]);
1015         t += snprintf(buf + t, PAGE_SIZE - t, "asa_q30_y=%llu\n",
1016                       st->asa_q30[AXIS_Y]);
1017         t += snprintf(buf + t, PAGE_SIZE - t, "asa_q30_z=%llu\n",
1018                       st->asa_q30[AXIS_Z]);
1019         return t;
1020 }
1021
1022 static struct nvs_fn_dev akm_fn_dev = {
1023         .enable                         = akm_enable,
1024         .batch                          = akm_batch,
1025         .flush                          = akm_flush,
1026         .resolution                     = akm_resolution,
1027         .reset                          = akm_reset,
1028         .self_test                      = akm_selftest,
1029         .regs                           = akm_regs,
1030         .nvs_read                       = akm_nvs_read,
1031 };
1032
1033 #ifdef CONFIG_PM_SLEEP
1034 static int akm_suspend(struct device *dev)
1035 {
1036         struct i2c_client *client = to_i2c_client(dev);
1037         struct akm_state *st = i2c_get_clientdata(client);
1038         int ret = 0;
1039
1040         st->sts |= NVS_STS_SUSPEND;
1041         if (st->nvs && st->nvs_st)
1042                 ret = st->nvs->suspend(st->nvs_st);
1043         if (st->sts & NVS_STS_SPEW_MSG)
1044                 dev_info(&client->dev, "%s\n", __func__);
1045         return ret;
1046 }
1047
1048 static int akm_resume(struct device *dev)
1049 {
1050         struct i2c_client *client = to_i2c_client(dev);
1051         struct akm_state *st = i2c_get_clientdata(client);
1052         int ret = 0;
1053
1054         if (st->nvs && st->nvs_st)
1055                 ret = st->nvs->resume(st->nvs_st);
1056         st->sts &= ~NVS_STS_SUSPEND;
1057         if (st->sts & NVS_STS_SPEW_MSG)
1058                 dev_info(&client->dev, "%s\n", __func__);
1059         return ret;
1060 }
1061
1062 static SIMPLE_DEV_PM_OPS(akm_pm_ops, akm_suspend, akm_resume);
1063 #endif
1064
1065 static void akm_shutdown(struct i2c_client *client)
1066 {
1067         struct akm_state *st = i2c_get_clientdata(client);
1068
1069         st->sts |= NVS_STS_SHUTDOWN;
1070         if (st->nvs && st->nvs_st)
1071                 st->nvs->shutdown(st->nvs_st);
1072         if (st->sts & NVS_STS_SPEW_MSG)
1073                 dev_info(&client->dev, "%s\n", __func__);
1074 }
1075
1076 static int akm_remove(struct i2c_client *client)
1077 {
1078         struct akm_state *st = i2c_get_clientdata(client);
1079
1080         if (st != NULL) {
1081                 akm_shutdown(client);
1082                 if (st->nvs) {
1083                         if (st->nvs_st)
1084                                 st->nvs->remove(st->nvs_st);
1085                 }
1086                 if (st->dw.wq)
1087                         destroy_workqueue(st->dw.wq);
1088                 akm_pm_exit(st);
1089         }
1090         dev_info(&client->dev, "%s\n", __func__);
1091         return 0;
1092 }
1093
1094 static struct akm_rr akm_rr_09911[] = {
1095         {
1096                 .max_range              = {
1097                         .ival           = 9825,
1098                         .fval           = 0,
1099                 },
1100                 .resolution             = {
1101                         .ival           = 0,
1102                         .fval           = 600000,
1103                 },
1104                 .range_lo[AXIS_X]       = -30,
1105                 .range_hi[AXIS_X]       = 30,
1106                 .range_lo[AXIS_Y]       = -30,
1107                 .range_hi[AXIS_Y]       = 30,
1108                 .range_lo[AXIS_Z]       = -400,
1109                 .range_hi[AXIS_Z]       = -50,
1110         },
1111 };
1112
1113 static struct akm_cmode akm_cmode_09911[] = {
1114         {
1115                 .t_us                   = 100000,
1116                 .mode                   = 0x02,
1117         },
1118         {
1119                 .t_us                   = 50000,
1120                 .mode                   = 0x04,
1121         },
1122         {
1123                 .t_us                   = 20000,
1124                 .mode                   = 0x06,
1125         },
1126         {
1127                 .t_us                   = 10000,
1128                 .mode                   = 0x08,
1129         },
1130         {},
1131 };
1132
1133 static struct akm_hal akm_hal_09911 = {
1134         .part                           = AKM_NAME_AK09911,
1135         .version                        = 2,
1136         .rr                             = akm_rr_09911,
1137         .rr_i_max                       = ARRAY_SIZE(akm_rr_09911) - 1,
1138         .milliamp                       = {
1139                 .ival                   = 2,
1140                 .fval                   = 400000,
1141         },
1142         .delay_us_min                   = 10000,
1143         .asa_shift                      = 7,
1144         .reg_start_rd                   = 0x10,
1145         .reg_st1                        = 0x10,
1146         .reg_st2                        = 0x18,
1147         .reg_cntl1                      = 0x30,
1148         .reg_mode                       = 0x31,
1149         .reg_reset                      = 0x32,
1150         .reg_astc                       = 0, /* N/A */
1151         .reg_asa                        = 0x60,
1152         .mode_mask                      = 0x1F,
1153         .mode_self_test                 = 0x10,
1154         .mode_rom_read                  = 0x1F,
1155         .cmode_tbl                      = akm_cmode_09911,
1156         .irq                            = false,
1157 #if AKM_NVI_MPU_SUPPORT
1158         .mpu_id                         = COMPASS_ID_AK09911,
1159 #endif /* AKM_NVI_MPU_SUPPORT */
1160 };
1161
1162 static struct akm_rr akm_rr_8975[] = {
1163         {
1164                 .max_range              = {
1165                         .ival           = 2459,
1166                         .fval           = 0,
1167                 },
1168                 .resolution             = {
1169                         .ival           = 0,
1170                         .fval           = 300000,
1171                 },
1172                 .range_lo[AXIS_X]       = -100,
1173                 .range_hi[AXIS_X]       = 100,
1174                 .range_lo[AXIS_Y]       = -100,
1175                 .range_hi[AXIS_Y]       = 100,
1176                 .range_lo[AXIS_Z]       = -1000,
1177                 .range_hi[AXIS_Z]       = -300,
1178         },
1179 };
1180
1181 static struct akm_hal akm_hal_8975 = {
1182         .part                           = AKM_NAME_AK8975,
1183         .version                        = 2,
1184         .rr                             = akm_rr_8975,
1185         .rr_i_max                       = ARRAY_SIZE(akm_rr_8975) - 1,
1186         .milliamp                       = {
1187                 .ival                   = 3,
1188                 .fval                   = 0,
1189         },
1190         .delay_us_min                   = 10000,
1191         .asa_shift                      = 8,
1192         .reg_start_rd                   = 0x01,
1193         .reg_st1                        = 0x02,
1194         .reg_st2                        = 0x09,
1195         .reg_cntl1                      = 0x0A,
1196         .reg_mode                       = 0x0A,
1197         .reg_reset                      = 0, /* N/A */
1198         .reg_astc                       = 0x0C,
1199         .reg_asa                        = 0x10,
1200         .mode_mask                      = 0x0F,
1201         .mode_self_test                 = 0x08,
1202         .mode_rom_read                  = 0x0F,
1203         .cmode_tbl                      = NULL,
1204         .irq                            = true,
1205 #if AKM_NVI_MPU_SUPPORT
1206         .mpu_id                         = COMPASS_ID_AK8975,
1207 #endif /* AKM_NVI_MPU_SUPPORT */
1208 };
1209
1210 static struct akm_rr akm_rr_8963[] = {
1211         {
1212                 .max_range              = {
1213                         .ival           = 9825,
1214                         .fval           = 0,
1215                 },
1216                 .resolution             = {
1217                         .ival           = 0,
1218                         .fval           = 600000,
1219                 },
1220                 .range_lo[AXIS_X]       = -50,
1221                 .range_hi[AXIS_X]       = 50,
1222                 .range_lo[AXIS_Y]       = -50,
1223                 .range_hi[AXIS_Y]       = 50,
1224                 .range_lo[AXIS_Z]       = -800,
1225                 .range_hi[AXIS_Z]       = -200,
1226         },
1227         {
1228                 .max_range              = {
1229                         .ival           = 9825,
1230                         .fval           = 0,
1231                 },
1232                 .resolution             = {
1233                         .ival           = 0,
1234                         .fval           = 150000,
1235                 },
1236                 .range_lo[AXIS_X]       = -200,
1237                 .range_hi[AXIS_X]       = 200,
1238                 .range_lo[AXIS_Y]       = -200,
1239                 .range_hi[AXIS_Y]       = 200,
1240                 .range_lo[AXIS_Z]       = -3200,
1241                 .range_hi[AXIS_Z]       = -800,
1242         },
1243 };
1244
1245 static struct akm_cmode akm_cmode_8963[] = {
1246         {
1247                 .t_us                   = 125000,
1248                 .mode                   = 0x02,
1249         },
1250         {
1251                 .t_us                   = 10000,
1252                 .mode                   = 0x04,
1253         },
1254         {},
1255 };
1256
1257 static struct akm_hal akm_hal_8963 = {
1258         .part                           = AKM_NAME_AK8963,
1259         .version                        = 2,
1260         .rr                             = akm_rr_8963,
1261         .rr_i_max                       = ARRAY_SIZE(akm_rr_8963) - 1,
1262         .milliamp                       = {
1263                 .ival                   = 2,
1264                 .fval                   = 800000,
1265         },
1266         .delay_us_min                   = 10000,
1267         .asa_shift                      = 8,
1268         .reg_start_rd                   = 0x01,
1269         .reg_st1                        = 0x02,
1270         .reg_st2                        = 0x09,
1271         .reg_cntl1                      = 0x0A,
1272         .reg_mode                       = 0x0A,
1273         .reg_reset                      = 0x0B,
1274         .reg_astc                       = 0x0C,
1275         .reg_asa                        = 0x10,
1276         .mode_mask                      = 0x0F,
1277         .mode_self_test                 = 0x08,
1278         .mode_rom_read                  = 0x0F,
1279         .cmode_tbl                      = akm_cmode_8963,
1280         .irq                            = true,
1281 #if AKM_NVI_MPU_SUPPORT
1282         .mpu_id                         = COMPASS_ID_AK8963,
1283 #endif /* AKM_NVI_MPU_SUPPORT */
1284 };
1285
1286 static int akm_id_hal(struct akm_state *st, u8 dev_id)
1287 {
1288         int ret = 0;
1289
1290         switch (dev_id) {
1291         case AKM_DEVID_AK09911:
1292                 st->hal = &akm_hal_09911;
1293                 break;
1294
1295         case AKM_DEVID_AK8975:
1296                 st->hal = &akm_hal_8975;
1297                 break;
1298
1299         case AKM_DEVID_AK8963:
1300                 st->hal = &akm_hal_8963;
1301                 break;
1302
1303         default:
1304                 st->hal = &akm_hal_8975;
1305                 ret = -ENODEV;
1306         }
1307         st->rr_i = st->hal->rr_i_max;
1308         st->cfg.name = "magnetic_field";
1309         st->cfg.kbuf_sz = AKM_KBUF_SIZE;
1310         st->cfg.snsr_data_n = 8; /* two bytes for status */
1311         st->cfg.ch_n = AXIS_N;
1312         st->cfg.ch_sz = -2;
1313         st->cfg.part = st->hal->part;
1314         st->cfg.vendor = AKM_VENDOR;
1315         st->cfg.version = st->hal->version;
1316         st->cfg.max_range.ival = st->hal->rr[st->rr_i].max_range.ival;
1317         st->cfg.max_range.fval = st->hal->rr[st->rr_i].max_range.fval;
1318         st->cfg.resolution.ival = st->hal->rr[st->rr_i].resolution.ival;
1319         st->cfg.resolution.fval = st->hal->rr[st->rr_i].resolution.fval;
1320         st->cfg.milliamp.ival = st->hal->milliamp.ival;
1321         st->cfg.milliamp.fval = st->hal->milliamp.fval;
1322         st->cfg.delay_us_min = st->hal->delay_us_min;
1323         st->cfg.delay_us_max = AKM_DELAY_US_MAX;
1324         st->cfg.scale.ival = st->hal->rr[st->rr_i].resolution.ival;
1325         st->cfg.scale.fval = st->hal->rr[st->rr_i].resolution.fval;
1326         nvs_of_dt(st->i2c->dev.of_node, &st->cfg, NULL);
1327         return ret;
1328 }
1329
1330 static int akm_id_compare(struct akm_state *st, const char *name)
1331 {
1332         u8 wia;
1333         u8 val;
1334         int ret;
1335         int ret_t;
1336
1337         ret_t = akm_nvi_mpu_bypass_request(st);
1338         if (!ret_t) {
1339                 ret_t = akm_i2c_rd(st, AKM_REG_WIA2, 1, &wia);
1340                 if (ret_t)
1341                         wia = 0;
1342                 akm_id_hal(st, wia);
1343                 if (wia != AKM_DEVID_AK09911) {
1344                         /* we can autodetect AK8963 with BITM */
1345                         ret = akm_i2c_wr(st, st->hal->reg_mode,
1346                                          AKM_BIT_BITM);
1347                         if (ret) {
1348                                 ret_t |= ret;
1349                         } else {
1350                                 ret = akm_i2c_rd(st, st->hal->reg_st2,
1351                                                  1, &val);
1352                                 if (ret) {
1353                                         ret_t |= ret;
1354                                         wia = 0;
1355                                 } else {
1356                                         if (val & AKM_BIT_BITM)
1357                                                 wia = AKM_DEVID_AK8963;
1358                                         else
1359                                                 wia = AKM_DEVID_AK8975;
1360                                         akm_id_hal(st, wia);
1361                                 }
1362                         }
1363                 }
1364                 akm_nvi_mpu_bypass_release(st);
1365                 if ((!st->dev_id) && (!wia)) {
1366                         dev_err(&st->i2c->dev, "%s ERR: %s HW ID FAIL\n",
1367                                 __func__, name);
1368                         ret = -ENODEV;
1369                 } else if ((!st->dev_id) && wia) {
1370                         st->dev_id = wia;
1371                         dev_dbg(&st->i2c->dev, "%s %s using ID %x\n",
1372                                 __func__, name, st->dev_id);
1373                 } else if (st->dev_id && (!wia)) {
1374                         dev_err(&st->i2c->dev, "%s WARN: %s HW ID FAIL\n",
1375                                 __func__, name);
1376                 } else if (st->dev_id != wia) {
1377                         dev_err(&st->i2c->dev, "%s WARN: %s != HW ID %x\n",
1378                                 __func__, name, wia);
1379                         st->dev_id = wia;
1380                 } else {
1381                         dev_dbg(&st->i2c->dev, "%s %s == HW ID %x\n",
1382                                 __func__, name, wia);
1383                 }
1384         }
1385         return ret_t;
1386 }
1387
1388 static int akm_id_dev(struct akm_state *st, const char *name)
1389 {
1390 #if AKM_NVI_MPU_SUPPORT
1391         struct nvi_mpu_port nmp;
1392         unsigned int i;
1393         u64 q30;
1394         u8 config_boot;
1395 #endif /* AKM_NVI_MPU_SUPPORT */
1396         u8 val = 0;
1397         int ret;
1398
1399         if (st->i2c->irq < 0)
1400                 st->i2c->irq = 0;
1401         if (!strcmp(name, AKM_NAME_AK8963))
1402                 st->dev_id = AKM_DEVID_AK8963;
1403         else if (!strcmp(name, AKM_NAME_AK8975))
1404                 st->dev_id = AKM_DEVID_AK8975;
1405         else if (!strcmp(name, AKM_NAME_AK09911))
1406                 st->dev_id = AKM_DEVID_AK09911;
1407 #if AKM_NVI_MPU_SUPPORT
1408         config_boot = st->nvi_config & NVI_CONFIG_BOOT_MASK;
1409         if (config_boot == NVI_CONFIG_BOOT_AUTO) {
1410                 nmp.addr = st->i2c_addr | 0x80;
1411                 nmp.reg = AKM_REG_WIA;
1412                 nmp.ctrl = 1;
1413                 ret = nvi_mpu_dev_valid(&nmp, &val);
1414                 dev_info(&st->i2c->dev, "%s AUTO ID=%x ret=%d\n",
1415                          __func__, val, ret);
1416                 /* see mpu_iio.h for possible return values */
1417                 if ((ret == -EAGAIN) || (ret == -EBUSY))
1418                         return -EAGAIN;
1419
1420                 if ((val == AKM_WIA_ID) || ((ret == -EIO) && st->dev_id))
1421                         config_boot = NVI_CONFIG_BOOT_MPU;
1422         }
1423         if (config_boot == NVI_CONFIG_BOOT_MPU) {
1424                 st->mpu_en = true;
1425                 if (st->dev_id)
1426                         ret = akm_id_hal(st, st->dev_id);
1427                 else
1428                         ret = akm_id_compare(st, name);
1429                 if (!ret) {
1430                         akm_init_hw(st);
1431                         nmp.addr = st->i2c_addr | 0x80;
1432                         nmp.reg = st->hal->reg_start_rd;
1433                         nmp.ctrl = 10; /* MPU FIFO can't handle odd size */
1434                         nmp.dmp_ctrl = 0x59; /* switch to big endian */
1435                         nmp.data_out = 0;
1436                         nmp.delay_ms = 0;
1437                         nmp.delay_us = st->poll_delay_us;
1438                         if ((st->hal->cmode_tbl != NULL) && st->i2c->irq)
1439                                 nmp.shutdown_bypass = true;
1440                         else
1441                                 nmp.shutdown_bypass = false;
1442                         nmp.handler = &akm_mpu_handler;
1443                         nmp.ext_driver = (void *)st;
1444                         memcpy(nmp.matrix, st->cfg.matrix, sizeof(nmp.matrix));
1445                         nmp.type = SECONDARY_SLAVE_TYPE_COMPASS;
1446                         nmp.id = st->hal->mpu_id;
1447                         for (i = 0; i < AXIS_N; i++) {
1448                                 q30 = st->asa_q30[i];
1449                                 q30 *= st->hal->rr[st->rr_i].resolution.fval;
1450                                 if (st->cfg.float_significance)
1451                                         do_div(q30,
1452                                                NVS_FLOAT_SIGNIFICANCE_NANO);
1453                                 else
1454                                         do_div(q30,
1455                                                NVS_FLOAT_SIGNIFICANCE_MICRO);
1456                                 nmp.q30[i] = q30;
1457                         }
1458                         ret = nvi_mpu_port_alloc(&nmp, 0);
1459                         dev_dbg(&st->i2c->dev, "%s MPU port/ret=%d\n",
1460                                 __func__, ret);
1461                         if (ret < 0)
1462                                 return ret;
1463
1464                         st->port_id[RD] = ret;
1465                         ret = 0;
1466                         if ((st->hal->cmode_tbl == NULL) || !st->i2c->irq) {
1467                                 st->i2c->irq = 0;
1468                                 nmp.addr = st->i2c_addr;
1469                                 nmp.reg = st->hal->reg_mode;
1470                                 nmp.ctrl = 1;
1471                                 nmp.dmp_ctrl = nmp.ctrl;
1472                                 nmp.data_out = AKM_MODE_SINGLE;
1473                                 nmp.delay_ms = AKM_HW_DELAY_TSM_MS;
1474                                 nmp.delay_us = 0;
1475                                 nmp.shutdown_bypass = false;
1476                                 nmp.handler = NULL;
1477                                 nmp.ext_driver = NULL;
1478                                 nmp.type = SECONDARY_SLAVE_TYPE_COMPASS;
1479                                 ret = nvi_mpu_port_alloc(&nmp, 1);
1480                                 dev_dbg(&st->i2c->dev, "%s MPU port/ret=%d\n",
1481                                         __func__, ret);
1482                                 if (ret < 0) {
1483                                         akm_ports_free(st);
1484                                         return ret;
1485                                 }
1486
1487                                 st->port_id[WR] = ret;
1488                         }
1489
1490                         nvi_mpu_fifo(st->port_id[RD],
1491                                      &st->cfg.fifo_rsrv_evnt_cnt,
1492                                      &st->cfg.fifo_max_evnt_cnt);
1493                         ret = 0;
1494                 }
1495                 return ret;
1496         }
1497 #endif /* AKM_NVI_MPU_SUPPORT */
1498         /* NVI_CONFIG_BOOT_HOST */
1499         st->mpu_en = false;
1500         if (st->dev_id) {
1501                 ret = akm_id_hal(st, st->dev_id);
1502         } else {
1503                 ret = akm_i2c_rd(st, AKM_REG_WIA, 1, &val);
1504                 dev_info(&st->i2c->dev, "%s Host read ID=%x ret=%d\n",
1505                         __func__, val, ret);
1506                 if ((!ret) && (val == AKM_WIA_ID))
1507                         ret = akm_id_compare(st, name);
1508                 else
1509                         /* setup default ptrs even though err */
1510                         akm_id_hal(st, 0);
1511         }
1512         if (!ret)
1513                 akm_init_hw(st);
1514         if (st->i2c->irq && !ret) {
1515                 if ((st->hal->cmode_tbl == NULL) || !st->hal->irq) {
1516                         nvi_disable_irq(st);
1517                         st->i2c->irq = 0;
1518                 }
1519         }
1520         return ret;
1521 }
1522
1523 static int akm_id_i2c(struct akm_state *st,
1524                       const struct i2c_device_id *id)
1525 {
1526         int i;
1527         int ret;
1528
1529         for (i = 0; i < ARRAY_SIZE(akm_i2c_addrs); i++) {
1530                 if (st->i2c->addr == akm_i2c_addrs[i])
1531                         break;
1532         }
1533
1534         if (i < ARRAY_SIZE(akm_i2c_addrs)) {
1535                 st->i2c_addr = st->i2c->addr;
1536                 ret = akm_id_dev(st, id->name);
1537         } else {
1538                 for (i = 0; i < ARRAY_SIZE(akm_i2c_addrs); i++) {
1539                         st->i2c_addr = akm_i2c_addrs[i];
1540                         ret = akm_id_dev(st, AKM_NAME);
1541                         if ((ret == -EAGAIN) || (!ret))
1542                                 break;
1543                 }
1544         }
1545         if (ret)
1546                 st->i2c_addr = 0;
1547         return ret;
1548 }
1549
1550 static int akm_of_dt(struct akm_state *st, struct device_node *dn)
1551 {
1552         char const *pchar;
1553         u8 cfg;
1554         int ret;
1555         u32 axis;
1556
1557         /* just test if global disable */
1558         ret = nvs_of_dt(dn, NULL, NULL);
1559         if (ret == -ENODEV)
1560                 return -ENODEV;
1561
1562         /* this device supports these programmable parameters */
1563         if (!(of_property_read_string(dn, "nvi_config", &pchar))) {
1564                 for (cfg = 0; cfg < ARRAY_SIZE(akm_configs); cfg++) {
1565                         if (!strcasecmp(pchar, akm_configs[cfg])) {
1566                                 st->nvi_config = cfg;
1567                                 break;
1568                         }
1569                 }
1570         }
1571
1572         /* option to handle matrix internally */
1573         cfg = 0; /* default to disable */
1574         of_property_read_u8(dn, "magnetic_field_matrix_enable", &cfg);
1575         if (cfg)
1576                 st->matrix_en = true;
1577         else
1578                 st->matrix_en = false;
1579         /* axis sensitivity adjustment overrides */
1580         if (!of_property_read_u32(dn, "ara_q30_x", &axis))
1581                 st->asa_q30[AXIS_X] = (u64)axis;
1582         if (!of_property_read_u32(dn, "ara_q30_y", &axis))
1583                 st->asa_q30[AXIS_Y] = (u64)axis;
1584         if (!of_property_read_u32(dn, "ara_q30_z", &axis))
1585                 st->asa_q30[AXIS_Z] = (u64)axis;
1586         return 0;
1587 }
1588
1589 static int akm_probe(struct i2c_client *client,
1590                      const struct i2c_device_id *id)
1591 {
1592         struct akm_state *st;
1593 #if AKM_NVI_MPU_SUPPORT
1594         struct mpu_platform_data *pd;
1595 #endif /* AKM_NVI_MPU_SUPPORT */
1596         signed char matrix[9];
1597         int ret;
1598
1599         st = devm_kzalloc(&client->dev, sizeof(*st), GFP_KERNEL);
1600         if (st == NULL) {
1601                 dev_err(&client->dev, "%s devm_kzalloc ERR\n", __func__);
1602                 return -ENOMEM;
1603         }
1604
1605         i2c_set_clientdata(client, st);
1606         st->i2c = client;
1607         if (client->dev.of_node) {
1608                 ret = akm_of_dt(st, client->dev.of_node);
1609                 if (ret < 0) {
1610                         if (ret == -ENODEV) {
1611                                 dev_info(&client->dev, "%s DT disabled\n",
1612                                          __func__);
1613                         } else {
1614                                 dev_err(&client->dev, "%s _of_dt ERR\n",
1615                                         __func__);
1616                                 ret = -ENODEV;
1617                         }
1618                         goto akm_probe_err;
1619                 }
1620 #if AKM_NVI_MPU_SUPPORT
1621         } else {
1622                 pd = (struct mpu_platform_data *)
1623                                                 dev_get_platdata(&client->dev);
1624                 memcpy(st->cfg.matrix, &pd->orientation,
1625                        sizeof(st->cfg.matrix));
1626 #endif /* AKM_NVI_MPU_SUPPORT */
1627         }
1628
1629         akm_pm_init(st);
1630         ret = akm_id_i2c(st, id);
1631         if (ret == -EAGAIN)
1632                 goto akm_probe_again;
1633         else if (ret)
1634                 goto akm_probe_err;
1635
1636         akm_pm(st, false);
1637         akm_fn_dev.errs = &st->errs;
1638         akm_fn_dev.sts = &st->sts;
1639         st->nvs = nvs_iio();
1640         if (st->nvs == NULL) {
1641                 ret = -ENODEV;
1642                 goto akm_probe_err;
1643         }
1644
1645         if (st->matrix_en) {
1646                 memcpy(matrix, st->cfg.matrix, sizeof(matrix));
1647                 memset(st->cfg.matrix, 0, sizeof(st->cfg.matrix));
1648         }
1649         ret = st->nvs->probe(&st->nvs_st, st, &client->dev,
1650                              &akm_fn_dev, &st->cfg);
1651         if (ret) {
1652                 dev_err(&client->dev, "%s nvs_probe ERR\n", __func__);
1653                 ret = -ENODEV;
1654                 goto akm_probe_err;
1655         }
1656
1657         if (st->matrix_en)
1658                 memcpy(st->cfg.matrix, matrix, sizeof(st->cfg.matrix));
1659         if (!st->mpu_en)
1660                 INIT_DELAYED_WORK(&st->dw, akm_work);
1661         if ((st->i2c->irq > 0) && !st->mpu_en) {
1662                 ret = request_threaded_irq(st->i2c->irq, NULL, akm_irq_thread,
1663                                            IRQF_TRIGGER_RISING | IRQF_ONESHOT,
1664                                            AKM_NAME, st);
1665                 if (ret) {
1666                         dev_err(&client->dev, "%s req_threaded_irq ERR %d\n",
1667                                 __func__, ret);
1668                         ret = -ENOMEM;
1669                         goto akm_probe_err;
1670                 }
1671         }
1672
1673         dev_info(&client->dev, "%s done\n", __func__);
1674         return 0;
1675
1676 akm_probe_err:
1677         dev_err(&client->dev, "%s ERR %d\n", __func__, ret);
1678 akm_probe_again:
1679         akm_remove(client);
1680         return ret;
1681 }
1682
1683 static const struct i2c_device_id akm_i2c_device_id[] = {
1684         { AKM_NAME, 0 },
1685         { AKM_NAME_AK8963, 0 },
1686         { AKM_NAME_AK8975, 0 },
1687         { AKM_NAME_AK09911, 0 },
1688         {}
1689 };
1690
1691 MODULE_DEVICE_TABLE(i2c, akm_i2c_device_id);
1692
1693 static const struct of_device_id akm_of_match[] = {
1694         { .compatible = "ak,ak89xx", },
1695         { .compatible = "ak,ak8963", },
1696         { .compatible = "ak,ak8975", },
1697         { .compatible = "ak,ak09911", },
1698         {}
1699 };
1700
1701 MODULE_DEVICE_TABLE(of, akm_of_match);
1702
1703 static struct i2c_driver akm_driver = {
1704         .class                          = I2C_CLASS_HWMON,
1705         .probe                          = akm_probe,
1706         .remove                         = akm_remove,
1707         .shutdown                       = akm_shutdown,
1708         .driver                         = {
1709                 .name                   = AKM_NAME,
1710                 .owner                  = THIS_MODULE,
1711                 .of_match_table         = of_match_ptr(akm_of_match),
1712 #ifdef CONFIG_PM_SLEEP
1713                 .pm                     = &akm_pm_ops,
1714 #endif
1715         },
1716         .id_table                       = akm_i2c_device_id,
1717 };
1718
1719 static int __init akm_init(void)
1720 {
1721         return i2c_add_driver(&akm_driver);
1722 }
1723
1724 static void __exit akm_exit(void)
1725 {
1726         i2c_del_driver(&akm_driver);
1727 }
1728
1729 late_initcall(akm_init);
1730 module_exit(akm_exit);
1731
1732 MODULE_LICENSE("GPL");
1733 MODULE_DESCRIPTION("AKM driver");
1734 MODULE_AUTHOR("NVIDIA Corporation");
1735