drivers/staging/iio/meter/ina3221.c

   1 /*
   2  * ina3221.c - driver for TI INA3221
   3  *
   4  * Copyright (c) 2014-2015, NVIDIA CORPORATION.  All rights reserved.
   5  *
   6  * Based on hwmon driver:
   7  *              drivers/hwmon/ina3221.c
   8  * and contributed by:
   9  *              Deepak Nibade <dnibade@nvidia.com>
  10  *              Timo Alho <talho@nvidia.com>
  11  *              Anshul Jain <anshulj@nvidia.com>
  12  *
  13  * This program is free software. you can redistribute it and/or modify
  14  * it under the terms of the GNU General Public License as published by
  15  * the Free Software Foundation.
  16  *
  17  * This program is distributed in the hope that it will be useful, but WITHOUT
  18  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  19  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  20  * more details.
  21  */
  22
  23 #include <linux/cpu.h>
  24 #include <linux/cpufreq.h>
  25 #include <linux/device.h>
  26 #include <linux/err.h>
  27 #include <linux/i2c.h>
  28 #include <linux/iio/iio.h>
  29 #include <linux/iio/sysfs.h>
  30 #include <linux/init.h>
  31 #include <linux/kernel.h>
  32 #include <linux/module.h>
  33 #include <linux/mutex.h>
  34 #include <linux/of.h>
  35 #include <linux/sysfs.h>
  36 #include <linux/slab.h>
  37
  38 #define INA3221_CONFIG                  0x00
  39 #define INA3221_SHUNT_VOL_CHAN1         0x01
  40 #define INA3221_BUS_VOL_CHAN1           0x02
  41 #define INA3221_SHUNT_VOL_CHAN2         0x03
  42 #define INA3221_BUS_VOL_CHAN2           0x04
  43 #define INA3221_SHUNT_VOL_CHAN3         0x05
  44 #define INA3221_BUS_VOL_CHAN3           0x06
  45 #define INA3221_CRIT_CHAN1              0x07
  46 #define INA3221_WARN_CHAN1              0x08
  47 #define INA3221_CRIT_CHAN2              0x09
  48 #define INA3221_WARN_CHAN2              0x0A
  49 #define INA3221_CRIT_CHAN3              0x0B
  50 #define INA3221_WARN_CHAN3              0x0C
  51 #define INA3221_MASK_ENABLE             0x0F
  52
  53 #define INA3221_SHUNT_VOL(i)            (INA3221_SHUNT_VOL_CHAN1 + (i) * 2)
  54 #define INA3221_BUS_VOL(i)              (INA3221_BUS_VOL_CHAN1 + (i) * 2)
  55 #define INA3221_CRIT(i)                 (INA3221_CRIT_CHAN1 + (i) * 2)
  56 #define INA3221_WARN(i)                 (INA3221_WARN_CHAN1 + (i) * 2)
  57
  58 #define INA3221_RESET                   0x8000
  59 #define INA3221_POWER_DOWN              0
  60 #define INA3221_ENABLE_CHAN             (7 << 12) /* enable all 3 channels */
  61 #define INA3221_AVG                     (3 << 9) /* 64 averages */
  62 #define INA3221_VBUS_CT                 (4 << 6) /* Vbus 1.1 mS conv time */
  63 #define INA3221_VSHUNT_CT               (4 << 3) /* Vshunt 1.1 mS conv time */
  64 #define INA3221_CONT_MODE               7 /* continuous bus n shunt V measure */
  65 #define INA3221_TRIG_MODE               3 /* triggered bus n shunt V measure */
  66
  67 #define INA3221_CONT_CONFIG_DATA        (INA3221_ENABLE_CHAN | INA3221_AVG | \
  68                                         INA3221_VBUS_CT | INA3221_VSHUNT_CT | \
  69                                         INA3221_CONT_MODE) /* 0x7727 */
  70
  71 #define INA3221_TRIG_CONFIG_DATA        (INA3221_ENABLE_CHAN | \
  72                                         INA3221_TRIG_MODE) /* 0x7723 */
  73 #define INA3221_NUMBER_OF_RAILS         3
  74
  75 #define INA3221_CVRF                    0x01
  76
  77 #define CPU_THRESHOLD                   2
  78 #define CPU_FREQ_THRESHOLD              102000
  79
  80 #define INA3221_MAX_CONVERSION_TRIALS 10
  81
  82 #define PACK_MODE_CHAN(mode, chan)      ((mode) | ((chan) << 8))
  83 #define UNPACK_MODE(address)            ((address) & 0xFF)
  84 #define UNPACK_CHAN(address)            (((address) >> 8) & 0xFF)
  85
  86 #define U32_MINUS_1     ((u32) -1)
  87 enum {
  88         CHANNEL_NAME = 0,
  89         CRIT_CURRENT_LIMIT,
  90         WARN_CURRENT_LIMIT,
  91         RUNNING_MODE,
  92         VBUS_VOLTAGE_CURRENT,
  93 };
  94
  95 enum mode {
  96         TRIGGERED = 0,
  97         FORCED_TRIGGERED = 1,
  98         CONTINUOUS = 2,
  99         FORCED_CONTINUOUS = 3,
 100 };
 101
 102 #define IS_TRIGGERED(x) (!((x) & 2))
 103 #define IS_CONTINUOUS(x) ((x) & 2)
 104
 105 struct ina3221_chan_pdata {
 106         const char *rail_name;
 107         u32 warn_conf_limits;
 108         u32 crit_conf_limits;
 109         u32 shunt_resistor;
 110 };
 111
 112 struct ina3221_platform_data {
 113         u16 cont_conf_data;
 114         u16 trig_conf_data;
 115         bool enable_forced_continuous;
 116         struct ina3221_chan_pdata cpdata[INA3221_NUMBER_OF_RAILS];
 117 };
 118
 119 struct ina3221_chip {
 120         struct device *dev;
 121         struct i2c_client *client;
 122         struct ina3221_platform_data *pdata;
 123         struct mutex mutex;
 124         int shutdown_complete;
 125         int is_suspended;
 126         int mode;
 127         int alert_enabled;
 128         struct notifier_block nb_hot;
 129         struct notifier_block nb_cpufreq;
 130 };
 131
 132 static int __locked_ina3221_switch_mode(struct ina3221_chip *chip,
 133                 int cpus, int cpufreq);
 134
 135 static inline struct ina3221_chip *to_ina3221_chip(struct device *dev)
 136 {
 137         struct i2c_client *client = to_i2c_client(dev);
 138         struct iio_dev *indio_dev = i2c_get_clientdata(client);
 139         return iio_priv(indio_dev);
 140 }
 141
 142 static inline int shuntv_register_to_uv(u16 reg)
 143 {
 144         int ret = (s16)reg;
 145
 146         return (ret >> 3) * 40;
 147 }
 148
 149 static inline u16 uv_to_shuntv_register(s32 uv)
 150 {
 151         return (u16)(uv/5);
 152 }
 153
 154 static inline int busv_register_to_mv(u16 reg)
 155 {
 156         int ret = (s16)reg;
 157
 158         return (ret >> 3) * 8;
 159 }
 160
 161 /* convert shunt voltage register value to current (in mA) */
 162 static int shuntv_register_to_ma(u16 reg, int resistance)
 163 {
 164         int uv, ma;
 165
 166         uv = (s16)reg;
 167         uv = ((uv >> 3) * 40); /* LSB (4th bit) is 40uV */
 168         /*
 169          * calculate uv/resistance with rounding knowing that C99 truncates
 170          * towards zero
 171          */
 172         if (uv > 0)
 173                 ma = ((uv * 2 / resistance) + 1) / 2;
 174         else
 175                 ma = ((uv * 2 / resistance) - 1) / 2;
 176         return ma;
 177 }
 178
 179 static int __locked_power_down_ina3221(struct ina3221_chip *chip)
 180 {
 181         int ret;
 182
 183         ret = i2c_smbus_write_word_data(chip->client, INA3221_CONFIG,
 184                                 INA3221_POWER_DOWN);
 185         if (ret < 0)
 186                 dev_err(chip->dev, "Power down failed: %d", ret);
 187         return ret;
 188 }
 189
 190 static int __locked_power_up_ina3221(struct ina3221_chip *chip, int config)
 191 {
 192         int ret;
 193
 194         ret = i2c_smbus_write_word_data(chip->client, INA3221_CONFIG,
 195                                         cpu_to_be16(config));
 196         if (ret < 0)
 197                 dev_err(chip->dev, "Power up failed: %d\n", ret);
 198         return ret;
 199 }
 200
 201 static int __locked_start_conversion(struct ina3221_chip *chip)
 202 {
 203         int ret, cvrf, trials = 0;
 204
 205         if (IS_TRIGGERED(chip->mode)) {
 206                 ret = __locked_power_up_ina3221(chip,
 207                                                 chip->pdata->trig_conf_data);
 208
 209                 if (ret < 0)
 210                         return ret;
 211
 212                 /* wait till conversion ready bit is set */
 213                 do {
 214                         ret = i2c_smbus_read_word_data(chip->client,
 215                                                        INA3221_MASK_ENABLE);
 216                         if (ret < 0) {
 217                                 dev_err(chip->dev, "MASK read failed: %d\n",
 218                                         ret);
 219                                 return ret;
 220                         }
 221                         cvrf = be16_to_cpu(ret) & INA3221_CVRF;
 222                 } while ((!cvrf) && (++trials < INA3221_MAX_CONVERSION_TRIALS));
 223                 if (trials == INA3221_MAX_CONVERSION_TRIALS) {
 224                         dev_err(chip->dev, "maximum retries exceeded\n");
 225                         return -EAGAIN;
 226                 }
 227         }
 228
 229         return 0;
 230 }
 231
 232 static int __locked_end_conversion(struct ina3221_chip *chip)
 233 {
 234         int ret = 0;
 235
 236         if (IS_TRIGGERED(chip->mode))
 237                 ret = __locked_power_down_ina3221(chip);
 238
 239         return ret;
 240 }
 241
 242 static int __locked_do_conversion(struct ina3221_chip *chip, u16 *vsh,
 243                   u16 *vbus, int ch)
 244 {
 245         struct i2c_client *client = chip->client;
 246         int ret;
 247
 248         ret = __locked_start_conversion(chip);
 249         if (ret < 0)
 250                 return ret;
 251
 252         if (vsh) {
 253                 ret = i2c_smbus_read_word_data(client, INA3221_SHUNT_VOL(ch));
 254                 if (ret < 0)
 255                         return ret;
 256                 *vsh = be16_to_cpu(ret);
 257         }
 258
 259         if (vbus) {
 260                 ret = i2c_smbus_read_word_data(client, INA3221_BUS_VOL(ch));
 261                 if (ret < 0)
 262                         return ret;
 263                 *vbus = be16_to_cpu(ret);
 264         }
 265
 266         return __locked_end_conversion(chip);
 267 }
 268
 269 static int ina3221_get_mode(struct ina3221_chip *chip, char *buf)
 270 {
 271         int v;
 272
 273         mutex_lock(&chip->mutex);
 274         if (chip->shutdown_complete) {
 275                 mutex_unlock(&chip->mutex);
 276                 return -EIO;
 277         }
 278
 279         v = (IS_TRIGGERED(chip->mode)) ? 0 : 1;
 280         mutex_unlock(&chip->mutex);
 281         return sprintf(buf, "%d\n", v);
 282 }
 283
 284 static int ina3221_set_mode_val(struct ina3221_chip *chip, long val)
 285 {
 286         int cpufreq;
 287         int cpus;
 288         int ret = 0;
 289
 290         mutex_lock(&chip->mutex);
 291
 292         if (chip->shutdown_complete) {
 293                 mutex_unlock(&chip->mutex);
 294                 return -EIO;
 295         }
 296
 297         if (val > 0) {
 298                 ret = __locked_power_up_ina3221(chip,
 299                                 chip->pdata->cont_conf_data);
 300                 if (!ret)
 301                         chip->mode = FORCED_CONTINUOUS;
 302         } else if (val == 0) {
 303                 chip->mode = FORCED_TRIGGERED;
 304                 ret = __locked_power_down_ina3221(chip);
 305         } else {
 306                 if (chip->alert_enabled) {
 307                         if (IS_TRIGGERED(chip->mode))
 308                                 chip->mode = TRIGGERED;
 309                         else
 310                                 chip->mode = CONTINUOUS;
 311                         /* evaluate the state */
 312                         cpufreq = cpufreq_quick_get(0);
 313                         cpus = num_online_cpus();
 314                         ret = __locked_ina3221_switch_mode(chip, cpus, cpufreq);
 315                 } else {
 316                         chip->mode = TRIGGERED;
 317                         ret = __locked_power_down_ina3221(chip);
 318                 }
 319         }
 320         mutex_unlock(&chip->mutex);
 321         return ret;
 322 }
 323
 324 static int ina3221_set_mode(struct ina3221_chip *chip,
 325                 const char *buf, size_t count)
 326 {
 327         long val;
 328         int ret = 0;
 329
 330         if (kstrtol(buf, 10, &val) < 0)
 331                 return -EINVAL;
 332
 333         ret = ina3221_set_mode_val(chip, val);
 334         return ret ? ret : count;
 335 }
 336
 337 static int ina3221_get_channel_voltage(struct ina3221_chip *chip,
 338                 int channel, int *voltage_mv)
 339 {
 340         u16 vbus;
 341         int ret;
 342
 343         mutex_lock(&chip->mutex);
 344
 345         if (chip->shutdown_complete) {
 346                 mutex_unlock(&chip->mutex);
 347                 return -EIO;
 348         }
 349
 350         ret = __locked_do_conversion(chip, NULL, &vbus, channel);
 351         if (ret < 0) {
 352                 dev_err(chip->dev, "Voltage read on channel %d failed: %d\n",
 353                         channel, ret);
 354                 goto exit;
 355         }
 356         *voltage_mv = busv_register_to_mv(vbus);
 357 exit:
 358         mutex_unlock(&chip->mutex);
 359         return ret;
 360 }
 361
 362 static int ina3221_get_channel_current(struct ina3221_chip *chip,
 363                 int channel, int trigger, int *current_ma)
 364 {
 365         u16 vsh;
 366         int ret = 0;
 367
 368         mutex_lock(&chip->mutex);
 369
 370         if (chip->shutdown_complete) {
 371                 mutex_unlock(&chip->mutex);
 372                 return -EIO;
 373         }
 374
 375         /* return 0 if INA is off */
 376         if (trigger && (IS_TRIGGERED(chip->mode))) {
 377                 *current_ma = 0;
 378                 goto exit;
 379         }
 380
 381         ret = __locked_do_conversion(chip, &vsh, NULL, channel);
 382         if (ret < 0) {
 383                 dev_err(chip->dev, "Current read on channel %d failed: %d\n",
 384                         channel, ret);
 385                 goto exit;
 386         }
 387         *current_ma = shuntv_register_to_ma(vsh,
 388                          chip->pdata->cpdata[channel].shunt_resistor);
 389 exit:
 390         mutex_unlock(&chip->mutex);
 391         return ret;
 392 }
 393
 394 static int ina3221_get_channel_power(struct ina3221_chip *chip,
 395                 int channel, int trigger, int *power_mw)
 396 {
 397         u16 vsh, vbus;
 398         int current_ma, voltage_mv;
 399         int ret = 0;
 400
 401         mutex_lock(&chip->mutex);
 402
 403         if (chip->shutdown_complete) {
 404                 mutex_unlock(&chip->mutex);
 405                 return -EIO;
 406         }
 407
 408         if (trigger && (IS_TRIGGERED(chip->mode))) {
 409                 *power_mw = 0;
 410                 goto exit;
 411         }
 412
 413         ret = __locked_do_conversion(chip, &vsh, &vbus, channel);
 414         if (ret < 0) {
 415                 dev_err(chip->dev, "Read on channel %d failed: %d\n",
 416                         channel, ret);
 417                 goto exit;
 418         }
 419
 420         current_ma = shuntv_register_to_ma(vsh,
 421                         chip->pdata->cpdata[channel].shunt_resistor);
 422         voltage_mv = busv_register_to_mv(vbus);
 423         *power_mw = (voltage_mv * current_ma) / 1000;
 424 exit:
 425         mutex_unlock(&chip->mutex);
 426         return ret;
 427 }
 428
 429 static int ina3221_get_channel_vbus_voltage_current(struct ina3221_chip *chip,
 430                 int channel, int *current_ma, int *voltage_mv)
 431 {
 432         u16 vsh, vbus;
 433         int ret = 0;
 434
 435         mutex_lock(&chip->mutex);
 436
 437         if (chip->shutdown_complete) {
 438                 mutex_unlock(&chip->mutex);
 439                 return -EIO;
 440         }
 441
 442         ret = __locked_do_conversion(chip, &vsh, &vbus, channel);
 443         if (ret < 0) {
 444                 dev_err(chip->dev, "Read on channel %d failed: %d\n",
 445                         channel, ret);
 446                 goto exit;
 447         }
 448
 449         *current_ma = shuntv_register_to_ma(vsh,
 450                         chip->pdata->cpdata[channel].shunt_resistor);
 451         *voltage_mv = busv_register_to_mv(vbus);
 452 exit:
 453         mutex_unlock(&chip->mutex);
 454         return ret;
 455 }
 456
 457 static int __locked_set_crit_alert_register(struct ina3221_chip *chip,
 458                                             u32 channel)
 459 {
 460         struct ina3221_chan_pdata *cpdata = &chip->pdata->cpdata[channel];
 461         int shunt_volt_limit;
 462
 463         chip->alert_enabled = 1;
 464         shunt_volt_limit = cpdata->crit_conf_limits * cpdata->shunt_resistor;
 465         shunt_volt_limit = uv_to_shuntv_register(shunt_volt_limit);
 466
 467         return i2c_smbus_write_word_data(chip->client, INA3221_CRIT(channel),
 468                                          cpu_to_be16(shunt_volt_limit));
 469 }
 470
 471 static int __locked_set_warn_alert_register(struct ina3221_chip *chip,
 472                                             u32 channel)
 473 {
 474         struct ina3221_chan_pdata *cpdata = &chip->pdata->cpdata[channel];
 475         int shunt_volt_limit;
 476
 477         chip->alert_enabled = 1;
 478         shunt_volt_limit = cpdata->warn_conf_limits * cpdata->shunt_resistor;
 479         shunt_volt_limit = uv_to_shuntv_register(shunt_volt_limit);
 480         return i2c_smbus_write_word_data(chip->client, INA3221_WARN(channel),
 481                                          cpu_to_be16(shunt_volt_limit));
 482 }
 483
 484 static int __locked_set_crit_warn_limits(struct ina3221_chip *chip)
 485 {
 486         struct ina3221_chan_pdata *cpdata;
 487         int i;
 488         int ret = 0;
 489
 490         for (i = 0; i < INA3221_NUMBER_OF_RAILS; i++) {
 491                 cpdata = &chip->pdata->cpdata[i];
 492
 493                 if (cpdata->crit_conf_limits != U32_MINUS_1) {
 494                         ret = __locked_set_crit_alert_register(chip, i);
 495                         if (ret < 0)
 496                                 break;
 497                 }
 498
 499                 if (cpdata->warn_conf_limits != U32_MINUS_1) {
 500                         ret = __locked_set_warn_alert_register(chip, i);
 501                         if (ret < 0)
 502                                 break;
 503                 }
 504         }
 505         return ret;
 506 }
 507
 508 static int ina3221_set_channel_critical(struct ina3221_chip *chip,
 509         int channel, int curr_limit)
 510 {
 511         struct ina3221_chan_pdata *cpdata = &chip->pdata->cpdata[channel];
 512         int ret;
 513
 514         mutex_lock(&chip->mutex);
 515
 516         if (chip->shutdown_complete) {
 517                 mutex_unlock(&chip->mutex);
 518                 return -EIO;
 519         }
 520
 521         cpdata->crit_conf_limits = curr_limit;
 522         ret = __locked_set_crit_alert_register(chip, channel);
 523         mutex_unlock(&chip->mutex);
 524         return ret;
 525 }
 526
 527 static int ina3221_get_channel_critical(struct ina3221_chip *chip,
 528         int channel, int *curr_limit)
 529 {
 530         struct ina3221_chan_pdata *cpdata = &chip->pdata->cpdata[channel];
 531         u32 crit_reg_addr = INA3221_CRIT(channel);
 532         int ret;
 533
 534         mutex_lock(&chip->mutex);
 535
 536         if (chip->shutdown_complete) {
 537                 mutex_unlock(&chip->mutex);
 538                 return -EIO;
 539         }
 540
 541         /* getting voltage readings in micro volts*/
 542         ret = i2c_smbus_read_word_data(chip->client, crit_reg_addr);
 543         if (ret < 0) {
 544                 dev_err(chip->dev, "Channel %d crit register read failed: %d\n",
 545                         channel, ret);
 546                 goto exit;
 547         }
 548
 549         *curr_limit = shuntv_register_to_ma(be16_to_cpu(ret),
 550                         cpdata->shunt_resistor);
 551         ret = 0;
 552 exit:
 553         mutex_unlock(&chip->mutex);
 554         return ret;
 555 }
 556
 557 static int ina3221_set_channel_warning(struct ina3221_chip *chip,
 558         int channel, int curr_limit)
 559 {
 560         struct ina3221_chan_pdata *cpdata = &chip->pdata->cpdata[channel];
 561         int ret;
 562
 563         mutex_lock(&chip->mutex);
 564
 565         if (chip->shutdown_complete) {
 566                 mutex_unlock(&chip->mutex);
 567                 return -EIO;
 568         }
 569
 570         cpdata->warn_conf_limits = curr_limit;
 571         ret = __locked_set_warn_alert_register(chip, channel);
 572         mutex_unlock(&chip->mutex);
 573         return ret;
 574 }
 575
 576 static int ina3221_get_channel_warning(struct ina3221_chip *chip,
 577         int channel, int *curr_limit)
 578 {
 579         struct ina3221_chan_pdata *cpdata = &chip->pdata->cpdata[channel];
 580         u32 warn_reg_addr = INA3221_WARN(channel);
 581         int ret;
 582
 583         mutex_lock(&chip->mutex);
 584
 585         if (chip->shutdown_complete) {
 586                 mutex_unlock(&chip->mutex);
 587                 return -EIO;
 588         }
 589
 590         /* get warning shunt voltage threshold in micro volts. */
 591         ret = i2c_smbus_read_word_data(chip->client, warn_reg_addr);
 592         if (ret < 0) {
 593                 dev_err(chip->dev, "Channel %d warn register read failed: %d\n",
 594                         channel, ret);
 595                 goto exit;
 596         }
 597
 598         /* convert shunt voltage to current in mA */
 599         *curr_limit = shuntv_register_to_ma(be16_to_cpu(ret),
 600                         cpdata->shunt_resistor);
 601         ret = 0;
 602 exit:
 603         mutex_unlock(&chip->mutex);
 604         return ret;
 605 }
 606
 607 static int __locked_ina3221_switch_mode(struct ina3221_chip *chip,
 608                    int cpus, int cpufreq)
 609 {
 610         int ret = 0;
 611
 612         if (!chip->alert_enabled)
 613                 return 0;
 614
 615         switch (chip->mode) {
 616         case TRIGGERED:
 617                 if ((cpus >= CPU_THRESHOLD) ||
 618                                 (cpufreq >= CPU_FREQ_THRESHOLD)) {
 619                         /**
 620                          * Turn INA on when cpu frequency crosses threshold or
 621                          * number of cpus crosses threshold
 622                          */
 623                         dev_vdbg(chip->dev, "Turn-on cpus:%d, cpufreq:%d\n",
 624                                 cpus, cpufreq);
 625
 626                         ret = __locked_power_up_ina3221(chip,
 627                                         chip->pdata->cont_conf_data);
 628                         if (ret < 0) {
 629                                 dev_err(chip->dev, "INA power up failed: %d\n",
 630                                         ret);
 631                                 return ret;
 632                         }
 633                         chip->mode = CONTINUOUS;
 634                 }
 635                 break;
 636         case CONTINUOUS:
 637                  if ((cpus < CPU_THRESHOLD) && (cpufreq < CPU_FREQ_THRESHOLD)) {
 638                         /*
 639                          * Turn off ina when number of cpu cores on are below
 640                          * threshold and cpu frequency are below threshold
 641                          */
 642                         dev_vdbg(chip->dev, "Turn-off, cpus:%d, cpufreq:%d\n",
 643                                 cpus, cpufreq);
 644
 645                         ret = __locked_power_down_ina3221(chip);
 646                         if (ret < 0) {
 647                                 dev_err(chip->dev,
 648                                         "INA power down failed:%d\n", ret);
 649                                 return ret;
 650                         }
 651                         chip->mode = TRIGGERED;
 652                 }
 653                 break;
 654         case FORCED_CONTINUOUS:
 655         case FORCED_TRIGGERED:
 656         default:
 657                 break;
 658         }
 659         return 0;
 660 }
 661
 662 static int ina3221_cpufreq_notify(struct notifier_block *nb,
 663                 unsigned long event, void *hcpu)
 664 {
 665         struct ina3221_chip *chip = container_of(nb,
 666                                         struct ina3221_chip, nb_cpufreq);
 667         int cpufreq;
 668         int cpus;
 669         int ret = 0;
 670
 671         if (event != CPUFREQ_POSTCHANGE)
 672                 return 0;
 673
 674         mutex_lock(&chip->mutex);
 675         if (chip->is_suspended || chip->shutdown_complete)
 676                 goto exit;
 677
 678         cpufreq = ((struct cpufreq_freqs *)hcpu)->new;
 679         cpus = num_online_cpus();
 680         dev_vdbg(chip->dev, "CPUfreq notified freq:%d cpus:%d\n",
 681                         cpufreq, cpus);
 682         ret = __locked_ina3221_switch_mode(chip, cpus, cpufreq);
 683         if (ret < 0) {
 684                 dev_err(chip->dev, "INA change mode failed %d\n", ret);
 685                 goto exit;
 686         }
 687 exit:
 688         mutex_unlock(&chip->mutex);
 689         return ret;
 690 }
 691
 692 static int ina3221_hotplug_notify(struct notifier_block *nb,
 693                 unsigned long event, void *hcpu)
 694 {
 695         struct ina3221_chip *chip = container_of(nb,
 696                                         struct ina3221_chip, nb_hot);
 697         int cpus;
 698         int cpufreq = 0;
 699         int ret = 0;
 700
 701         if (event == CPU_ONLINE || event == CPU_DEAD) {
 702                 mutex_lock(&chip->mutex);
 703                 if (chip->is_suspended) {
 704                         mutex_unlock(&chip->mutex);
 705                         return 0;
 706                 }
 707                 if (chip->shutdown_complete) {
 708                         mutex_unlock(&chip->mutex);
 709                         return -EIO;
 710                 }
 711                 cpufreq = cpufreq_quick_get(0);
 712                 cpus = num_online_cpus();
 713                 dev_vdbg(chip->dev, "hotplug notified cpufreq:%d cpus:%d\n",
 714                                 cpufreq, cpus);
 715                 ret = __locked_ina3221_switch_mode(chip, cpus, cpufreq);
 716
 717                 if (ret < 0)
 718                         dev_err(chip->dev, "INA switch mode failed: %d\n", ret);
 719                 mutex_unlock(&chip->mutex);
 720         }
 721         return ret;
 722 }
 723
 724 static int ina3221_read_raw(struct iio_dev *indio_dev,
 725         struct iio_chan_spec const *chan, int *val, int *val2, long mask)
 726 {
 727         struct ina3221_chip *chip = iio_priv(indio_dev);
 728         struct device *dev = chip->dev;
 729         int type = chan->type;
 730         int channel = chan->channel;
 731         int address = chan->address;
 732         int ret = 0;
 733
 734         if (channel >= 3) {
 735                 dev_err(dev, "Invalid channel Id %d\n", channel);
 736                 return -EINVAL;
 737         }
 738         if (mask != IIO_CHAN_INFO_PROCESSED) {
 739                 dev_err(dev, "Invalid mask 0x%08lx\n", mask);
 740                 return -EINVAL;
 741         }
 742
 743         switch (type) {
 744         case IIO_VOLTAGE:
 745                 ret = ina3221_get_channel_voltage(chip, channel, val);
 746                 break;
 747
 748         case IIO_CURRENT:
 749                 ret = ina3221_get_channel_current(chip, channel, address, val);
 750                 break;
 751
 752         case IIO_POWER:
 753                 ret = ina3221_get_channel_power(chip, channel, address, val);
 754                 break;
 755         default:
 756                 ret = -EINVAL;
 757                 break;
 758         }
 759
 760         if (!ret)
 761                 ret = IIO_VAL_INT;
 762         return ret;
 763 }
 764
 765 static ssize_t ina3221_show_channel(struct device *dev,
 766                 struct device_attribute *attr, char *buf)
 767 {
 768         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 769         struct ina3221_chip *chip = iio_priv(indio_dev);
 770         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 771         int mode = UNPACK_MODE(this_attr->address);
 772         int channel = UNPACK_CHAN(this_attr->address);
 773         int ret;
 774         int current_ma;
 775         int voltage_mv;
 776
 777         if (channel >= 3) {
 778                 dev_err(dev, "Invalid channel Id %d\n", channel);
 779                 return -EINVAL;
 780         }
 781
 782         switch (mode) {
 783         case CHANNEL_NAME:
 784                 return sprintf(buf, "%s\n",
 785                         chip->pdata->cpdata[channel].rail_name);
 786
 787         case CRIT_CURRENT_LIMIT:
 788                 ret = ina3221_get_channel_critical(chip, channel, &current_ma);
 789                 if (!ret)
 790                         return sprintf(buf, "%d ma\n", current_ma);
 791                 return ret;
 792
 793         case WARN_CURRENT_LIMIT:
 794                 ret = ina3221_get_channel_warning(chip, channel, &current_ma);
 795                 if (!ret)
 796                         return sprintf(buf, "%d ma\n", current_ma);
 797
 798                 return ret;
 799
 800         case RUNNING_MODE:
 801                 return ina3221_get_mode(chip, buf);
 802
 803         case VBUS_VOLTAGE_CURRENT:
 804                 ret = ina3221_get_channel_vbus_voltage_current(chip,
 805                                         channel, &current_ma, &voltage_mv);
 806                 if (!ret)
 807                         return sprintf(buf, "%d %d\n", voltage_mv, current_ma);
 808                 return ret;
 809
 810         default:
 811                 break;
 812         }
 813         return -EINVAL;
 814 }
 815
 816 static ssize_t ina3221_set_channel(struct device *dev,
 817                 struct device_attribute *attr, const char *buf, size_t len)
 818 {
 819         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 820         struct ina3221_chip *chip = iio_priv(indio_dev);
 821         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 822         int mode = UNPACK_MODE(this_attr->address);
 823         int channel = UNPACK_CHAN(this_attr->address);
 824         long val;
 825         int current_ma;
 826         int ret;
 827
 828         if (channel >= 3) {
 829                 dev_err(dev, "Invalid channel Id %d\n", channel);
 830                 return -EINVAL;
 831         }
 832
 833         switch (mode) {
 834         case CRIT_CURRENT_LIMIT:
 835                 if (kstrtol(buf, 10, &val) < 0)
 836                         return -EINVAL;
 837
 838                 current_ma = (int) val;
 839                 ret = ina3221_set_channel_critical(chip, channel, current_ma);
 840                 return ret < 0 ? ret : len;
 841
 842         case WARN_CURRENT_LIMIT:
 843                 if (kstrtol(buf, 10, &val) < 0)
 844                         return -EINVAL;
 845
 846                 current_ma = (int) val;
 847                 ret = ina3221_set_channel_warning(chip, channel, current_ma);
 848                 return ret < 0 ? ret : len;
 849
 850         case RUNNING_MODE:
 851                 return ina3221_set_mode(chip, buf, len);
 852         }
 853         return -EINVAL;
 854 }
 855
 856 static IIO_DEVICE_ATTR(rail_name_0, S_IRUGO | S_IWUSR,
 857                 ina3221_show_channel, ina3221_set_channel,
 858                 PACK_MODE_CHAN(CHANNEL_NAME, 0));
 859 static IIO_DEVICE_ATTR(rail_name_1, S_IRUGO | S_IWUSR,
 860                 ina3221_show_channel, ina3221_set_channel,
 861                 PACK_MODE_CHAN(CHANNEL_NAME, 1));
 862 static IIO_DEVICE_ATTR(rail_name_2, S_IRUGO | S_IWUSR,
 863                 ina3221_show_channel, ina3221_set_channel,
 864                 PACK_MODE_CHAN(CHANNEL_NAME, 2));
 865
 866 static IIO_DEVICE_ATTR(crit_current_limit_0, S_IRUGO | S_IWUSR,
 867                 ina3221_show_channel, ina3221_set_channel,
 868                 PACK_MODE_CHAN(CRIT_CURRENT_LIMIT, 0));
 869 static IIO_DEVICE_ATTR(crit_current_limit_1, S_IRUGO | S_IWUSR,
 870                 ina3221_show_channel, ina3221_set_channel,
 871                 PACK_MODE_CHAN(CRIT_CURRENT_LIMIT, 1));
 872 static IIO_DEVICE_ATTR(crit_current_limit_2, S_IRUGO | S_IWUSR,
 873                 ina3221_show_channel, ina3221_set_channel,
 874                 PACK_MODE_CHAN(CRIT_CURRENT_LIMIT, 2));
 875
 876 static IIO_DEVICE_ATTR(warn_current_limit_0, S_IRUGO | S_IWUSR,
 877                 ina3221_show_channel, ina3221_set_channel,
 878                 PACK_MODE_CHAN(WARN_CURRENT_LIMIT, 0));
 879 static IIO_DEVICE_ATTR(warn_current_limit_1, S_IRUGO | S_IWUSR,
 880                 ina3221_show_channel, ina3221_set_channel,
 881                 PACK_MODE_CHAN(WARN_CURRENT_LIMIT, 1));
 882 static IIO_DEVICE_ATTR(warn_current_limit_2, S_IRUGO | S_IWUSR,
 883                 ina3221_show_channel, ina3221_set_channel,
 884                 PACK_MODE_CHAN(WARN_CURRENT_LIMIT, 2));
 885
 886 static IIO_DEVICE_ATTR(ui_input_0, S_IRUGO | S_IWUSR,
 887                 ina3221_show_channel, ina3221_set_channel,
 888                 PACK_MODE_CHAN(VBUS_VOLTAGE_CURRENT, 0));
 889 static IIO_DEVICE_ATTR(ui_input_1, S_IRUGO | S_IWUSR,
 890                 ina3221_show_channel, ina3221_set_channel,
 891                 PACK_MODE_CHAN(VBUS_VOLTAGE_CURRENT, 1));
 892 static IIO_DEVICE_ATTR(ui_input_2, S_IRUGO | S_IWUSR,
 893                 ina3221_show_channel, ina3221_set_channel,
 894                 PACK_MODE_CHAN(VBUS_VOLTAGE_CURRENT, 2));
 895
 896 static IIO_DEVICE_ATTR(running_mode, S_IRUGO | S_IWUSR,
 897                 ina3221_show_channel, ina3221_set_channel,
 898                 PACK_MODE_CHAN(RUNNING_MODE, 0));
 899
 900 static struct attribute *ina3221_attributes[] = {
 901         &iio_dev_attr_rail_name_0.dev_attr.attr,
 902         &iio_dev_attr_rail_name_1.dev_attr.attr,
 903         &iio_dev_attr_rail_name_2.dev_attr.attr,
 904         &iio_dev_attr_crit_current_limit_0.dev_attr.attr,
 905         &iio_dev_attr_crit_current_limit_1.dev_attr.attr,
 906         &iio_dev_attr_crit_current_limit_2.dev_attr.attr,
 907         &iio_dev_attr_warn_current_limit_0.dev_attr.attr,
 908         &iio_dev_attr_warn_current_limit_1.dev_attr.attr,
 909         &iio_dev_attr_warn_current_limit_2.dev_attr.attr,
 910         &iio_dev_attr_ui_input_0.dev_attr.attr,
 911         &iio_dev_attr_ui_input_1.dev_attr.attr,
 912         &iio_dev_attr_ui_input_2.dev_attr.attr,
 913         &iio_dev_attr_running_mode.dev_attr.attr,
 914         NULL,
 915 };
 916
 917 static const struct attribute_group ina3221_groups = {
 918         .attrs = ina3221_attributes,
 919 };
 920
 921 #define channel_type(_type, _add, _channel, _name)                      \
 922         {                                                               \
 923                 .type = _type,                                          \
 924                 .indexed = 1,                                           \
 925                 .address = _add,                                        \
 926                 .channel = _channel,                                    \
 927                 .extend_name = _name,                                   \
 928                 .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED),     \
 929         }
 930
 931 #define channel_spec(chan)                                              \
 932         channel_type(IIO_VOLTAGE, 0, chan, NULL),                       \
 933         channel_type(IIO_CURRENT, 0, chan, NULL),                       \
 934         channel_type(IIO_CURRENT, 1, chan, "trigger"),                  \
 935         channel_type(IIO_POWER, 0, chan, NULL),                         \
 936         channel_type(IIO_POWER, 1, chan, "trigger")
 937
 938 static const struct iio_chan_spec ina3221_channels_spec[] = {
 939         channel_spec(0),
 940         channel_spec(1),
 941         channel_spec(2),
 942 };
 943
 944 static const struct iio_info ina3221_info = {
 945         .attrs = &ina3221_groups,
 946         .driver_module = THIS_MODULE,
 947         .read_raw = &ina3221_read_raw,
 948 };
 949
 950 static struct ina3221_platform_data *ina3221_get_platform_data_dt(
 951         struct i2c_client *client)
 952 {
 953         struct ina3221_platform_data *pdata;
 954         struct device *dev = &client->dev;
 955         struct device_node *np = dev->of_node;
 956         struct device_node *child;
 957         u32 reg;
 958         int ret;
 959         u32 pval;
 960         int valid_channel = 0;
 961
 962         if (!np) {
 963                 dev_err(&client->dev, "Only DT supported\n");
 964                 return ERR_PTR(-ENODEV);
 965         }
 966
 967         pdata = devm_kzalloc(&client->dev, sizeof(*pdata), GFP_KERNEL);
 968         if (!pdata) {
 969                 dev_err(&client->dev, "pdata allocation failed\n");
 970                 return ERR_PTR(-ENOMEM);
 971         }
 972
 973         ret = of_property_read_u32(np, "ti,continuous-config", &pval);
 974         if (!ret)
 975                 pdata->cont_conf_data = (u16)pval;
 976
 977         ret = of_property_read_u32(np, "ti,trigger-config", &pval);
 978         if (!ret)
 979                 pdata->trig_conf_data = (u16)pval;
 980
 981         pdata->enable_forced_continuous = of_property_read_bool(np,
 982                                 "ti,enable-forced-continuous");
 983
 984         for_each_child_of_node(np, child) {
 985                 ret = of_property_read_u32(child, "reg", &reg);
 986                 if (ret || reg >= 3) {
 987                         dev_err(dev, "reg property invalid on node %s\n",
 988                                 child->name);
 989                         continue;
 990                 }
 991
 992                 pdata->cpdata[reg].rail_name =  of_get_property(child,
 993                                                 "ti,rail-name", NULL);
 994                 if (!pdata->cpdata[reg].rail_name) {
 995                         dev_err(dev, "Rail name is not provided on node %s\n",
 996                                 child->full_name);
 997                         continue;
 998                 }
 999
1000                 ret = of_property_read_u32(child, "ti,current-warning-limit-ma",
1001                                 &pval);
1002                 if (!ret)
1003                         pdata->cpdata[reg].warn_conf_limits = pval;
1004                 else
1005                         pdata->cpdata[reg].warn_conf_limits = U32_MINUS_1;
1006
1007                 ret = of_property_read_u32(child,
1008                                 "ti,current-critical-limit-ma", &pval);
1009                 if (!ret)
1010                         pdata->cpdata[reg].crit_conf_limits = pval;
1011                 else
1012                         pdata->cpdata[reg].crit_conf_limits = U32_MINUS_1;
1013
1014                 ret = of_property_read_u32(child, "ti,shunt-resistor-mohm",
1015                                 &pval);
1016                 if (!ret)
1017                         pdata->cpdata[reg].shunt_resistor = pval;
1018
1019                 valid_channel++;
1020         }
1021
1022         if (!valid_channel)
1023                 return ERR_PTR(-EINVAL);
1024
1025         return pdata;
1026 }
1027
1028 static int ina3221_probe(struct i2c_client *client,
1029                         const struct i2c_device_id *id)
1030 {
1031         struct ina3221_chip *chip;
1032         struct iio_dev *indio_dev;
1033         struct ina3221_platform_data *pdata;
1034         int ret;
1035
1036         pdata = ina3221_get_platform_data_dt(client);
1037         if (IS_ERR(pdata)) {
1038                 ret = PTR_ERR(pdata);
1039                 dev_err(&client->dev, "platform data processing failed %d\n",
1040                         ret);
1041                 return ret;
1042         }
1043
1044         indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*chip));
1045         if (!indio_dev) {
1046                 dev_err(&client->dev, "iio allocation fails\n");
1047                 return -ENOMEM;
1048         }
1049
1050         chip = iio_priv(indio_dev);
1051         chip->dev = &client->dev;
1052         chip->client = client;
1053         i2c_set_clientdata(client, indio_dev);
1054         chip->pdata = pdata;
1055         mutex_init(&chip->mutex);
1056
1057         if (pdata->enable_forced_continuous)
1058                 chip->mode = FORCED_CONTINUOUS;
1059         else
1060                 chip->mode = TRIGGERED;
1061         chip->shutdown_complete = 0;
1062         chip->is_suspended = 0;
1063
1064         indio_dev->info = &ina3221_info;
1065         indio_dev->channels = ina3221_channels_spec;
1066         indio_dev->num_channels = ARRAY_SIZE(ina3221_channels_spec);
1067         indio_dev->name = id->name;
1068         indio_dev->dev.parent = &client->dev;
1069         indio_dev->modes = INDIO_DIRECT_MODE;
1070         ret = devm_iio_device_register(chip->dev, indio_dev);
1071         if (ret < 0) {
1072                 dev_err(chip->dev, "iio registration fails with error %d\n",
1073                         ret);
1074                 return ret;
1075         }
1076
1077         /* reset ina3221 */
1078         ret = i2c_smbus_write_word_data(client, INA3221_CONFIG,
1079                 __constant_cpu_to_be16((INA3221_RESET)));
1080         if (ret < 0) {
1081                 dev_err(&client->dev, "ina3221 reset failure status: 0x%x\n",
1082                         ret);
1083                 return ret;
1084         }
1085
1086         chip->nb_hot.notifier_call = ina3221_hotplug_notify;
1087         chip->nb_cpufreq.notifier_call = ina3221_cpufreq_notify;
1088         register_hotcpu_notifier(&(chip->nb_hot));
1089         cpufreq_register_notifier(&(chip->nb_cpufreq),
1090                         CPUFREQ_TRANSITION_NOTIFIER);
1091
1092         ret = __locked_set_crit_warn_limits(chip);
1093         if (ret < 0) {
1094                 dev_info(&client->dev, "Not able to set warn and crit limits!\n");
1095                 /*Not an error condition, could let the probe continue*/
1096         }
1097
1098         if (chip->mode == FORCED_CONTINUOUS) {
1099                 ret = ina3221_set_mode_val(chip, FORCED_CONTINUOUS);
1100                 if (ret < 0) {
1101                         dev_err(&client->dev,
1102                                 "INA forced continuous failed: %d\n", ret);
1103                         goto exit_pd;
1104                 }
1105         } else {
1106                 ret = __locked_power_down_ina3221(chip);
1107                 if (ret < 0) {
1108                         dev_err(&client->dev,
1109                                 "INA power down failed: %d\n", ret);
1110                         goto exit_pd;
1111                 }
1112         }
1113         return 0;
1114
1115 exit_pd:
1116         unregister_hotcpu_notifier(&(chip->nb_hot));
1117         cpufreq_unregister_notifier(&(chip->nb_cpufreq),
1118                         CPUFREQ_TRANSITION_NOTIFIER);
1119         return ret;
1120 }
1121
1122 static int ina3221_remove(struct i2c_client *client)
1123 {
1124         struct iio_dev *indio_dev = i2c_get_clientdata(client);
1125         struct ina3221_chip *chip = iio_priv(indio_dev);
1126
1127         mutex_lock(&chip->mutex);
1128         __locked_power_down_ina3221(chip);
1129         mutex_unlock(&chip->mutex);
1130         unregister_hotcpu_notifier(&(chip->nb_hot));
1131         cpufreq_unregister_notifier(&(chip->nb_cpufreq),
1132                         CPUFREQ_TRANSITION_NOTIFIER);
1133         return 0;
1134 }
1135
1136 static void ina3221_shutdown(struct i2c_client *client)
1137 {
1138         struct iio_dev *indio_dev = i2c_get_clientdata(client);
1139         struct ina3221_chip *chip = iio_priv(indio_dev);
1140
1141         mutex_lock(&chip->mutex);
1142         __locked_power_down_ina3221(chip);
1143         chip->shutdown_complete = 1;
1144         mutex_unlock(&chip->mutex);
1145 }
1146
1147 #ifdef CONFIG_PM_SLEEP
1148 static int ina3221_suspend(struct device *dev)
1149 {
1150         struct ina3221_chip *chip = to_ina3221_chip(dev);
1151         int ret = 0;
1152
1153         mutex_lock(&chip->mutex);
1154         if (chip->mode != FORCED_CONTINUOUS) {
1155                 ret = __locked_power_down_ina3221(chip);
1156                 if (ret < 0) {
1157                         dev_err(dev, "INA can't be turned off: 0x%x\n", ret);
1158                         goto error;
1159                 }
1160         }
1161         if (chip->mode == CONTINUOUS)
1162                 chip->mode = TRIGGERED;
1163         chip->is_suspended = 1;
1164 error:
1165         mutex_unlock(&chip->mutex);
1166         return ret;
1167 }
1168
1169 static int ina3221_resume(struct device *dev)
1170 {
1171         struct ina3221_chip *chip = to_ina3221_chip(dev);
1172         int cpufreq, cpus;
1173         int ret = 0;
1174
1175         mutex_lock(&chip->mutex);
1176         if (chip->mode == FORCED_CONTINUOUS) {
1177                 ret = __locked_power_up_ina3221(chip,
1178                                                 chip->pdata->cont_conf_data);
1179         } else {
1180                 cpufreq = cpufreq_quick_get(0);
1181                 cpus = num_online_cpus();
1182                 ret = __locked_ina3221_switch_mode(chip, cpus, cpufreq);
1183         }
1184         if (ret < 0)
1185                 dev_err(dev, "INA can't be turned off/on: 0x%x\n", ret);
1186         chip->is_suspended = 0;
1187         mutex_unlock(&chip->mutex);
1188         return ret;
1189 }
1190 #endif
1191
1192 static const struct dev_pm_ops ina3221_pm_ops = {
1193         SET_SYSTEM_SLEEP_PM_OPS(ina3221_suspend,
1194                                 ina3221_resume)
1195 };
1196
1197 static const struct i2c_device_id ina3221_id[] = {
1198         {.name = "ina3221x",},
1199         {},
1200 };
1201 MODULE_DEVICE_TABLE(i2c, ina3221_id);
1202
1203 static struct i2c_driver ina3221_driver = {
1204         .driver = {
1205                 .name   = "ina3221x",
1206                 .owner = THIS_MODULE,
1207                 .pm = &ina3221_pm_ops,
1208         },
1209         .probe          = ina3221_probe,
1210         .remove         = ina3221_remove,
1211         .shutdown       = ina3221_shutdown,
1212         .id_table       = ina3221_id,
1213 };
1214
1215 module_i2c_driver(ina3221_driver);
1216
1217 MODULE_DESCRIPTION("TI INA3221 3-Channel Shunt and Bus Voltage Monitor");
1218 MODULE_AUTHOR("Deepak Nibade <dnibade@nvidia.com>");
1219 MODULE_AUTHOR("Timo Alho <talho@nvidia.com>");
1220 MODULE_AUTHOR("Anshul Jain <anshulj@nvidia.com>");
1221 MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>");
1222 MODULE_LICENSE("GPL v2");