2 * rt5640.c -- RT5640 ALSA SoC audio codec driver
4 * Copyright 2011 Realtek Semiconductor Corp.
5 * Author: Johnny Hsu <johnnyhsu@realtek.com>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
11 #include <linux/module.h>
12 #include <linux/moduleparam.h>
13 #include <linux/init.h>
14 #include <linux/delay.h>
16 #include <linux/i2c.h>
17 #include <linux/platform_device.h>
18 #include <linux/spi/spi.h>
19 #include <sound/core.h>
20 #include <sound/pcm.h>
21 #include <sound/pcm_params.h>
22 #include <sound/soc.h>
23 #include <sound/soc-dapm.h>
24 #include <sound/initval.h>
25 #include <sound/tlv.h>
28 #if defined(CONFIG_SND_SOC_RT5642_MODULE) || defined(CONFIG_SND_SOC_RT5642)
29 #include "rt5640-dsp.h"
33 #define RT5640_REG_RW 1
34 #define RT5640_DET_EXT_MIC 0
35 #define RT5639_RESET_ID 0x0008
36 #define USE_ONEBIT_DEPOP 1 /* for one bit depop */
38 #define CHECK_I2C_SHUTDOWN(r, c) { if (r && r->shutdown_complete) { \
39 dev_err(c->dev, "error: i2c state is 'shutdown'\n"); \
40 mutex_unlock(&r->lock); return -ENODEV; } }
43 struct rt5640_init_reg {
48 static struct rt5640_init_reg init_list[] = {
49 {RT5640_GEN_CTRL1 , 0x3701},/*fa[12:13] = 1'b; fa[8~10]=1; fa[0]=1 */
50 {RT5640_DEPOP_M1 , 0x0019},/* 8e[4:3] = 11'b; 8e[0] = 1'b */
51 {RT5640_DEPOP_M2 , 0x3100},/* 8f[13] = 1'b */
52 {RT5640_ADDA_CLK1 , 0x1114},/* 73[2] = 1'b */
53 {RT5640_MICBIAS , 0x3030},/* 93[5:4] = 11'b */
54 {RT5640_PRIV_INDEX , 0x003d},/* PR3d[12] = 1'b */
55 {RT5640_PRIV_DATA , 0x3600},
56 {RT5640_CLS_D_OUT , 0xa000},/* 8d[11] = 0'b */
57 {RT5640_CLS_D_OVCD , 0x0328},//8c[8] = 1'b
58 {RT5640_PRIV_INDEX , 0x001c},/* PR1c = 0D21'h */
59 {RT5640_PRIV_DATA , 0x0D21},
60 {RT5640_PRIV_INDEX , 0x001b},/* PR1B = 0D21'h */
61 {RT5640_PRIV_DATA , 0x0000},
62 {RT5640_PRIV_INDEX , 0x0012},/* PR12 = 0aa8'h */
63 {RT5640_PRIV_DATA , 0x0aa8},
64 {RT5640_PRIV_INDEX , 0x0014},/* PR14 = 0aaa'h */
65 {RT5640_PRIV_DATA , 0x0aaa},
66 {RT5640_PRIV_INDEX , 0x0020},/* PR20 = 6110'h */
67 {RT5640_PRIV_DATA , 0x6110},
68 {RT5640_PRIV_INDEX , 0x0021},/* PR21 = e0e0'h */
69 {RT5640_PRIV_DATA , 0xe0e0},
70 {RT5640_PRIV_INDEX , 0x0023},/* PR23 = 1804'h */
71 {RT5640_PRIV_DATA , 0x1804},
72 {RT5640_PRIV_INDEX , 0x006e},/* PR6E = 1804'h */
73 {RT5640_PRIV_DATA , 0x3219},
75 {RT5640_STO_DAC_MIXER , 0x1414},/*Dig inf 1 -> Sto DAC mixer -> DACL*/
76 {RT5640_OUT_L3_MIXER , 0x01fe},/*DACL1 -> OUTMIXL*/
77 {RT5640_OUT_R3_MIXER , 0x01fe},/*DACR1 -> OUTMIXR */
78 {RT5640_HP_VOL , 0x8888},/* OUTMIX -> HPVOL */
79 {RT5640_HPO_MIXER , 0xc000},/* HPVOL -> HPOLMIX */
80 /* {RT5640_HPO_MIXER , 0xa000},// DAC1 -> HPOLMIX */
81 {RT5640_CHARGE_PUMP , 0x0f00},
82 {RT5640_PRIV_INDEX , 0x0090},
83 {RT5640_PRIV_DATA , 0x2000},
84 {RT5640_PRIV_INDEX , 0x0091},
85 {RT5640_PRIV_DATA , 0x1000},
86 {RT5640_HP_CALIB_AMP_DET, 0x0420},
87 {RT5640_SPK_L_MIXER , 0x0036},/* DACL1 -> SPKMIXL */
88 {RT5640_SPK_R_MIXER , 0x0036},/* DACR1 -> SPKMIXR */
89 {RT5640_SPK_VOL , 0x8888},/* SPKMIX -> SPKVOL */
90 {RT5640_SPO_CLSD_RATIO , 0x0004},
91 {RT5640_SPO_L_MIXER , 0xe800},/* SPKVOLL -> SPOLMIX */
92 {RT5640_SPO_R_MIXER , 0x2800},/* SPKVOLR -> SPORMIX */
93 /* {RT5640_SPO_L_MIXER , 0xb800},//DAC -> SPOLMIX */
94 /* {RT5640_SPO_R_MIXER , 0x1800},//DAC -> SPORMIX */
95 /* {RT5640_I2S1_SDP , 0xD000},//change IIS1 and IIS2 */
97 {RT5640_IN1_IN2 , 0x5080},/*IN1 boost 40db & differential mode*/
98 {RT5640_IN3_IN4 , 0x0500},/*IN2 boost 40db & signal ended mode*/
99 {RT5640_REC_L2_MIXER , 0x005f},/* enable Mic1 -> RECMIXL */
100 {RT5640_REC_R2_MIXER , 0x005f},/* enable Mic1 -> RECMIXR */
101 /* {RT5640_REC_L2_MIXER , 0x006f},//Mic2 -> RECMIXL */
102 /* {RT5640_REC_R2_MIXER , 0x006f},//Mic2 -> RECMIXR */
103 {RT5640_STO_ADC_MIXER , 0x3020},/* ADC -> Sto ADC mixer */
105 #if RT5640_DET_EXT_MIC
106 {RT5640_MICBIAS , 0x3800},/* enable MICBIAS short current */
107 {RT5640_GPIO_CTRL1 , 0x8400},/* set GPIO1 to IRQ */
108 {RT5640_GPIO_CTRL3 , 0x0004},/* set GPIO1 output */
109 {RT5640_IRQ_CTRL2 , 0x8000},/*set MICBIAS short current to IRQ */
110 /*( if sticky set regBE : 8800 ) */
114 #define RT5640_INIT_REG_LEN ARRAY_SIZE(init_list)
116 static int rt5640_reg_init(struct snd_soc_codec *codec)
119 for (i = 0; i < RT5640_INIT_REG_LEN; i++)
120 snd_soc_write(codec, init_list[i].reg, init_list[i].val);
125 static int rt5640_index_sync(struct snd_soc_codec *codec)
129 for (i = 0; i < RT5640_INIT_REG_LEN; i++)
130 if (RT5640_PRIV_INDEX == init_list[i].reg ||
131 RT5640_PRIV_DATA == init_list[i].reg)
132 snd_soc_write(codec, init_list[i].reg,
137 static const u16 rt5640_reg[RT5640_VENDOR_ID2 + 1] = {
138 [RT5640_RESET] = 0x000c,
139 [RT5640_SPK_VOL] = 0xc8c8,
140 [RT5640_HP_VOL] = 0xc8c8,
141 [RT5640_OUTPUT] = 0xc8c8,
142 [RT5640_MONO_OUT] = 0x8000,
143 [RT5640_INL_INR_VOL] = 0x0808,
144 [RT5640_DAC1_DIG_VOL] = 0xafaf,
145 [RT5640_DAC2_DIG_VOL] = 0xafaf,
146 [RT5640_ADC_DIG_VOL] = 0x2f2f,
147 [RT5640_ADC_DATA] = 0x2f2f,
148 [RT5640_STO_ADC_MIXER] = 0x7060,
149 [RT5640_MONO_ADC_MIXER] = 0x7070,
150 [RT5640_AD_DA_MIXER] = 0x8080,
151 [RT5640_STO_DAC_MIXER] = 0x5454,
152 [RT5640_MONO_DAC_MIXER] = 0x5454,
153 [RT5640_DIG_MIXER] = 0xaa00,
154 [RT5640_DSP_PATH2] = 0xa000,
155 [RT5640_REC_L2_MIXER] = 0x007f,
156 [RT5640_REC_R2_MIXER] = 0x007f,
157 [RT5640_HPO_MIXER] = 0xe000,
158 [RT5640_SPK_L_MIXER] = 0x003e,
159 [RT5640_SPK_R_MIXER] = 0x003e,
160 [RT5640_SPO_L_MIXER] = 0xf800,
161 [RT5640_SPO_R_MIXER] = 0x3800,
162 [RT5640_SPO_CLSD_RATIO] = 0x0004,
163 [RT5640_MONO_MIXER] = 0xfc00,
164 [RT5640_OUT_L3_MIXER] = 0x01ff,
165 [RT5640_OUT_R3_MIXER] = 0x01ff,
166 [RT5640_LOUT_MIXER] = 0xf000,
167 [RT5640_PWR_ANLG1] = 0x00c0,
168 [RT5640_I2S1_SDP] = 0x8000,
169 [RT5640_I2S2_SDP] = 0x8000,
170 [RT5640_I2S3_SDP] = 0x8000,
171 [RT5640_ADDA_CLK1] = 0x1110,
172 [RT5640_ADDA_CLK2] = 0x0c00,
173 [RT5640_DMIC] = 0x1d00,
174 [RT5640_ASRC_3] = 0x0008,
175 [RT5640_HP_OVCD] = 0x0600,
176 [RT5640_CLS_D_OVCD] = 0x0228,
177 [RT5640_CLS_D_OUT] = 0xa800,
178 [RT5640_DEPOP_M1] = 0x0004,
179 [RT5640_DEPOP_M2] = 0x1100,
180 [RT5640_DEPOP_M3] = 0x0646,
181 [RT5640_CHARGE_PUMP] = 0x0d00,
182 [RT5640_MICBIAS] = 0x3000,
183 [RT5640_EQ_CTRL1] = 0x2080,
184 [RT5640_DRC_AGC_1] = 0xe206,
185 [RT5640_DRC_AGC_2] = 0x1f00,
186 [RT5640_DRC_AGC_3] = 0x0040,
187 [RT5640_ANC_CTRL1] = 0x034b,
188 [RT5640_ANC_CTRL2] = 0x0066,
189 [RT5640_ANC_CTRL3] = 0x000b,
190 [RT5640_GPIO_CTRL1] = 0x0400,
191 [RT5640_DSP_CTRL3] = 0x2000,
192 [RT5640_BASE_BACK] = 0x0013,
193 [RT5640_MP3_PLUS1] = 0x0680,
194 [RT5640_MP3_PLUS2] = 0x1c17,
195 [RT5640_3D_HP] = 0x8c00,
196 [RT5640_ADJ_HPF] = 0xaa20,
197 [RT5640_HP_CALIB_AMP_DET] = 0x0420,
198 [RT5640_SV_ZCD1] = 0x0809,
199 [RT5640_VENDOR_ID1] = 0x10ec,
200 [RT5640_VENDOR_ID2] = 0x6231,
201 [RT5640_VENDOR_ID2] = 0x6231,
202 /* [RT5640_PV_DET_SPK_G] = 0xc000, */
206 static int rt5640_reset(struct snd_soc_codec *codec)
208 return snd_soc_write(codec, RT5640_RESET, 0);
212 * rt5640_index_write - Write private register.
213 * @codec: SoC audio codec device.
214 * @reg: Private register index.
215 * @value: Private register Data.
217 * Modify private register for advanced setting. It can be written through
218 * private index (0x6a) and data (0x6c) register.
220 * Returns 0 for success or negative error code.
222 static int rt5640_index_write(struct snd_soc_codec *codec,
223 unsigned int reg, unsigned int value)
227 ret = snd_soc_write(codec, RT5640_PRIV_INDEX, reg);
229 dev_err(codec->dev, "Failed to set private addr: %d\n", ret);
232 ret = snd_soc_write(codec, RT5640_PRIV_DATA, value);
234 dev_err(codec->dev, "Failed to set private value: %d\n", ret);
244 * rt5640_index_read - Read private register.
245 * @codec: SoC audio codec device.
246 * @reg: Private register index.
248 * Read advanced setting from private register. It can be read through
249 * private index (0x6a) and data (0x6c) register.
251 * Returns private register value or negative error code.
253 static unsigned int rt5640_index_read(
254 struct snd_soc_codec *codec, unsigned int reg)
258 ret = snd_soc_write(codec, RT5640_PRIV_INDEX, reg);
260 dev_err(codec->dev, "Failed to set private addr: %d\n", ret);
263 return snd_soc_read(codec, RT5640_PRIV_DATA);
267 * rt5640_index_update_bits - update private register bits
268 * @codec: audio codec
269 * @reg: Private register index.
270 * @mask: register mask
273 * Writes new register value.
275 * Returns 1 for change, 0 for no change, or negative error code.
277 static int rt5640_index_update_bits(struct snd_soc_codec *codec,
278 unsigned int reg, unsigned int mask, unsigned int value)
280 unsigned int old, new;
283 ret = rt5640_index_read(codec, reg);
285 dev_err(codec->dev, "Failed to read private reg: %d\n", ret);
290 new = (old & ~mask) | (value & mask);
293 ret = rt5640_index_write(codec, reg, new);
296 "Failed to write private reg: %d\n", ret);
306 static int rt5640_volatile_register(
307 struct snd_soc_codec *codec, unsigned int reg)
311 case RT5640_PRIV_DATA:
313 case RT5640_EQ_CTRL1:
314 case RT5640_DRC_AGC_1:
315 case RT5640_ANC_CTRL1:
316 case RT5640_IRQ_CTRL2:
317 case RT5640_INT_IRQ_ST:
318 case RT5640_DSP_CTRL2:
319 case RT5640_DSP_CTRL3:
320 case RT5640_PGM_REG_ARR1:
321 case RT5640_PGM_REG_ARR3:
322 case RT5640_VENDOR_ID:
323 case RT5640_VENDOR_ID1:
324 case RT5640_VENDOR_ID2:
331 static int rt5640_readable_register(
332 struct snd_soc_codec *codec, unsigned int reg)
339 case RT5640_MONO_OUT:
342 case RT5640_INL_INR_VOL:
343 case RT5640_DAC1_DIG_VOL:
344 case RT5640_DAC2_DIG_VOL:
345 case RT5640_DAC2_CTRL:
346 case RT5640_ADC_DIG_VOL:
347 case RT5640_ADC_DATA:
348 case RT5640_ADC_BST_VOL:
349 case RT5640_STO_ADC_MIXER:
350 case RT5640_MONO_ADC_MIXER:
351 case RT5640_AD_DA_MIXER:
352 case RT5640_STO_DAC_MIXER:
353 case RT5640_MONO_DAC_MIXER:
354 case RT5640_DIG_MIXER:
355 case RT5640_DSP_PATH1:
356 case RT5640_DSP_PATH2:
357 case RT5640_DIG_INF_DATA:
358 case RT5640_REC_L1_MIXER:
359 case RT5640_REC_L2_MIXER:
360 case RT5640_REC_R1_MIXER:
361 case RT5640_REC_R2_MIXER:
362 case RT5640_HPO_MIXER:
363 case RT5640_SPK_L_MIXER:
364 case RT5640_SPK_R_MIXER:
365 case RT5640_SPO_L_MIXER:
366 case RT5640_SPO_R_MIXER:
367 case RT5640_SPO_CLSD_RATIO:
368 case RT5640_MONO_MIXER:
369 case RT5640_OUT_L1_MIXER:
370 case RT5640_OUT_L2_MIXER:
371 case RT5640_OUT_L3_MIXER:
372 case RT5640_OUT_R1_MIXER:
373 case RT5640_OUT_R2_MIXER:
374 case RT5640_OUT_R3_MIXER:
375 case RT5640_LOUT_MIXER:
376 case RT5640_PWR_DIG1:
377 case RT5640_PWR_DIG2:
378 case RT5640_PWR_ANLG1:
379 case RT5640_PWR_ANLG2:
380 case RT5640_PWR_MIXER:
382 case RT5640_PRIV_INDEX:
383 case RT5640_PRIV_DATA:
384 case RT5640_I2S1_SDP:
385 case RT5640_I2S2_SDP:
386 case RT5640_I2S3_SDP:
387 case RT5640_ADDA_CLK1:
388 case RT5640_ADDA_CLK2:
391 case RT5640_PLL_CTRL1:
392 case RT5640_PLL_CTRL2:
399 case RT5640_CLS_D_OVCD:
400 case RT5640_CLS_D_OUT:
401 case RT5640_DEPOP_M1:
402 case RT5640_DEPOP_M2:
403 case RT5640_DEPOP_M3:
404 case RT5640_CHARGE_PUMP:
405 case RT5640_PV_DET_SPK_G:
407 case RT5640_EQ_CTRL1:
408 case RT5640_EQ_CTRL2:
409 case RT5640_WIND_FILTER:
410 case RT5640_DRC_AGC_1:
411 case RT5640_DRC_AGC_2:
412 case RT5640_DRC_AGC_3:
414 case RT5640_ANC_CTRL1:
415 case RT5640_ANC_CTRL2:
416 case RT5640_ANC_CTRL3:
419 case RT5640_IRQ_CTRL1:
420 case RT5640_IRQ_CTRL2:
421 case RT5640_INT_IRQ_ST:
422 case RT5640_GPIO_CTRL1:
423 case RT5640_GPIO_CTRL2:
424 case RT5640_GPIO_CTRL3:
425 case RT5640_DSP_CTRL1:
426 case RT5640_DSP_CTRL2:
427 case RT5640_DSP_CTRL3:
428 case RT5640_DSP_CTRL4:
429 case RT5640_PGM_REG_ARR1:
430 case RT5640_PGM_REG_ARR2:
431 case RT5640_PGM_REG_ARR3:
432 case RT5640_PGM_REG_ARR4:
433 case RT5640_PGM_REG_ARR5:
434 case RT5640_SCB_FUNC:
435 case RT5640_SCB_CTRL:
436 case RT5640_BASE_BACK:
437 case RT5640_MP3_PLUS1:
438 case RT5640_MP3_PLUS2:
441 case RT5640_HP_CALIB_AMP_DET:
442 case RT5640_HP_CALIB2:
445 case RT5640_GEN_CTRL1:
446 case RT5640_GEN_CTRL2:
447 case RT5640_GEN_CTRL3:
448 case RT5640_VENDOR_ID:
449 case RT5640_VENDOR_ID1:
450 case RT5640_VENDOR_ID2:
451 case RT5640_DUMMY_PR3F:
458 void DC_Calibrate(struct snd_soc_codec *codec)
460 unsigned int sclk_src;
462 sclk_src = snd_soc_read(codec, RT5640_GLB_CLK) &
463 RT5640_SCLK_SRC_MASK;
465 snd_soc_update_bits(codec, RT5640_PWR_ANLG2,
466 RT5640_PWR_MB1, RT5640_PWR_MB1);
467 snd_soc_update_bits(codec, RT5640_DEPOP_M2,
468 RT5640_DEPOP_MASK, RT5640_DEPOP_MAN);
469 snd_soc_update_bits(codec, RT5640_DEPOP_M1,
470 RT5640_HP_CP_MASK | RT5640_HP_SG_MASK | RT5640_HP_CB_MASK,
471 RT5640_HP_CP_PU | RT5640_HP_SG_DIS | RT5640_HP_CB_PU);
473 snd_soc_update_bits(codec, RT5640_GLB_CLK,
474 RT5640_SCLK_SRC_MASK, 0x2 << RT5640_SCLK_SRC_SFT);
476 rt5640_index_write(codec, RT5640_HP_DCC_INT1, 0x9f00);
477 snd_soc_update_bits(codec, RT5640_PWR_ANLG2,
479 snd_soc_update_bits(codec, RT5640_GLB_CLK,
480 RT5640_SCLK_SRC_MASK, sclk_src);
484 int rt5640_headset_detect(struct snd_soc_codec *codec, int jack_insert)
489 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
490 mutex_lock(&rt5640->lock);
491 CHECK_I2C_SHUTDOWN(rt5640, codec)
494 reg63 = snd_soc_read(codec, RT5640_PWR_ANLG1);
495 reg64 = snd_soc_read(codec, RT5640_PWR_ANLG2);
496 if (SND_SOC_BIAS_OFF == codec->dapm.bias_level) {
497 snd_soc_write(codec, RT5640_PWR_ANLG1, 0x2004);
498 snd_soc_write(codec, RT5640_MICBIAS, 0x3830);
499 snd_soc_write(codec, RT5640_GEN_CTRL1 , 0x3701);
501 sclk_src = snd_soc_read(codec, RT5640_GLB_CLK) &
502 RT5640_SCLK_SRC_MASK;
503 snd_soc_update_bits(codec, RT5640_GLB_CLK,
504 RT5640_SCLK_SRC_MASK, 0x3 << RT5640_SCLK_SRC_SFT);
505 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
506 RT5640_PWR_LDO2, RT5640_PWR_LDO2);
507 snd_soc_update_bits(codec, RT5640_PWR_ANLG2,
508 RT5640_PWR_MB1, RT5640_PWR_MB1);
509 snd_soc_update_bits(codec, RT5640_MICBIAS,
510 RT5640_MIC1_OVCD_MASK | RT5640_MIC1_OVTH_MASK |
511 RT5640_PWR_CLK25M_MASK | RT5640_PWR_MB_MASK,
512 RT5640_MIC1_OVCD_EN | RT5640_MIC1_OVTH_600UA |
513 RT5640_PWR_MB_PU | RT5640_PWR_CLK25M_PU);
514 snd_soc_update_bits(codec, RT5640_GEN_CTRL1,
517 if (snd_soc_read(codec, RT5640_IRQ_CTRL2) & 0x8)
518 jack_type = RT5640_HEADPHO_DET;
520 jack_type = RT5640_HEADSET_DET;
521 snd_soc_update_bits(codec, RT5640_IRQ_CTRL2,
522 RT5640_MB1_OC_CLR, 0);
523 snd_soc_update_bits(codec, RT5640_GLB_CLK,
524 RT5640_SCLK_SRC_MASK, sclk_src);
525 snd_soc_write(codec, RT5640_PWR_ANLG1, reg63);
526 snd_soc_write(codec, RT5640_PWR_ANLG2, reg64);
528 snd_soc_update_bits(codec, RT5640_MICBIAS,
529 RT5640_MIC1_OVCD_MASK,
530 RT5640_MIC1_OVCD_DIS);
532 jack_type = RT5640_NO_JACK;
535 mutex_unlock(&rt5640->lock);
538 EXPORT_SYMBOL(rt5640_headset_detect);
540 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
541 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
542 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
543 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
544 static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
546 /* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
547 static unsigned int bst_tlv[] = {
548 TLV_DB_RANGE_HEAD(7),
549 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
550 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
551 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
552 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
553 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
554 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
555 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0),
558 static int rt5640_dmic_get(struct snd_kcontrol *kcontrol,
559 struct snd_ctl_elem_value *ucontrol)
561 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
562 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
564 ucontrol->value.integer.value[0] = rt5640->dmic_en;
569 static int rt5640_dmic_put(struct snd_kcontrol *kcontrol,
570 struct snd_ctl_elem_value *ucontrol)
572 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
573 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
574 mutex_lock(&rt5640->lock);
575 CHECK_I2C_SHUTDOWN(rt5640, codec)
577 if (rt5640->dmic_en == ucontrol->value.integer.value[0]) {
578 mutex_unlock(&rt5640->lock);
582 rt5640->dmic_en = ucontrol->value.integer.value[0];
583 switch (rt5640->dmic_en) {
584 case RT5640_DMIC_DIS:
585 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
586 RT5640_GP2_PIN_MASK | RT5640_GP3_PIN_MASK |
588 RT5640_GP2_PIN_GPIO2 | RT5640_GP3_PIN_GPIO3 |
589 RT5640_GP4_PIN_GPIO4);
590 snd_soc_update_bits(codec, RT5640_DMIC,
591 RT5640_DMIC_1_DP_MASK | RT5640_DMIC_2_DP_MASK,
592 RT5640_DMIC_1_DP_GPIO3 | RT5640_DMIC_2_DP_GPIO4);
593 snd_soc_update_bits(codec, RT5640_DMIC,
594 RT5640_DMIC_1_EN_MASK | RT5640_DMIC_2_EN_MASK,
595 RT5640_DMIC_1_DIS | RT5640_DMIC_2_DIS);
599 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
600 RT5640_GP2_PIN_MASK | RT5640_GP3_PIN_MASK,
601 RT5640_GP2_PIN_DMIC1_SCL | RT5640_GP3_PIN_DMIC1_SDA);
602 snd_soc_update_bits(codec, RT5640_DMIC,
603 RT5640_DMIC_1L_LH_MASK | RT5640_DMIC_1R_LH_MASK |
604 RT5640_DMIC_1_DP_MASK,
605 RT5640_DMIC_1L_LH_FALLING | RT5640_DMIC_1R_LH_RISING |
606 RT5640_DMIC_1_DP_IN1P);
607 snd_soc_update_bits(codec, RT5640_DMIC,
608 RT5640_DMIC_1_EN_MASK, RT5640_DMIC_1_EN);
612 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
613 RT5640_GP2_PIN_MASK | RT5640_GP4_PIN_MASK,
614 RT5640_GP2_PIN_DMIC1_SCL | RT5640_GP4_PIN_DMIC2_SDA);
615 snd_soc_update_bits(codec, RT5640_DMIC,
616 RT5640_DMIC_2L_LH_MASK | RT5640_DMIC_2R_LH_MASK |
617 RT5640_DMIC_2_DP_MASK,
618 RT5640_DMIC_2L_LH_FALLING | RT5640_DMIC_2R_LH_RISING |
619 RT5640_DMIC_2_DP_IN1N);
620 snd_soc_update_bits(codec, RT5640_DMIC,
621 RT5640_DMIC_2_EN_MASK, RT5640_DMIC_2_EN);
625 mutex_unlock(&rt5640->lock);
629 mutex_unlock(&rt5640->lock);
634 /* IN1/IN2 Input Type */
635 static const char *rt5640_input_mode[] = {
636 "Single ended", "Differential"};
638 static const SOC_ENUM_SINGLE_DECL(
639 rt5640_in1_mode_enum, RT5640_IN1_IN2,
640 RT5640_IN_SFT1, rt5640_input_mode);
642 static const SOC_ENUM_SINGLE_DECL(
643 rt5640_in2_mode_enum, RT5640_IN3_IN4,
644 RT5640_IN_SFT2, rt5640_input_mode);
646 /* Interface data select */
647 static const char *rt5640_data_select[] = {
648 "Normal", "left copy to right", "right copy to left", "Swap"};
650 static const SOC_ENUM_SINGLE_DECL(rt5640_if1_dac_enum, RT5640_DIG_INF_DATA,
651 RT5640_IF1_DAC_SEL_SFT, rt5640_data_select);
653 static const SOC_ENUM_SINGLE_DECL(rt5640_if1_adc_enum, RT5640_DIG_INF_DATA,
654 RT5640_IF1_ADC_SEL_SFT, rt5640_data_select);
656 static const SOC_ENUM_SINGLE_DECL(rt5640_if2_dac_enum, RT5640_DIG_INF_DATA,
657 RT5640_IF2_DAC_SEL_SFT, rt5640_data_select);
659 static const SOC_ENUM_SINGLE_DECL(rt5640_if2_adc_enum, RT5640_DIG_INF_DATA,
660 RT5640_IF2_ADC_SEL_SFT, rt5640_data_select);
662 static const SOC_ENUM_SINGLE_DECL(rt5640_if3_dac_enum, RT5640_DIG_INF_DATA,
663 RT5640_IF3_DAC_SEL_SFT, rt5640_data_select);
665 static const SOC_ENUM_SINGLE_DECL(rt5640_if3_adc_enum, RT5640_DIG_INF_DATA,
666 RT5640_IF3_ADC_SEL_SFT, rt5640_data_select);
668 /* Class D speaker gain ratio */
669 static const char *rt5640_clsd_spk_ratio[] = {"1.66x", "1.83x", "1.94x", "2x",
670 "2.11x", "2.22x", "2.33x", "2.44x", "2.55x", "2.66x", "2.77x"};
672 static const SOC_ENUM_SINGLE_DECL(
673 rt5640_clsd_spk_ratio_enum, RT5640_CLS_D_OUT,
674 RT5640_CLSD_RATIO_SFT, rt5640_clsd_spk_ratio);
677 static const char *rt5640_dmic_mode[] = {"Disable", "DMIC1", "DMIC2"};
679 static const SOC_ENUM_SINGLE_DECL(rt5640_dmic_enum, 0, 0, rt5640_dmic_mode);
684 #define REGVAL_MAX 0xffff
685 static unsigned int regctl_addr;
686 static int rt5640_regctl_info(struct snd_kcontrol *kcontrol,
687 struct snd_ctl_elem_info *uinfo) {
688 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
690 uinfo->value.integer.min = 0;
691 uinfo->value.integer.max = REGVAL_MAX;
695 static int rt5640_regctl_get(struct snd_kcontrol *kcontrol,
696 struct snd_ctl_elem_value *ucontrol)
698 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
699 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
700 mutex_lock(&rt5640->lock);
701 CHECK_I2C_SHUTDOWN(rt5640, codec)
703 ucontrol->value.integer.value[0] = regctl_addr;
704 ucontrol->value.integer.value[1] = snd_soc_read(codec, regctl_addr);
705 mutex_unlock(&rt5640->lock);
709 static int rt5640_regctl_put(struct snd_kcontrol *kcontrol,
710 struct snd_ctl_elem_value *ucontrol)
712 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
713 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
714 mutex_lock(&rt5640->lock);
715 CHECK_I2C_SHUTDOWN(rt5640, codec)
717 regctl_addr = ucontrol->value.integer.value[0];
718 if (ucontrol->value.integer.value[1] <= REGVAL_MAX)
719 snd_soc_write(codec, regctl_addr,
720 ucontrol->value.integer.value[1]);
721 mutex_unlock(&rt5640->lock);
727 #define VOL_RESCALE_MAX_VOL 0x27 /* 39 */
728 #define VOL_RESCALE_MIX_RANGE 0x1F /* 31 */
730 static int rt5640_vol_rescale_get(struct snd_kcontrol *kcontrol,
731 struct snd_ctl_elem_value *ucontrol)
733 struct soc_mixer_control *mc =
734 (struct soc_mixer_control *)kcontrol->private_value;
735 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
737 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
738 mutex_lock(&rt5640->lock);
739 CHECK_I2C_SHUTDOWN(rt5640, codec)
740 val = snd_soc_read(codec, mc->reg);
742 ucontrol->value.integer.value[0] = VOL_RESCALE_MAX_VOL -
743 ((val & RT5640_L_VOL_MASK) >> mc->shift);
744 ucontrol->value.integer.value[1] = VOL_RESCALE_MAX_VOL -
745 (val & RT5640_R_VOL_MASK);
747 mutex_unlock(&rt5640->lock);
751 static int rt5640_vol_rescale_put(struct snd_kcontrol *kcontrol,
752 struct snd_ctl_elem_value *ucontrol)
754 struct soc_mixer_control *mc =
755 (struct soc_mixer_control *)kcontrol->private_value;
756 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
757 unsigned int val, val2;
758 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
760 mutex_lock(&rt5640->lock);
761 CHECK_I2C_SHUTDOWN(rt5640, codec)
763 val = VOL_RESCALE_MAX_VOL - ucontrol->value.integer.value[0];
764 val2 = VOL_RESCALE_MAX_VOL - ucontrol->value.integer.value[1];
765 ret = snd_soc_update_bits_locked(codec, mc->reg, RT5640_L_VOL_MASK |
766 RT5640_R_VOL_MASK, val << mc->shift | val2);
767 mutex_unlock(&rt5640->lock);
772 static const struct snd_kcontrol_new rt5640_snd_controls[] = {
773 /* Speaker Output Volume */
774 SOC_DOUBLE_EXT_TLV("Speaker Playback Volume", RT5640_SPK_VOL,
775 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, VOL_RESCALE_MIX_RANGE, 0,
776 rt5640_vol_rescale_get, rt5640_vol_rescale_put, out_vol_tlv),
778 /* Headphone Output Volume */
779 SOC_DOUBLE("HP Playback Switch", RT5640_HP_VOL,
780 RT5640_L_MUTE_SFT, RT5640_R_MUTE_SFT, 1, 1),
782 SOC_DOUBLE_EXT_TLV("HP Playback Volume", RT5640_HP_VOL,
783 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, VOL_RESCALE_MIX_RANGE, 0,
784 rt5640_vol_rescale_get, rt5640_vol_rescale_put, out_vol_tlv),
787 SOC_DOUBLE("OUT Playback Switch", RT5640_OUTPUT,
788 RT5640_L_MUTE_SFT, RT5640_R_MUTE_SFT, 1, 1),
789 SOC_DOUBLE("OUT Channel Switch", RT5640_OUTPUT,
790 RT5640_VOL_L_SFT, RT5640_VOL_R_SFT, 1, 1),
791 SOC_DOUBLE_TLV("OUT Playback Volume", RT5640_OUTPUT,
792 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, 39, 1, out_vol_tlv),
793 /* MONO Output Control */
794 SOC_SINGLE("Mono Playback Switch", RT5640_MONO_OUT,
795 RT5640_L_MUTE_SFT, 1, 1),
796 /* DAC Digital Volume */
797 SOC_DOUBLE("DAC2 Playback Switch", RT5640_DAC2_CTRL,
798 RT5640_M_DAC_L2_VOL_SFT, RT5640_M_DAC_R2_VOL_SFT, 1, 1),
799 SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5640_DAC1_DIG_VOL,
800 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
801 175, 0, dac_vol_tlv),
802 SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5640_DAC2_DIG_VOL,
803 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
804 175, 0, dac_vol_tlv),
805 /* IN1/IN2 Control */
806 SOC_ENUM("IN1 Mode Control", rt5640_in1_mode_enum),
807 SOC_SINGLE_TLV("IN1 Boost", RT5640_IN1_IN2,
808 RT5640_BST_SFT1, 8, 0, bst_tlv),
809 SOC_ENUM("IN2 Mode Control", rt5640_in2_mode_enum),
810 SOC_SINGLE_TLV("IN2 Boost", RT5640_IN3_IN4,
811 RT5640_BST_SFT2, 8, 0, bst_tlv),
812 /* INL/INR Volume Control */
813 SOC_DOUBLE_TLV("IN Capture Volume", RT5640_INL_INR_VOL,
814 RT5640_INL_VOL_SFT, RT5640_INR_VOL_SFT,
816 /* ADC Digital Volume Control */
817 SOC_DOUBLE("ADC Capture Switch", RT5640_ADC_DIG_VOL,
818 RT5640_L_MUTE_SFT, RT5640_R_MUTE_SFT, 1, 1),
819 SOC_DOUBLE_TLV("ADC Capture Volume", RT5640_ADC_DIG_VOL,
820 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
821 127, 0, adc_vol_tlv),
822 SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5640_ADC_DATA,
823 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
824 127, 0, adc_vol_tlv),
825 /* ADC Boost Volume Control */
826 SOC_DOUBLE_TLV("ADC Boost Gain", RT5640_ADC_BST_VOL,
827 RT5640_ADC_L_BST_SFT, RT5640_ADC_R_BST_SFT,
829 /* Class D speaker gain ratio */
830 SOC_ENUM("Class D SPK Ratio Control", rt5640_clsd_spk_ratio_enum),
832 SOC_ENUM_EXT("DMIC Switch", rt5640_dmic_enum,
833 rt5640_dmic_get, rt5640_dmic_put),
837 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
838 .name = "Register Control",
839 .info = rt5640_regctl_info,
840 .get = rt5640_regctl_get,
841 .put = rt5640_regctl_put,
847 * set_dmic_clk - Set parameter of dmic.
850 * @kcontrol: The kcontrol of this widget.
853 * Choose dmic clock between 1MHz and 3MHz.
854 * It is better for clock to approximate 3MHz.
856 static int set_dmic_clk(struct snd_soc_dapm_widget *w,
857 struct snd_kcontrol *kcontrol, int event)
859 struct snd_soc_codec *codec = w->codec;
860 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
861 int div[] = {2, 3, 4, 6, 12}, idx = -EINVAL, i, rate, red, bound, temp;
862 mutex_lock(&rt5640->lock);
863 CHECK_I2C_SHUTDOWN(rt5640, codec)
865 rate = rt5640->lrck[rt5640->aif_pu] << 8;
867 for (i = 0; i < ARRAY_SIZE(div); i++) {
868 bound = div[i] * 3000000;
878 dev_err(codec->dev, "Failed to set DMIC clock\n");
880 snd_soc_update_bits(codec, RT5640_DMIC, RT5640_DMIC_CLK_MASK,
881 idx << RT5640_DMIC_CLK_SFT);
882 mutex_unlock(&rt5640->lock);
886 static int check_sysclk1_source(struct snd_soc_dapm_widget *source,
887 struct snd_soc_dapm_widget *sink)
890 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(source->codec);
891 mutex_lock(&rt5640->lock);
892 CHECK_I2C_SHUTDOWN(rt5640, source->codec)
894 val = snd_soc_read(source->codec, RT5640_GLB_CLK);
895 val &= RT5640_SCLK_SRC_MASK;
896 mutex_unlock(&rt5640->lock);
897 if (val == RT5640_SCLK_SRC_PLL1 || val == RT5640_SCLK_SRC_PLL1T)
904 static const struct snd_kcontrol_new rt5640_sto_adc_l_mix[] = {
905 SOC_DAPM_SINGLE("ADC1 Switch", RT5640_STO_ADC_MIXER,
906 RT5640_M_ADC_L1_SFT, 1, 1),
907 SOC_DAPM_SINGLE("ADC2 Switch", RT5640_STO_ADC_MIXER,
908 RT5640_M_ADC_L2_SFT, 1, 1),
911 static const struct snd_kcontrol_new rt5640_sto_adc_r_mix[] = {
912 SOC_DAPM_SINGLE("ADC1 Switch", RT5640_STO_ADC_MIXER,
913 RT5640_M_ADC_R1_SFT, 1, 1),
914 SOC_DAPM_SINGLE("ADC2 Switch", RT5640_STO_ADC_MIXER,
915 RT5640_M_ADC_R2_SFT, 1, 1),
918 static const struct snd_kcontrol_new rt5640_mono_adc_l_mix[] = {
919 SOC_DAPM_SINGLE("ADC1 Switch", RT5640_MONO_ADC_MIXER,
920 RT5640_M_MONO_ADC_L1_SFT, 1, 1),
921 SOC_DAPM_SINGLE("ADC2 Switch", RT5640_MONO_ADC_MIXER,
922 RT5640_M_MONO_ADC_L2_SFT, 1, 1),
925 static const struct snd_kcontrol_new rt5640_mono_adc_r_mix[] = {
926 SOC_DAPM_SINGLE("ADC1 Switch", RT5640_MONO_ADC_MIXER,
927 RT5640_M_MONO_ADC_R1_SFT, 1, 1),
928 SOC_DAPM_SINGLE("ADC2 Switch", RT5640_MONO_ADC_MIXER,
929 RT5640_M_MONO_ADC_R2_SFT, 1, 1),
932 static const struct snd_kcontrol_new rt5640_dac_l_mix[] = {
933 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5640_AD_DA_MIXER,
934 RT5640_M_ADCMIX_L_SFT, 1, 1),
935 SOC_DAPM_SINGLE("INF1 Switch", RT5640_AD_DA_MIXER,
936 RT5640_M_IF1_DAC_L_SFT, 1, 1),
939 static const struct snd_kcontrol_new rt5640_dac_r_mix[] = {
940 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5640_AD_DA_MIXER,
941 RT5640_M_ADCMIX_R_SFT, 1, 1),
942 SOC_DAPM_SINGLE("INF1 Switch", RT5640_AD_DA_MIXER,
943 RT5640_M_IF1_DAC_R_SFT, 1, 1),
946 static const struct snd_kcontrol_new rt5640_sto_dac_l_mix[] = {
947 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_STO_DAC_MIXER,
948 RT5640_M_DAC_L1_SFT, 1, 1),
949 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_STO_DAC_MIXER,
950 RT5640_M_DAC_L2_SFT, 1, 1),
951 SOC_DAPM_SINGLE("ANC Switch", RT5640_STO_DAC_MIXER,
952 RT5640_M_ANC_DAC_L_SFT, 1, 1),
955 static const struct snd_kcontrol_new rt5640_sto_dac_r_mix[] = {
956 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_STO_DAC_MIXER,
957 RT5640_M_DAC_R1_SFT, 1, 1),
958 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_STO_DAC_MIXER,
959 RT5640_M_DAC_R2_SFT, 1, 1),
960 SOC_DAPM_SINGLE("ANC Switch", RT5640_STO_DAC_MIXER,
961 RT5640_M_ANC_DAC_R_SFT, 1, 1),
964 static const struct snd_kcontrol_new rt5640_mono_dac_l_mix[] = {
965 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_MONO_DAC_MIXER,
966 RT5640_M_DAC_L1_MONO_L_SFT, 1, 1),
967 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_DAC_MIXER,
968 RT5640_M_DAC_L2_MONO_L_SFT, 1, 1),
969 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_DAC_MIXER,
970 RT5640_M_DAC_R2_MONO_L_SFT, 1, 1),
973 static const struct snd_kcontrol_new rt5640_mono_dac_r_mix[] = {
974 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_MONO_DAC_MIXER,
975 RT5640_M_DAC_R1_MONO_R_SFT, 1, 1),
976 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_DAC_MIXER,
977 RT5640_M_DAC_R2_MONO_R_SFT, 1, 1),
978 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_DAC_MIXER,
979 RT5640_M_DAC_L2_MONO_R_SFT, 1, 1),
982 static const struct snd_kcontrol_new rt5640_dig_l_mix[] = {
983 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_DIG_MIXER,
984 RT5640_M_STO_L_DAC_L_SFT, 1, 1),
985 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_DIG_MIXER,
986 RT5640_M_DAC_L2_DAC_L_SFT, 1, 1),
989 static const struct snd_kcontrol_new rt5640_dig_r_mix[] = {
990 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_DIG_MIXER,
991 RT5640_M_STO_R_DAC_R_SFT, 1, 1),
992 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_DIG_MIXER,
993 RT5640_M_DAC_R2_DAC_R_SFT, 1, 1),
996 /* Analog Input Mixer */
997 static const struct snd_kcontrol_new rt5640_rec_l_mix[] = {
998 SOC_DAPM_SINGLE("HPOL Switch", RT5640_REC_L2_MIXER,
999 RT5640_M_HP_L_RM_L_SFT, 1, 1),
1000 SOC_DAPM_SINGLE("INL Switch", RT5640_REC_L2_MIXER,
1001 RT5640_M_IN_L_RM_L_SFT, 1, 1),
1002 SOC_DAPM_SINGLE("BST2 Switch", RT5640_REC_L2_MIXER,
1003 RT5640_M_BST4_RM_L_SFT, 1, 1),
1004 SOC_DAPM_SINGLE("BST1 Switch", RT5640_REC_L2_MIXER,
1005 RT5640_M_BST1_RM_L_SFT, 1, 1),
1006 SOC_DAPM_SINGLE("OUT MIXL Switch", RT5640_REC_L2_MIXER,
1007 RT5640_M_OM_L_RM_L_SFT, 1, 1),
1010 static const struct snd_kcontrol_new rt5640_rec_r_mix[] = {
1011 SOC_DAPM_SINGLE("HPOR Switch", RT5640_REC_R2_MIXER,
1012 RT5640_M_HP_R_RM_R_SFT, 1, 1),
1013 SOC_DAPM_SINGLE("INR Switch", RT5640_REC_R2_MIXER,
1014 RT5640_M_IN_R_RM_R_SFT, 1, 1),
1015 SOC_DAPM_SINGLE("BST2 Switch", RT5640_REC_R2_MIXER,
1016 RT5640_M_BST4_RM_R_SFT, 1, 1),
1017 SOC_DAPM_SINGLE("BST1 Switch", RT5640_REC_R2_MIXER,
1018 RT5640_M_BST1_RM_R_SFT, 1, 1),
1019 SOC_DAPM_SINGLE("OUT MIXR Switch", RT5640_REC_R2_MIXER,
1020 RT5640_M_OM_R_RM_R_SFT, 1, 1),
1023 /* Analog Output Mixer */
1024 static const struct snd_kcontrol_new rt5640_spk_l_mix[] = {
1025 SOC_DAPM_SINGLE("REC MIXL Switch", RT5640_SPK_L_MIXER,
1026 RT5640_M_RM_L_SM_L_SFT, 1, 1),
1027 SOC_DAPM_SINGLE("INL Switch", RT5640_SPK_L_MIXER,
1028 RT5640_M_IN_L_SM_L_SFT, 1, 1),
1029 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_SPK_L_MIXER,
1030 RT5640_M_DAC_L1_SM_L_SFT, 1, 1),
1031 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_SPK_L_MIXER,
1032 RT5640_M_DAC_L2_SM_L_SFT, 1, 1),
1033 SOC_DAPM_SINGLE("OUT MIXL Switch", RT5640_SPK_L_MIXER,
1034 RT5640_M_OM_L_SM_L_SFT, 1, 1),
1037 static const struct snd_kcontrol_new rt5640_spk_r_mix[] = {
1038 SOC_DAPM_SINGLE("REC MIXR Switch", RT5640_SPK_R_MIXER,
1039 RT5640_M_RM_R_SM_R_SFT, 1, 1),
1040 SOC_DAPM_SINGLE("INR Switch", RT5640_SPK_R_MIXER,
1041 RT5640_M_IN_R_SM_R_SFT, 1, 1),
1042 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPK_R_MIXER,
1043 RT5640_M_DAC_R1_SM_R_SFT, 1, 1),
1044 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_SPK_R_MIXER,
1045 RT5640_M_DAC_R2_SM_R_SFT, 1, 1),
1046 SOC_DAPM_SINGLE("OUT MIXR Switch", RT5640_SPK_R_MIXER,
1047 RT5640_M_OM_R_SM_R_SFT, 1, 1),
1050 static const struct snd_kcontrol_new rt5640_out_l_mix[] = {
1051 SOC_DAPM_SINGLE("SPK MIXL Switch", RT5640_OUT_L3_MIXER,
1052 RT5640_M_SM_L_OM_L_SFT, 1, 1),
1053 SOC_DAPM_SINGLE("BST1 Switch", RT5640_OUT_L3_MIXER,
1054 RT5640_M_BST1_OM_L_SFT, 1, 1),
1055 SOC_DAPM_SINGLE("INL Switch", RT5640_OUT_L3_MIXER,
1056 RT5640_M_IN_L_OM_L_SFT, 1, 1),
1057 SOC_DAPM_SINGLE("REC MIXL Switch", RT5640_OUT_L3_MIXER,
1058 RT5640_M_RM_L_OM_L_SFT, 1, 1),
1059 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_OUT_L3_MIXER,
1060 RT5640_M_DAC_R2_OM_L_SFT, 1, 1),
1061 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_OUT_L3_MIXER,
1062 RT5640_M_DAC_L2_OM_L_SFT, 1, 1),
1063 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_OUT_L3_MIXER,
1064 RT5640_M_DAC_L1_OM_L_SFT, 1, 1),
1067 static const struct snd_kcontrol_new rt5640_out_r_mix[] = {
1068 SOC_DAPM_SINGLE("SPK MIXR Switch", RT5640_OUT_R3_MIXER,
1069 RT5640_M_SM_L_OM_R_SFT, 1, 1),
1070 SOC_DAPM_SINGLE("BST2 Switch", RT5640_OUT_R3_MIXER,
1071 RT5640_M_BST4_OM_R_SFT, 1, 1),
1072 SOC_DAPM_SINGLE("BST1 Switch", RT5640_OUT_R3_MIXER,
1073 RT5640_M_BST1_OM_R_SFT, 1, 1),
1074 SOC_DAPM_SINGLE("INR Switch", RT5640_OUT_R3_MIXER,
1075 RT5640_M_IN_R_OM_R_SFT, 1, 1),
1076 SOC_DAPM_SINGLE("REC MIXR Switch", RT5640_OUT_R3_MIXER,
1077 RT5640_M_RM_R_OM_R_SFT, 1, 1),
1078 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_OUT_R3_MIXER,
1079 RT5640_M_DAC_L2_OM_R_SFT, 1, 1),
1080 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_OUT_R3_MIXER,
1081 RT5640_M_DAC_R2_OM_R_SFT, 1, 1),
1082 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_OUT_R3_MIXER,
1083 RT5640_M_DAC_R1_OM_R_SFT, 1, 1),
1086 static const struct snd_kcontrol_new rt5640_spo_l_mix[] = {
1087 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPO_L_MIXER,
1088 RT5640_M_DAC_R1_SPM_L_SFT, 1, 1),
1089 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_SPO_L_MIXER,
1090 RT5640_M_DAC_L1_SPM_L_SFT, 1, 1),
1091 SOC_DAPM_SINGLE("SPKVOL R Switch", RT5640_SPO_L_MIXER,
1092 RT5640_M_SV_R_SPM_L_SFT, 1, 1),
1093 SOC_DAPM_SINGLE("SPKVOL L Switch", RT5640_SPO_L_MIXER,
1094 RT5640_M_SV_L_SPM_L_SFT, 1, 1),
1095 SOC_DAPM_SINGLE("BST1 Switch", RT5640_SPO_L_MIXER,
1096 RT5640_M_BST1_SPM_L_SFT, 1, 1),
1099 static const struct snd_kcontrol_new rt5640_spo_r_mix[] = {
1100 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPO_R_MIXER,
1101 RT5640_M_DAC_R1_SPM_R_SFT, 1, 1),
1102 SOC_DAPM_SINGLE("SPKVOL R Switch", RT5640_SPO_R_MIXER,
1103 RT5640_M_SV_R_SPM_R_SFT, 1, 1),
1104 SOC_DAPM_SINGLE("BST1 Switch", RT5640_SPO_R_MIXER,
1105 RT5640_M_BST1_SPM_R_SFT, 1, 1),
1108 static const struct snd_kcontrol_new rt5640_hpo_mix[] = {
1109 SOC_DAPM_SINGLE("DAC2 Switch", RT5640_HPO_MIXER,
1110 RT5640_M_DAC2_HM_SFT, 1, 1),
1111 SOC_DAPM_SINGLE("DAC1 Switch", RT5640_HPO_MIXER,
1112 RT5640_M_DAC1_HM_SFT, 1, 1),
1113 SOC_DAPM_SINGLE("HPVOL Switch", RT5640_HPO_MIXER,
1114 RT5640_M_HPVOL_HM_SFT, 1, 1),
1117 static const struct snd_kcontrol_new rt5640_lout_mix[] = {
1118 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_LOUT_MIXER,
1119 RT5640_M_DAC_L1_LM_SFT, 1, 1),
1120 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_LOUT_MIXER,
1121 RT5640_M_DAC_R1_LM_SFT, 1, 1),
1122 SOC_DAPM_SINGLE("OUTVOL L Switch", RT5640_LOUT_MIXER,
1123 RT5640_M_OV_L_LM_SFT, 1, 1),
1124 SOC_DAPM_SINGLE("OUTVOL R Switch", RT5640_LOUT_MIXER,
1125 RT5640_M_OV_R_LM_SFT, 1, 1),
1128 static const struct snd_kcontrol_new rt5640_mono_mix[] = {
1129 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_MIXER,
1130 RT5640_M_DAC_R2_MM_SFT, 1, 1),
1131 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_MIXER,
1132 RT5640_M_DAC_L2_MM_SFT, 1, 1),
1133 SOC_DAPM_SINGLE("OUTVOL R Switch", RT5640_MONO_MIXER,
1134 RT5640_M_OV_R_MM_SFT, 1, 1),
1135 SOC_DAPM_SINGLE("OUTVOL L Switch", RT5640_MONO_MIXER,
1136 RT5640_M_OV_L_MM_SFT, 1, 1),
1137 SOC_DAPM_SINGLE("BST1 Switch", RT5640_MONO_MIXER,
1138 RT5640_M_BST1_MM_SFT, 1, 1),
1142 static const char *rt5640_inl_src[] = {"IN2P", "MonoP"};
1144 static const SOC_ENUM_SINGLE_DECL(
1145 rt5640_inl_enum, RT5640_INL_INR_VOL,
1146 RT5640_INL_SEL_SFT, rt5640_inl_src);
1148 static const struct snd_kcontrol_new rt5640_inl_mux =
1149 SOC_DAPM_ENUM("INL source", rt5640_inl_enum);
1151 static const char *rt5640_inr_src[] = {"IN2N", "MonoN"};
1153 static const SOC_ENUM_SINGLE_DECL(
1154 rt5640_inr_enum, RT5640_INL_INR_VOL,
1155 RT5640_INR_SEL_SFT, rt5640_inr_src);
1157 static const struct snd_kcontrol_new rt5640_inr_mux =
1158 SOC_DAPM_ENUM("INR source", rt5640_inr_enum);
1160 /* Stereo ADC source */
1161 static const char *rt5640_stereo_adc1_src[] = {"DIG MIX", "ADC"};
1163 static const SOC_ENUM_SINGLE_DECL(
1164 rt5640_stereo_adc1_enum, RT5640_STO_ADC_MIXER,
1165 RT5640_ADC_1_SRC_SFT, rt5640_stereo_adc1_src);
1167 static const struct snd_kcontrol_new rt5640_sto_adc_l1_mux =
1168 SOC_DAPM_ENUM("Stereo ADC L1 source", rt5640_stereo_adc1_enum);
1170 static const struct snd_kcontrol_new rt5640_sto_adc_r1_mux =
1171 SOC_DAPM_ENUM("Stereo ADC R1 source", rt5640_stereo_adc1_enum);
1173 static const char *rt5640_stereo_adc2_src[] = {"DMIC1", "DMIC2", "DIG MIX"};
1175 static const SOC_ENUM_SINGLE_DECL(
1176 rt5640_stereo_adc2_enum, RT5640_STO_ADC_MIXER,
1177 RT5640_ADC_2_SRC_SFT, rt5640_stereo_adc2_src);
1179 static const struct snd_kcontrol_new rt5640_sto_adc_l2_mux =
1180 SOC_DAPM_ENUM("Stereo ADC L2 source", rt5640_stereo_adc2_enum);
1182 static const struct snd_kcontrol_new rt5640_sto_adc_r2_mux =
1183 SOC_DAPM_ENUM("Stereo ADC R2 source", rt5640_stereo_adc2_enum);
1185 /* Mono ADC source */
1186 static const char *rt5640_mono_adc_l1_src[] = {"Mono DAC MIXL", "ADCL"};
1188 static const SOC_ENUM_SINGLE_DECL(
1189 rt5640_mono_adc_l1_enum, RT5640_MONO_ADC_MIXER,
1190 RT5640_MONO_ADC_L1_SRC_SFT, rt5640_mono_adc_l1_src);
1192 static const struct snd_kcontrol_new rt5640_mono_adc_l1_mux =
1193 SOC_DAPM_ENUM("Mono ADC1 left source", rt5640_mono_adc_l1_enum);
1195 static const char *rt5640_mono_adc_l2_src[] = {
1196 "DMIC L1", "DMIC L2", "Mono DAC MIXL"
1199 static const SOC_ENUM_SINGLE_DECL(
1200 rt5640_mono_adc_l2_enum, RT5640_MONO_ADC_MIXER,
1201 RT5640_MONO_ADC_L2_SRC_SFT, rt5640_mono_adc_l2_src);
1203 static const struct snd_kcontrol_new rt5640_mono_adc_l2_mux =
1204 SOC_DAPM_ENUM("Mono ADC2 left source", rt5640_mono_adc_l2_enum);
1206 static const char *rt5640_mono_adc_r1_src[] = {"Mono DAC MIXR", "ADCR"};
1208 static const SOC_ENUM_SINGLE_DECL(
1209 rt5640_mono_adc_r1_enum, RT5640_MONO_ADC_MIXER,
1210 RT5640_MONO_ADC_R1_SRC_SFT, rt5640_mono_adc_r1_src);
1212 static const struct snd_kcontrol_new rt5640_mono_adc_r1_mux =
1213 SOC_DAPM_ENUM("Mono ADC1 right source", rt5640_mono_adc_r1_enum);
1215 static const char *rt5640_mono_adc_r2_src[] = {
1216 "DMIC R1", "DMIC R2", "Mono DAC MIXR"
1219 static const SOC_ENUM_SINGLE_DECL(
1220 rt5640_mono_adc_r2_enum, RT5640_MONO_ADC_MIXER,
1221 RT5640_MONO_ADC_R2_SRC_SFT, rt5640_mono_adc_r2_src);
1223 static const struct snd_kcontrol_new rt5640_mono_adc_r2_mux =
1224 SOC_DAPM_ENUM("Mono ADC2 right source", rt5640_mono_adc_r2_enum);
1226 /* DAC2 channel source */
1227 static const char *rt5640_dac_l2_src[] = {"IF2", "IF3", "TxDC", "Base L/R"};
1229 static const SOC_ENUM_SINGLE_DECL(rt5640_dac_l2_enum, RT5640_DSP_PATH2,
1230 RT5640_DAC_L2_SEL_SFT, rt5640_dac_l2_src);
1232 static const struct snd_kcontrol_new rt5640_dac_l2_mux =
1233 SOC_DAPM_ENUM("DAC2 left channel source", rt5640_dac_l2_enum);
1235 static const char *rt5640_dac_r2_src[] = {"IF2", "IF3", "TxDC"};
1237 static const SOC_ENUM_SINGLE_DECL(
1238 rt5640_dac_r2_enum, RT5640_DSP_PATH2,
1239 RT5640_DAC_R2_SEL_SFT, rt5640_dac_r2_src);
1241 static const struct snd_kcontrol_new rt5640_dac_r2_mux =
1242 SOC_DAPM_ENUM("DAC2 right channel source", rt5640_dac_r2_enum);
1244 /* Interface 2 ADC channel source */
1245 static const char *rt5640_if2_adc_l_src[] = {"TxDP", "Mono ADC MIXL"};
1247 static const SOC_ENUM_SINGLE_DECL(rt5640_if2_adc_l_enum, RT5640_DSP_PATH2,
1248 RT5640_IF2_ADC_L_SEL_SFT, rt5640_if2_adc_l_src);
1250 static const struct snd_kcontrol_new rt5640_if2_adc_l_mux =
1251 SOC_DAPM_ENUM("IF2 ADC left channel source", rt5640_if2_adc_l_enum);
1253 static const char *rt5640_if2_adc_r_src[] = {"TxDP", "Mono ADC MIXR"};
1255 static const SOC_ENUM_SINGLE_DECL(rt5640_if2_adc_r_enum, RT5640_DSP_PATH2,
1256 RT5640_IF2_ADC_R_SEL_SFT, rt5640_if2_adc_r_src);
1258 static const struct snd_kcontrol_new rt5640_if2_adc_r_mux =
1259 SOC_DAPM_ENUM("IF2 ADC right channel source", rt5640_if2_adc_r_enum);
1261 /* digital interface and iis interface map */
1262 static const char *rt5640_dai_iis_map[] = {"1:1|2:2|3:3", "1:1|2:3|3:2",
1263 "1:3|2:1|3:2", "1:3|2:2|3:1", "1:2|2:3|3:1",
1264 "1:2|2:1|3:3", "1:1|2:1|3:3", "1:2|2:2|3:3"};
1266 static const SOC_ENUM_SINGLE_DECL(
1267 rt5640_dai_iis_map_enum, RT5640_I2S1_SDP,
1268 RT5640_I2S_IF_SFT, rt5640_dai_iis_map);
1270 static const struct snd_kcontrol_new rt5640_dai_mux =
1271 SOC_DAPM_ENUM("DAI select", rt5640_dai_iis_map_enum);
1274 static const char *rt5640_sdi_sel[] = {"IF1", "IF2"};
1276 static const SOC_ENUM_SINGLE_DECL(
1277 rt5640_sdi_sel_enum, RT5640_I2S2_SDP,
1278 RT5640_I2S2_SDI_SFT, rt5640_sdi_sel);
1280 static const struct snd_kcontrol_new rt5640_sdi_mux =
1281 SOC_DAPM_ENUM("SDI select", rt5640_sdi_sel_enum);
1283 static int spk_event(struct snd_soc_dapm_widget *w,
1284 struct snd_kcontrol *kcontrol, int event)
1286 struct snd_soc_codec *codec = w->codec;
1287 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1288 mutex_lock(&rt5640->lock);
1289 CHECK_I2C_SHUTDOWN(rt5640, codec)
1292 case SND_SOC_DAPM_POST_PMU:
1293 pr_info("spk_event --SND_SOC_DAPM_POST_PMU\n");
1294 snd_soc_update_bits(codec, RT5640_PWR_DIG1, 0x0001, 0x0001);
1295 rt5640_index_update_bits(codec, 0x1c, 0xf000, 0xf000);
1296 /* rt5640_index_write(codec, 0x1c, 0xfd21); */
1299 case SND_SOC_DAPM_PRE_PMD:
1300 pr_info("spk_event --SND_SOC_DAPM_POST_PMD\n");
1301 /* rt5640_index_write(codec, 0x1c, 0xfd00); */
1302 rt5640_index_update_bits(codec, 0x1c, 0xf000, 0x0000);
1303 snd_soc_update_bits(codec, RT5640_PWR_DIG1, 0x0001, 0x0000);
1307 mutex_unlock(&rt5640->lock);
1310 mutex_unlock(&rt5640->lock);
1314 #if USE_ONEBIT_DEPOP
1315 void hp_amp_power(struct snd_soc_codec *codec, int on)
1317 static int hp_amp_power_count;
1318 // printk("one bit hp_amp_power on=%d hp_amp_power_count=%d\n",on,hp_amp_power_count);
1321 if (hp_amp_power_count <= 0) {
1322 /* depop parameters */
1323 snd_soc_update_bits(codec, RT5640_DEPOP_M2,
1324 RT5640_DEPOP_MASK, RT5640_DEPOP_MAN);
1325 snd_soc_update_bits(codec, RT5640_DEPOP_M1,
1326 RT5640_HP_CP_MASK | RT5640_HP_SG_MASK | RT5640_HP_CB_MASK,
1327 RT5640_HP_CP_PU | RT5640_HP_SG_DIS | RT5640_HP_CB_PU);
1328 /* headphone amp power on */
1329 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
1330 RT5640_PWR_FV1 | RT5640_PWR_FV2, 0);
1332 snd_soc_update_bits(codec, RT5640_PWR_VOL,
1333 RT5640_PWR_HV_L | RT5640_PWR_HV_R,
1334 RT5640_PWR_HV_L | RT5640_PWR_HV_R);
1335 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
1336 RT5640_PWR_HP_L | RT5640_PWR_HP_R | RT5640_PWR_HA,
1337 RT5640_PWR_HP_L | RT5640_PWR_HP_R | RT5640_PWR_HA);
1338 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
1339 RT5640_PWR_FV1 | RT5640_PWR_FV2 ,
1340 RT5640_PWR_FV1 | RT5640_PWR_FV2 );
1342 hp_amp_power_count++;
1344 hp_amp_power_count--;
1345 if (hp_amp_power_count <= 0) {
1346 snd_soc_update_bits(codec, RT5640_DEPOP_M1,
1347 RT5640_HP_CB_MASK, RT5640_HP_CB_PD);
1349 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
1350 RT5640_PWR_HP_L | RT5640_PWR_HP_R | RT5640_PWR_HA,
1352 snd_soc_write(codec, RT5640_DEPOP_M2, 0x3100);
1357 static void rt5640_pmu_depop(struct snd_soc_codec *codec)
1359 hp_amp_power(codec, 1);
1360 /* headphone unmute sequence */
1361 snd_soc_update_bits(codec, RT5640_DEPOP_M2,
1362 RT5640_DEPOP_MASK | RT5640_DIG_DP_MASK,
1363 RT5640_DEPOP_AUTO | RT5640_DIG_DP_EN);
1364 snd_soc_update_bits(codec, RT5640_CHARGE_PUMP,
1365 RT5640_PM_HP_MASK, RT5640_PM_HP_HV);
1366 snd_soc_update_bits(codec, RT5640_DEPOP_M3,
1367 RT5640_CP_FQ1_MASK | RT5640_CP_FQ2_MASK | RT5640_CP_FQ3_MASK,
1368 (RT5640_CP_FQ_192_KHZ << RT5640_CP_FQ1_SFT) |
1369 (RT5640_CP_FQ_24_KHZ << RT5640_CP_FQ2_SFT) |
1370 (RT5640_CP_FQ_192_KHZ << RT5640_CP_FQ3_SFT));
1371 rt5640_index_write(codec, RT5640_MAMP_INT_REG2, 0x1c00);
1372 snd_soc_update_bits(codec, RT5640_DEPOP_M1,
1373 RT5640_HP_CP_MASK | RT5640_HP_SG_MASK | RT5640_HP_CO_MASK,
1374 RT5640_HP_CP_PU | RT5640_HP_SG_DIS | RT5640_HP_CO_EN);
1376 snd_soc_update_bits(codec, RT5640_HP_VOL,
1377 RT5640_L_MUTE | RT5640_R_MUTE, 0);
1379 //snd_soc_update_bits(codec, RT5640_HP_CALIB_AMP_DET,
1380 // RT5640_HPD_PS_MASK, RT5640_HPD_PS_EN);
1383 static void rt5640_pmd_depop(struct snd_soc_codec *codec)
1385 snd_soc_update_bits(codec, RT5640_DEPOP_M3,
1386 RT5640_CP_FQ1_MASK | RT5640_CP_FQ2_MASK | RT5640_CP_FQ3_MASK,
1387 (RT5640_CP_FQ_96_KHZ << RT5640_CP_FQ1_SFT) |
1388 (RT5640_CP_FQ_12_KHZ << RT5640_CP_FQ2_SFT) |
1389 (RT5640_CP_FQ_96_KHZ << RT5640_CP_FQ3_SFT));
1390 rt5640_index_write(codec, RT5640_MAMP_INT_REG2, 0x7c00);
1391 //snd_soc_update_bits(codec, RT5640_HP_CALIB_AMP_DET,
1392 // RT5640_HPD_PS_MASK, RT5640_HPD_PS_DIS);
1393 snd_soc_update_bits(codec, RT5640_HP_VOL,
1394 RT5640_L_MUTE | RT5640_R_MUTE,
1395 RT5640_L_MUTE | RT5640_R_MUTE);
1397 hp_amp_power(codec, 0);
1401 void hp_amp_power(struct snd_soc_codec *codec, int on)
1403 static int hp_amp_power_count;
1404 // printk("hp_amp_power on=%d hp_amp_power_count=%d\n",on,hp_amp_power_count);
1407 if (hp_amp_power_count <= 0) {
1408 /* depop parameters */
1409 snd_soc_update_bits(codec, RT5640_DEPOP_M2,
1410 RT5640_DEPOP_MASK, RT5640_DEPOP_MAN);
1411 snd_soc_update_bits(codec, RT5640_DEPOP_M1,
1412 RT5640_HP_CP_MASK | RT5640_HP_SG_MASK | RT5640_HP_CB_MASK,
1413 RT5640_HP_CP_PU | RT5640_HP_SG_DIS | RT5640_HP_CB_PU);
1414 /* headphone amp power on */
1415 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
1416 RT5640_PWR_FV1 | RT5640_PWR_FV2 , 0);
1417 snd_soc_update_bits(codec, RT5640_PWR_VOL,
1418 RT5640_PWR_HV_L | RT5640_PWR_HV_R,
1419 RT5640_PWR_HV_L | RT5640_PWR_HV_R);
1420 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
1421 RT5640_PWR_HP_L | RT5640_PWR_HP_R | RT5640_PWR_HA | RT5640_PWR_LM,
1422 RT5640_PWR_HP_L | RT5640_PWR_HP_R | RT5640_PWR_HA | RT5640_PWR_LM);
1424 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
1425 RT5640_PWR_FV1 | RT5640_PWR_FV2,
1426 RT5640_PWR_FV1 | RT5640_PWR_FV2);
1427 snd_soc_update_bits(codec, RT5640_CHARGE_PUMP,
1428 RT5640_PM_HP_MASK, RT5640_PM_HP_HV);
1429 snd_soc_update_bits(codec, RT5640_DEPOP_M1,
1430 RT5640_HP_CO_MASK | RT5640_HP_SG_MASK,
1431 RT5640_HP_CO_EN | RT5640_HP_SG_EN);
1433 hp_amp_power_count++;
1435 hp_amp_power_count--;
1436 if (hp_amp_power_count <= 0) {
1437 snd_soc_update_bits(codec, RT5640_DEPOP_M1,
1438 RT5640_HP_SG_MASK | RT5640_HP_L_SMT_MASK |
1439 RT5640_HP_R_SMT_MASK, RT5640_HP_SG_DIS |
1440 RT5640_HP_L_SMT_DIS | RT5640_HP_R_SMT_DIS);
1441 /* headphone amp power down */
1442 snd_soc_update_bits(codec, RT5640_DEPOP_M1,
1443 RT5640_SMT_TRIG_MASK | RT5640_HP_CD_PD_MASK |
1444 RT5640_HP_CO_MASK | RT5640_HP_CP_MASK |
1445 RT5640_HP_SG_MASK | RT5640_HP_CB_MASK,
1446 RT5640_SMT_TRIG_DIS | RT5640_HP_CD_PD_EN |
1447 RT5640_HP_CO_DIS | RT5640_HP_CP_PD |
1448 RT5640_HP_SG_EN | RT5640_HP_CB_PD);
1449 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
1450 RT5640_PWR_HP_L | RT5640_PWR_HP_R | RT5640_PWR_HA | RT5640_PWR_LM,
1456 static void rt5640_pmu_depop(struct snd_soc_codec *codec)
1458 hp_amp_power(codec, 1);
1459 /* headphone unmute sequence */
1460 snd_soc_update_bits(codec, RT5640_DEPOP_M3,
1461 RT5640_CP_FQ1_MASK | RT5640_CP_FQ2_MASK | RT5640_CP_FQ3_MASK,
1462 (RT5640_CP_FQ_192_KHZ << RT5640_CP_FQ1_SFT) |
1463 (RT5640_CP_FQ_12_KHZ << RT5640_CP_FQ2_SFT) |
1464 (RT5640_CP_FQ_192_KHZ << RT5640_CP_FQ3_SFT));
1465 rt5640_index_write(codec, RT5640_MAMP_INT_REG2, 0xfc00);
1466 snd_soc_update_bits(codec, RT5640_DEPOP_M1,
1467 RT5640_SMT_TRIG_MASK, RT5640_SMT_TRIG_EN);
1468 snd_soc_update_bits(codec, RT5640_DEPOP_M1,
1469 RT5640_RSTN_MASK, RT5640_RSTN_EN);
1470 snd_soc_update_bits(codec, RT5640_DEPOP_M1,
1471 RT5640_RSTN_MASK | RT5640_HP_L_SMT_MASK | RT5640_HP_R_SMT_MASK,
1472 RT5640_RSTN_DIS | RT5640_HP_L_SMT_EN | RT5640_HP_R_SMT_EN);
1473 snd_soc_update_bits(codec, RT5640_HP_VOL,
1474 RT5640_L_MUTE | RT5640_R_MUTE, 0);
1476 snd_soc_update_bits(codec, RT5640_DEPOP_M1,
1477 RT5640_HP_SG_MASK | RT5640_HP_L_SMT_MASK |
1478 RT5640_HP_R_SMT_MASK, RT5640_HP_SG_DIS |
1479 RT5640_HP_L_SMT_DIS | RT5640_HP_R_SMT_DIS);
1483 static void rt5640_pmd_depop(struct snd_soc_codec *codec)
1485 /* headphone mute sequence */
1486 snd_soc_update_bits(codec, RT5640_DEPOP_M3,
1487 RT5640_CP_FQ1_MASK | RT5640_CP_FQ2_MASK | RT5640_CP_FQ3_MASK,
1488 (RT5640_CP_FQ_96_KHZ << RT5640_CP_FQ1_SFT) |
1489 (RT5640_CP_FQ_12_KHZ << RT5640_CP_FQ2_SFT) |
1490 (RT5640_CP_FQ_96_KHZ << RT5640_CP_FQ3_SFT));
1491 rt5640_index_write(codec, RT5640_MAMP_INT_REG2, 0xfc00);
1492 snd_soc_update_bits(codec, RT5640_DEPOP_M1,
1493 RT5640_HP_SG_MASK, RT5640_HP_SG_EN);
1494 snd_soc_update_bits(codec, RT5640_DEPOP_M1,
1495 RT5640_RSTP_MASK, RT5640_RSTP_EN);
1496 snd_soc_update_bits(codec, RT5640_DEPOP_M1,
1497 RT5640_RSTP_MASK | RT5640_HP_L_SMT_MASK |
1498 RT5640_HP_R_SMT_MASK, RT5640_RSTP_DIS |
1499 RT5640_HP_L_SMT_EN | RT5640_HP_R_SMT_EN);
1501 snd_soc_update_bits(codec, RT5640_HP_VOL,
1502 RT5640_L_MUTE | RT5640_R_MUTE, RT5640_L_MUTE | RT5640_R_MUTE);
1505 hp_amp_power(codec, 0);
1509 static int hp_event(struct snd_soc_dapm_widget *w,
1510 struct snd_kcontrol *kcontrol, int event)
1512 struct snd_soc_codec *codec = w->codec;
1515 case SND_SOC_DAPM_POST_PMU:
1516 pr_info("hp_event --SND_SOC_DAPM_POST_PMU\n");
1517 rt5640_pmu_depop(codec);
1520 case SND_SOC_DAPM_PRE_PMD:
1521 pr_info("hp_event --SND_SOC_DAPM_PRE_PMD\n");
1522 rt5640_pmd_depop(codec);
1533 static int rt5640_set_dmic1_event(struct snd_soc_dapm_widget *w,
1534 struct snd_kcontrol *kcontrol, int event)
1536 struct snd_soc_codec *codec = w->codec;
1537 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1538 mutex_lock(&rt5640->lock);
1539 CHECK_I2C_SHUTDOWN(rt5640, codec)
1542 case SND_SOC_DAPM_PRE_PMU:
1543 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
1544 RT5640_GP2_PIN_MASK | RT5640_GP3_PIN_MASK,
1545 RT5640_GP2_PIN_DMIC1_SCL | RT5640_GP3_PIN_DMIC1_SDA);
1546 snd_soc_update_bits(codec, RT5640_DMIC,
1547 RT5640_DMIC_1L_LH_MASK | RT5640_DMIC_1R_LH_MASK |
1548 RT5640_DMIC_1_DP_MASK,
1549 RT5640_DMIC_1L_LH_FALLING | RT5640_DMIC_1R_LH_RISING |
1550 RT5640_DMIC_1_DP_IN1P);
1551 snd_soc_update_bits(codec, RT5640_DMIC,
1552 RT5640_DMIC_1_EN_MASK, RT5640_DMIC_1_EN);
1554 mutex_unlock(&rt5640->lock);
1558 mutex_unlock(&rt5640->lock);
1562 static int rt5640_set_dmic2_event(struct snd_soc_dapm_widget *w,
1563 struct snd_kcontrol *kcontrol, int event)
1565 struct snd_soc_codec *codec = w->codec;
1566 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1567 mutex_lock(&rt5640->lock);
1568 CHECK_I2C_SHUTDOWN(rt5640, codec)
1571 case SND_SOC_DAPM_PRE_PMU:
1572 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
1573 RT5640_GP2_PIN_MASK | RT5640_GP4_PIN_MASK,
1574 RT5640_GP2_PIN_DMIC1_SCL | RT5640_GP4_PIN_DMIC2_SDA);
1575 snd_soc_update_bits(codec, RT5640_DMIC,
1576 RT5640_DMIC_2L_LH_MASK | RT5640_DMIC_2R_LH_MASK |
1577 RT5640_DMIC_2_DP_MASK,
1578 RT5640_DMIC_2L_LH_FALLING | RT5640_DMIC_2R_LH_RISING |
1579 RT5640_DMIC_2_DP_IN1N);
1580 snd_soc_update_bits(codec, RT5640_DMIC,
1581 RT5640_DMIC_2_EN_MASK, RT5640_DMIC_2_EN);
1583 mutex_unlock(&rt5640->lock);
1587 mutex_unlock(&rt5640->lock);
1591 static const struct snd_soc_dapm_widget rt5640_dapm_widgets[] = {
1592 SND_SOC_DAPM_SUPPLY("PLL1", RT5640_PWR_ANLG2,
1593 RT5640_PWR_PLL_BIT, 0, NULL, 0),
1596 SND_SOC_DAPM_SUPPLY("LDO2", RT5640_PWR_ANLG1,
1597 RT5640_PWR_LDO2_BIT, 0, NULL, 0),
1598 SND_SOC_DAPM_MICBIAS("micbias1", RT5640_PWR_ANLG2,
1599 RT5640_PWR_MB1_BIT, 0),
1600 SND_SOC_DAPM_MICBIAS("micbias2", RT5640_PWR_ANLG2,
1601 RT5640_PWR_MB2_BIT, 0),
1604 SND_SOC_DAPM_INPUT("MIC1"),
1605 SND_SOC_DAPM_INPUT("MIC2"),
1606 SND_SOC_DAPM_INPUT("DMIC1"),
1607 SND_SOC_DAPM_INPUT("DMIC2"),
1608 SND_SOC_DAPM_INPUT("IN1P"),
1609 SND_SOC_DAPM_INPUT("IN1N"),
1610 SND_SOC_DAPM_INPUT("IN2P"),
1611 SND_SOC_DAPM_INPUT("IN2N"),
1613 SND_SOC_DAPM_INPUT("DMIC L1"),
1614 SND_SOC_DAPM_INPUT("DMIC R1"),
1615 SND_SOC_DAPM_INPUT("DMIC L2"),
1616 SND_SOC_DAPM_INPUT("DMIC R2"),
1618 SND_SOC_DAPM_PGA_E("DMIC L1", SND_SOC_NOPM, 0, 0, NULL, 0,
1619 rt5640_set_dmic1_event, SND_SOC_DAPM_PRE_PMU),
1620 SND_SOC_DAPM_PGA("DMIC R1", SND_SOC_NOPM, 0, 0, NULL, 0),
1621 SND_SOC_DAPM_PGA_E("DMIC L2", SND_SOC_NOPM, 0, 0, NULL, 0,
1622 rt5640_set_dmic2_event, SND_SOC_DAPM_PRE_PMU),
1623 SND_SOC_DAPM_PGA("DMIC R2", SND_SOC_NOPM, 0, 0, NULL, 0),
1625 SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
1626 set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
1628 SND_SOC_DAPM_PGA("BST1", RT5640_PWR_ANLG2,
1629 RT5640_PWR_BST1_BIT, 0, NULL, 0),
1630 SND_SOC_DAPM_PGA("BST2", RT5640_PWR_ANLG2,
1631 RT5640_PWR_BST4_BIT, 0, NULL, 0),
1633 SND_SOC_DAPM_PGA("INL VOL", RT5640_PWR_VOL,
1634 RT5640_PWR_IN_L_BIT, 0, NULL, 0),
1635 SND_SOC_DAPM_PGA("INR VOL", RT5640_PWR_VOL,
1636 RT5640_PWR_IN_R_BIT, 0, NULL, 0),
1638 SND_SOC_DAPM_MUX("INL Mux", SND_SOC_NOPM, 0, 0, &rt5640_inl_mux),
1639 SND_SOC_DAPM_MUX("INR Mux", SND_SOC_NOPM, 0, 0, &rt5640_inr_mux),
1641 SND_SOC_DAPM_MIXER("RECMIXL", RT5640_PWR_MIXER, RT5640_PWR_RM_L_BIT, 0,
1642 rt5640_rec_l_mix, ARRAY_SIZE(rt5640_rec_l_mix)),
1643 SND_SOC_DAPM_MIXER("RECMIXR", RT5640_PWR_MIXER, RT5640_PWR_RM_R_BIT, 0,
1644 rt5640_rec_r_mix, ARRAY_SIZE(rt5640_rec_r_mix)),
1646 SND_SOC_DAPM_ADC("ADC L", NULL, RT5640_PWR_DIG1,
1647 RT5640_PWR_ADC_L_BIT, 0),
1648 SND_SOC_DAPM_ADC("ADC R", NULL, RT5640_PWR_DIG1,
1649 RT5640_PWR_ADC_R_BIT, 0),
1651 SND_SOC_DAPM_MUX("Stereo ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1652 &rt5640_sto_adc_l2_mux),
1653 SND_SOC_DAPM_MUX("Stereo ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1654 &rt5640_sto_adc_r2_mux),
1655 SND_SOC_DAPM_MUX("Stereo ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1656 &rt5640_sto_adc_l1_mux),
1657 SND_SOC_DAPM_MUX("Stereo ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1658 &rt5640_sto_adc_r1_mux),
1659 SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1660 &rt5640_mono_adc_l2_mux),
1661 SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1662 &rt5640_mono_adc_l1_mux),
1663 SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1664 &rt5640_mono_adc_r1_mux),
1665 SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1666 &rt5640_mono_adc_r2_mux),
1668 SND_SOC_DAPM_SUPPLY("stereo filter", RT5640_PWR_DIG2,
1669 RT5640_PWR_ADC_SF_BIT, 0, NULL, 0),
1670 SND_SOC_DAPM_MIXER("Stereo ADC MIXL", SND_SOC_NOPM, 0, 0,
1671 rt5640_sto_adc_l_mix, ARRAY_SIZE(rt5640_sto_adc_l_mix)),
1672 SND_SOC_DAPM_MIXER("Stereo ADC MIXR", SND_SOC_NOPM, 0, 0,
1673 rt5640_sto_adc_r_mix, ARRAY_SIZE(rt5640_sto_adc_r_mix)),
1674 SND_SOC_DAPM_SUPPLY("mono left filter", RT5640_PWR_DIG2,
1675 RT5640_PWR_ADC_MF_L_BIT, 0, NULL, 0),
1676 SND_SOC_DAPM_MIXER("Mono ADC MIXL", SND_SOC_NOPM, 0, 0,
1677 rt5640_mono_adc_l_mix, ARRAY_SIZE(rt5640_mono_adc_l_mix)),
1678 SND_SOC_DAPM_SUPPLY("mono right filter", RT5640_PWR_DIG2,
1679 RT5640_PWR_ADC_MF_R_BIT, 0, NULL, 0),
1680 SND_SOC_DAPM_MIXER("Mono ADC MIXR", SND_SOC_NOPM, 0, 0,
1681 rt5640_mono_adc_r_mix, ARRAY_SIZE(rt5640_mono_adc_r_mix)),
1684 SND_SOC_DAPM_MUX("IF2 ADC L Mux", SND_SOC_NOPM, 0, 0,
1685 &rt5640_if2_adc_l_mux),
1686 SND_SOC_DAPM_MUX("IF2 ADC R Mux", SND_SOC_NOPM, 0, 0,
1687 &rt5640_if2_adc_r_mux),
1689 /* Digital Interface */
1690 SND_SOC_DAPM_SUPPLY("I2S1", RT5640_PWR_DIG1,
1691 RT5640_PWR_I2S1_BIT, 0, NULL, 0),
1692 SND_SOC_DAPM_PGA("IF1 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1693 SND_SOC_DAPM_PGA("IF1 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1694 SND_SOC_DAPM_PGA("IF1 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1695 SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1696 SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1697 SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1698 SND_SOC_DAPM_SUPPLY("I2S2", RT5640_PWR_DIG1,
1699 RT5640_PWR_I2S2_BIT, 0, NULL, 0),
1700 SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1701 SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1702 SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1703 SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1704 SND_SOC_DAPM_PGA("IF2 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1705 SND_SOC_DAPM_PGA("IF2 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1706 SND_SOC_DAPM_SUPPLY("I2S3", RT5640_PWR_DIG1,
1707 RT5640_PWR_I2S3_BIT, 0, NULL, 0),
1708 SND_SOC_DAPM_PGA("IF3 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1709 SND_SOC_DAPM_PGA("IF3 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1710 SND_SOC_DAPM_PGA("IF3 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1711 SND_SOC_DAPM_PGA("IF3 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1712 SND_SOC_DAPM_PGA("IF3 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1713 SND_SOC_DAPM_PGA("IF3 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1715 /* Digital Interface Select */
1716 SND_SOC_DAPM_MUX("DAI1 RX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1717 SND_SOC_DAPM_MUX("DAI1 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1718 SND_SOC_DAPM_MUX("DAI1 IF1 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1719 SND_SOC_DAPM_MUX("DAI1 IF2 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1720 SND_SOC_DAPM_MUX("SDI1 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_sdi_mux),
1722 SND_SOC_DAPM_MUX("DAI2 RX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1723 SND_SOC_DAPM_MUX("DAI2 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1724 SND_SOC_DAPM_MUX("DAI2 IF1 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1725 SND_SOC_DAPM_MUX("DAI2 IF2 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1726 SND_SOC_DAPM_MUX("SDI2 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_sdi_mux),
1728 SND_SOC_DAPM_MUX("DAI3 RX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1729 SND_SOC_DAPM_MUX("DAI3 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1731 /* Audio Interface */
1732 SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
1733 SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
1734 SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
1735 SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
1736 SND_SOC_DAPM_AIF_IN("AIF3RX", "AIF3 Playback", 0, SND_SOC_NOPM, 0, 0),
1737 SND_SOC_DAPM_AIF_OUT("AIF3TX", "AIF3 Capture", 0, SND_SOC_NOPM, 0, 0),
1740 SND_SOC_DAPM_PGA("Audio DSP", SND_SOC_NOPM, 0, 0, NULL, 0),
1743 SND_SOC_DAPM_PGA("ANC", SND_SOC_NOPM, 0, 0, NULL, 0),
1746 /* DAC mixer before sound effect */
1747 SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
1748 rt5640_dac_l_mix, ARRAY_SIZE(rt5640_dac_l_mix)),
1749 SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
1750 rt5640_dac_r_mix, ARRAY_SIZE(rt5640_dac_r_mix)),
1752 /* DAC2 channel Mux */
1753 SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0,
1754 &rt5640_dac_l2_mux),
1755 SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0,
1756 &rt5640_dac_r2_mux),
1759 SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
1760 rt5640_sto_dac_l_mix, ARRAY_SIZE(rt5640_sto_dac_l_mix)),
1761 SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
1762 rt5640_sto_dac_r_mix, ARRAY_SIZE(rt5640_sto_dac_r_mix)),
1763 SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
1764 rt5640_mono_dac_l_mix, ARRAY_SIZE(rt5640_mono_dac_l_mix)),
1765 SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
1766 rt5640_mono_dac_r_mix, ARRAY_SIZE(rt5640_mono_dac_r_mix)),
1767 SND_SOC_DAPM_MIXER("DIG MIXL", SND_SOC_NOPM, 0, 0,
1768 rt5640_dig_l_mix, ARRAY_SIZE(rt5640_dig_l_mix)),
1769 SND_SOC_DAPM_MIXER("DIG MIXR", SND_SOC_NOPM, 0, 0,
1770 rt5640_dig_r_mix, ARRAY_SIZE(rt5640_dig_r_mix)),
1772 SND_SOC_DAPM_DAC("DAC L1", NULL, RT5640_PWR_DIG1,
1773 RT5640_PWR_DAC_L1_BIT, 0),
1774 SND_SOC_DAPM_DAC("DAC L2", NULL, RT5640_PWR_DIG1,
1775 RT5640_PWR_DAC_L2_BIT, 0),
1776 SND_SOC_DAPM_DAC("DAC R1", NULL, RT5640_PWR_DIG1,
1777 RT5640_PWR_DAC_R1_BIT, 0),
1778 SND_SOC_DAPM_DAC("DAC R2", NULL, RT5640_PWR_DIG1,
1779 RT5640_PWR_DAC_R2_BIT, 0),
1781 SND_SOC_DAPM_MIXER("SPK MIXL", RT5640_PWR_MIXER, RT5640_PWR_SM_L_BIT,
1782 0, rt5640_spk_l_mix, ARRAY_SIZE(rt5640_spk_l_mix)),
1783 SND_SOC_DAPM_MIXER("SPK MIXR", RT5640_PWR_MIXER, RT5640_PWR_SM_R_BIT,
1784 0, rt5640_spk_r_mix, ARRAY_SIZE(rt5640_spk_r_mix)),
1785 SND_SOC_DAPM_MIXER("OUT MIXL", RT5640_PWR_MIXER, RT5640_PWR_OM_L_BIT,
1786 0, rt5640_out_l_mix, ARRAY_SIZE(rt5640_out_l_mix)),
1787 SND_SOC_DAPM_MIXER("OUT MIXR", RT5640_PWR_MIXER, RT5640_PWR_OM_R_BIT,
1788 0, rt5640_out_r_mix, ARRAY_SIZE(rt5640_out_r_mix)),
1790 SND_SOC_DAPM_PGA("SPKVOL L", RT5640_PWR_VOL,
1791 RT5640_PWR_SV_L_BIT, 0, NULL, 0),
1792 SND_SOC_DAPM_PGA("SPKVOL R", RT5640_PWR_VOL,
1793 RT5640_PWR_SV_R_BIT, 0, NULL, 0),
1794 SND_SOC_DAPM_PGA("OUTVOL L", RT5640_PWR_VOL,
1795 RT5640_PWR_OV_L_BIT, 0, NULL, 0),
1796 SND_SOC_DAPM_PGA("OUTVOL R", RT5640_PWR_VOL,
1797 RT5640_PWR_OV_R_BIT, 0, NULL, 0),
1798 SND_SOC_DAPM_PGA("HPOVOL L", RT5640_PWR_VOL,
1799 RT5640_PWR_HV_L_BIT, 0, NULL, 0),
1800 SND_SOC_DAPM_PGA("HPOVOL R", RT5640_PWR_VOL,
1801 RT5640_PWR_HV_R_BIT, 0, NULL, 0),
1802 /* SPO/HPO/LOUT/Mono Mixer */
1803 SND_SOC_DAPM_MIXER("SPOL MIX", SND_SOC_NOPM, 0,
1804 0, rt5640_spo_l_mix, ARRAY_SIZE(rt5640_spo_l_mix)),
1805 SND_SOC_DAPM_MIXER("SPOR MIX", SND_SOC_NOPM, 0,
1806 0, rt5640_spo_r_mix, ARRAY_SIZE(rt5640_spo_r_mix)),
1808 SND_SOC_DAPM_MIXER("HPOL MIX", SND_SOC_NOPM, 0, 0,
1809 rt5640_hpo_mix, ARRAY_SIZE(rt5640_hpo_mix)),
1810 SND_SOC_DAPM_MIXER("HPOR MIX", SND_SOC_NOPM, 0, 0,
1811 rt5640_hpo_mix, ARRAY_SIZE(rt5640_hpo_mix)),
1812 SND_SOC_DAPM_MIXER("LOUT MIX", RT5640_PWR_ANLG1, RT5640_PWR_LM_BIT, 0,
1813 rt5640_lout_mix, ARRAY_SIZE(rt5640_lout_mix)),
1814 SND_SOC_DAPM_MIXER("Mono MIX", RT5640_PWR_ANLG1, RT5640_PWR_MM_BIT, 0,
1815 rt5640_mono_mix, ARRAY_SIZE(rt5640_mono_mix)),
1817 SND_SOC_DAPM_SUPPLY("Improve mono amp drv", RT5640_PWR_ANLG1,
1818 RT5640_PWR_MA_BIT, 0, NULL, 0),
1820 SND_SOC_DAPM_SUPPLY("Improve HP amp drv", RT5640_PWR_ANLG1,
1821 SND_SOC_NOPM, 0, hp_event, SND_SOC_DAPM_PRE_PMD |
1822 SND_SOC_DAPM_POST_PMU),
1824 SND_SOC_DAPM_PGA("HP L amp", RT5640_PWR_ANLG1,
1825 RT5640_PWR_HP_L_BIT, 0, NULL, 0),
1827 SND_SOC_DAPM_PGA("HP R amp", RT5640_PWR_ANLG1,
1828 RT5640_PWR_HP_R_BIT, 0, NULL, 0),
1830 SND_SOC_DAPM_SUPPLY("Improve SPK amp drv", RT5640_PWR_DIG1,
1831 SND_SOC_NOPM, 0, spk_event,
1832 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1835 SND_SOC_DAPM_OUTPUT("SPOLP"),
1836 SND_SOC_DAPM_OUTPUT("SPOLN"),
1837 SND_SOC_DAPM_OUTPUT("SPORP"),
1838 SND_SOC_DAPM_OUTPUT("SPORN"),
1839 SND_SOC_DAPM_OUTPUT("HPOL"),
1840 SND_SOC_DAPM_OUTPUT("HPOR"),
1841 SND_SOC_DAPM_OUTPUT("LOUTL"),
1842 SND_SOC_DAPM_OUTPUT("LOUTR"),
1843 SND_SOC_DAPM_OUTPUT("MonoP"),
1844 SND_SOC_DAPM_OUTPUT("MonoN"),
1847 static const struct snd_soc_dapm_route rt5640_dapm_routes[] = {
1848 {"IN1P", NULL, "LDO2"},
1849 {"IN2P", NULL, "LDO2"},
1851 {"IN1P", NULL, "MIC1"},
1852 {"IN1N", NULL, "MIC1"},
1853 {"IN2P", NULL, "MIC2"},
1854 {"IN2N", NULL, "MIC2"},
1856 {"DMIC L1", NULL, "DMIC1"},
1857 {"DMIC R1", NULL, "DMIC1"},
1858 {"DMIC L2", NULL, "DMIC2"},
1859 {"DMIC R2", NULL, "DMIC2"},
1861 {"BST1", NULL, "IN1P"},
1862 {"BST1", NULL, "IN1N"},
1863 {"BST2", NULL, "IN2P"},
1864 {"BST2", NULL, "IN2N"},
1866 {"INL VOL", NULL, "IN2P"},
1867 {"INR VOL", NULL, "IN2N"},
1869 {"RECMIXL", "HPOL Switch", "HPOL"},
1870 {"RECMIXL", "INL Switch", "INL VOL"},
1871 {"RECMIXL", "BST2 Switch", "BST2"},
1872 {"RECMIXL", "BST1 Switch", "BST1"},
1873 {"RECMIXL", "OUT MIXL Switch", "OUT MIXL"},
1875 {"RECMIXR", "HPOR Switch", "HPOR"},
1876 {"RECMIXR", "INR Switch", "INR VOL"},
1877 {"RECMIXR", "BST2 Switch", "BST2"},
1878 {"RECMIXR", "BST1 Switch", "BST1"},
1879 {"RECMIXR", "OUT MIXR Switch", "OUT MIXR"},
1881 {"ADC L", NULL, "RECMIXL"},
1882 {"ADC R", NULL, "RECMIXR"},
1884 {"DMIC L1", NULL, "DMIC CLK"},
1885 {"DMIC L2", NULL, "DMIC CLK"},
1887 {"Stereo ADC L2 Mux", "DMIC1", "DMIC L1"},
1888 {"Stereo ADC L2 Mux", "DMIC2", "DMIC L2"},
1889 {"Stereo ADC L2 Mux", "DIG MIX", "DIG MIXL"},
1890 {"Stereo ADC L1 Mux", "ADC", "ADC L"},
1891 {"Stereo ADC L1 Mux", "DIG MIX", "DIG MIXL"},
1893 {"Stereo ADC R1 Mux", "ADC", "ADC R"},
1894 {"Stereo ADC R1 Mux", "DIG MIX", "DIG MIXR"},
1895 {"Stereo ADC R2 Mux", "DMIC1", "DMIC R1"},
1896 {"Stereo ADC R2 Mux", "DMIC2", "DMIC R2"},
1897 {"Stereo ADC R2 Mux", "DIG MIX", "DIG MIXR"},
1899 {"Mono ADC L2 Mux", "DMIC L1", "DMIC L1"},
1900 {"Mono ADC L2 Mux", "DMIC L2", "DMIC L2"},
1901 {"Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL"},
1902 {"Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL"},
1903 {"Mono ADC L1 Mux", "ADCL", "ADC L"},
1905 {"Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR"},
1906 {"Mono ADC R1 Mux", "ADCR", "ADC R"},
1907 {"Mono ADC R2 Mux", "DMIC R1", "DMIC R1"},
1908 {"Mono ADC R2 Mux", "DMIC R2", "DMIC R2"},
1909 {"Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR"},
1911 {"Stereo ADC MIXL", "ADC1 Switch", "Stereo ADC L1 Mux"},
1912 {"Stereo ADC MIXL", "ADC2 Switch", "Stereo ADC L2 Mux"},
1913 {"Stereo ADC MIXL", NULL, "stereo filter"},
1914 {"stereo filter", NULL, "PLL1", check_sysclk1_source},
1916 {"Stereo ADC MIXR", "ADC1 Switch", "Stereo ADC R1 Mux"},
1917 {"Stereo ADC MIXR", "ADC2 Switch", "Stereo ADC R2 Mux"},
1918 {"Stereo ADC MIXR", NULL, "stereo filter"},
1919 {"stereo filter", NULL, "PLL1", check_sysclk1_source},
1921 {"Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux"},
1922 {"Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux"},
1923 {"Mono ADC MIXL", NULL, "mono left filter"},
1924 {"mono left filter", NULL, "PLL1", check_sysclk1_source},
1926 {"Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux"},
1927 {"Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux"},
1928 {"Mono ADC MIXR", NULL, "mono right filter"},
1929 {"mono right filter", NULL, "PLL1", check_sysclk1_source},
1931 {"IF2 ADC L Mux", "Mono ADC MIXL", "Mono ADC MIXL"},
1932 {"IF2 ADC R Mux", "Mono ADC MIXR", "Mono ADC MIXR"},
1934 {"IF2 ADC L", NULL, "IF2 ADC L Mux"},
1935 {"IF2 ADC R", NULL, "IF2 ADC R Mux"},
1936 {"IF3 ADC L", NULL, "Mono ADC MIXL"},
1937 {"IF3 ADC R", NULL, "Mono ADC MIXR"},
1938 {"IF1 ADC L", NULL, "Stereo ADC MIXL"},
1939 {"IF1 ADC R", NULL, "Stereo ADC MIXR"},
1941 {"IF1 ADC", NULL, "I2S1"},
1942 {"IF1 ADC", NULL, "IF1 ADC L"},
1943 {"IF1 ADC", NULL, "IF1 ADC R"},
1944 {"IF2 ADC", NULL, "I2S2"},
1945 {"IF2 ADC", NULL, "IF2 ADC L"},
1946 {"IF2 ADC", NULL, "IF2 ADC R"},
1947 {"IF3 ADC", NULL, "I2S3"},
1948 {"IF3 ADC", NULL, "IF3 ADC L"},
1949 {"IF3 ADC", NULL, "IF3 ADC R"},
1951 {"DAI1 TX Mux", "1:1|2:2|3:3", "IF1 ADC"},
1952 {"DAI1 TX Mux", "1:1|2:3|3:2", "IF1 ADC"},
1953 {"DAI1 TX Mux", "1:3|2:1|3:2", "IF2 ADC"},
1954 {"DAI1 TX Mux", "1:2|2:1|3:3", "IF2 ADC"},
1955 {"DAI1 TX Mux", "1:3|2:2|3:1", "IF3 ADC"},
1956 {"DAI1 TX Mux", "1:2|2:3|3:1", "IF3 ADC"},
1957 {"DAI1 IF1 Mux", "1:1|2:1|3:3", "IF1 ADC"},
1958 {"DAI1 IF2 Mux", "1:1|2:1|3:3", "IF2 ADC"},
1959 {"SDI1 TX Mux", "IF1", "DAI1 IF1 Mux"},
1960 {"SDI1 TX Mux", "IF2", "DAI1 IF2 Mux"},
1962 {"DAI2 TX Mux", "1:2|2:3|3:1", "IF1 ADC"},
1963 {"DAI2 TX Mux", "1:2|2:1|3:3", "IF1 ADC"},
1964 {"DAI2 TX Mux", "1:1|2:2|3:3", "IF2 ADC"},
1965 {"DAI2 TX Mux", "1:3|2:2|3:1", "IF2 ADC"},
1966 {"DAI2 TX Mux", "1:1|2:3|3:2", "IF3 ADC"},
1967 {"DAI2 TX Mux", "1:3|2:1|3:2", "IF3 ADC"},
1968 {"DAI2 IF1 Mux", "1:2|2:2|3:3", "IF1 ADC"},
1969 {"DAI2 IF2 Mux", "1:2|2:2|3:3", "IF2 ADC"},
1970 {"SDI2 TX Mux", "IF1", "DAI2 IF1 Mux"},
1971 {"SDI2 TX Mux", "IF2", "DAI2 IF2 Mux"},
1973 {"DAI3 TX Mux", "1:3|2:1|3:2", "IF1 ADC"},
1974 {"DAI3 TX Mux", "1:3|2:2|3:1", "IF1 ADC"},
1975 {"DAI3 TX Mux", "1:1|2:3|3:2", "IF2 ADC"},
1976 {"DAI3 TX Mux", "1:2|2:3|3:1", "IF2 ADC"},
1977 {"DAI3 TX Mux", "1:1|2:2|3:3", "IF3 ADC"},
1978 {"DAI3 TX Mux", "1:2|2:1|3:3", "IF3 ADC"},
1979 {"DAI3 TX Mux", "1:1|2:1|3:3", "IF3 ADC"},
1980 {"DAI3 TX Mux", "1:2|2:2|3:3", "IF3 ADC"},
1982 {"AIF1TX", NULL, "DAI1 TX Mux"},
1983 {"AIF1TX", NULL, "SDI1 TX Mux"},
1984 {"AIF2TX", NULL, "DAI2 TX Mux"},
1985 {"AIF2TX", NULL, "SDI2 TX Mux"},
1986 {"AIF3TX", NULL, "DAI3 TX Mux"},
1988 {"DAI1 RX Mux", "1:1|2:2|3:3", "AIF1RX"},
1989 {"DAI1 RX Mux", "1:1|2:3|3:2", "AIF1RX"},
1990 {"DAI1 RX Mux", "1:1|2:1|3:3", "AIF1RX"},
1991 {"DAI1 RX Mux", "1:2|2:3|3:1", "AIF2RX"},
1992 {"DAI1 RX Mux", "1:2|2:1|3:3", "AIF2RX"},
1993 {"DAI1 RX Mux", "1:2|2:2|3:3", "AIF2RX"},
1994 {"DAI1 RX Mux", "1:3|2:1|3:2", "AIF3RX"},
1995 {"DAI1 RX Mux", "1:3|2:2|3:1", "AIF3RX"},
1997 {"DAI2 RX Mux", "1:3|2:1|3:2", "AIF1RX"},
1998 {"DAI2 RX Mux", "1:2|2:1|3:3", "AIF1RX"},
1999 {"DAI2 RX Mux", "1:1|2:1|3:3", "AIF1RX"},
2000 {"DAI2 RX Mux", "1:1|2:2|3:3", "AIF2RX"},
2001 {"DAI2 RX Mux", "1:3|2:2|3:1", "AIF2RX"},
2002 {"DAI2 RX Mux", "1:2|2:2|3:3", "AIF2RX"},
2003 {"DAI2 RX Mux", "1:1|2:3|3:2", "AIF3RX"},
2004 {"DAI2 RX Mux", "1:2|2:3|3:1", "AIF3RX"},
2006 {"DAI3 RX Mux", "1:3|2:2|3:1", "AIF1RX"},
2007 {"DAI3 RX Mux", "1:2|2:3|3:1", "AIF1RX"},
2008 {"DAI3 RX Mux", "1:1|2:3|3:2", "AIF2RX"},
2009 {"DAI3 RX Mux", "1:3|2:1|3:2", "AIF2RX"},
2010 {"DAI3 RX Mux", "1:1|2:2|3:3", "AIF3RX"},
2011 {"DAI3 RX Mux", "1:2|2:1|3:3", "AIF3RX"},
2012 {"DAI3 RX Mux", "1:1|2:1|3:3", "AIF3RX"},
2013 {"DAI3 RX Mux", "1:2|2:2|3:3", "AIF3RX"},
2015 {"IF1 DAC", NULL, "I2S1"},
2016 {"IF1 DAC", NULL, "DAI1 RX Mux"},
2017 {"IF2 DAC", NULL, "I2S2"},
2018 {"IF2 DAC", NULL, "DAI2 RX Mux"},
2019 {"IF3 DAC", NULL, "I2S3"},
2020 {"IF3 DAC", NULL, "DAI3 RX Mux"},
2022 {"IF1 DAC L", NULL, "IF1 DAC"},
2023 {"IF1 DAC R", NULL, "IF1 DAC"},
2024 {"IF2 DAC L", NULL, "IF2 DAC"},
2025 {"IF2 DAC R", NULL, "IF2 DAC"},
2026 {"IF3 DAC L", NULL, "IF3 DAC"},
2027 {"IF3 DAC R", NULL, "IF3 DAC"},
2029 {"DAC MIXL", "Stereo ADC Switch", "Stereo ADC MIXL"},
2030 {"DAC MIXL", "INF1 Switch", "IF1 DAC L"},
2031 {"DAC MIXR", "Stereo ADC Switch", "Stereo ADC MIXR"},
2032 {"DAC MIXR", "INF1 Switch", "IF1 DAC R"},
2034 {"ANC", NULL, "Stereo ADC MIXL"},
2035 {"ANC", NULL, "Stereo ADC MIXR"},
2037 {"Audio DSP", NULL, "DAC MIXL"},
2038 {"Audio DSP", NULL, "DAC MIXR"},
2040 {"DAC L2 Mux", "IF2", "IF2 DAC L"},
2041 {"DAC L2 Mux", "IF3", "IF3 DAC L"},
2042 {"DAC L2 Mux", "Base L/R", "Audio DSP"},
2044 {"DAC R2 Mux", "IF2", "IF2 DAC R"},
2045 {"DAC R2 Mux", "IF3", "IF3 DAC R"},
2047 {"Stereo DAC MIXL", "DAC L1 Switch", "DAC MIXL"},
2048 {"Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Mux"},
2049 {"Stereo DAC MIXL", "ANC Switch", "ANC"},
2050 {"Stereo DAC MIXR", "DAC R1 Switch", "DAC MIXR"},
2051 {"Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Mux"},
2052 {"Stereo DAC MIXR", "ANC Switch", "ANC"},
2054 {"Mono DAC MIXL", "DAC L1 Switch", "DAC MIXL"},
2055 {"Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Mux"},
2056 {"Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Mux"},
2057 {"Mono DAC MIXR", "DAC R1 Switch", "DAC MIXR"},
2058 {"Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Mux"},
2059 {"Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Mux"},
2061 {"DIG MIXL", "DAC L1 Switch", "DAC MIXL"},
2062 {"DIG MIXL", "DAC L2 Switch", "DAC L2 Mux"},
2063 {"DIG MIXR", "DAC R1 Switch", "DAC MIXR"},
2064 {"DIG MIXR", "DAC R2 Switch", "DAC R2 Mux"},
2066 {"DAC L1", NULL, "Stereo DAC MIXL"},
2067 {"DAC L1", NULL, "PLL1", check_sysclk1_source},
2068 {"DAC R1", NULL, "Stereo DAC MIXR"},
2069 {"DAC R1", NULL, "PLL1", check_sysclk1_source},
2070 {"DAC L2", NULL, "Mono DAC MIXL"},
2071 {"DAC L2", NULL, "PLL1", check_sysclk1_source},
2072 {"DAC R2", NULL, "Mono DAC MIXR"},
2073 {"DAC R2", NULL, "PLL1", check_sysclk1_source},
2075 {"SPK MIXL", "REC MIXL Switch", "RECMIXL"},
2076 {"SPK MIXL", "INL Switch", "INL VOL"},
2077 {"SPK MIXL", "DAC L1 Switch", "DAC L1"},
2078 {"SPK MIXL", "DAC L2 Switch", "DAC L2"},
2079 {"SPK MIXL", "OUT MIXL Switch", "OUT MIXL"},
2080 {"SPK MIXR", "REC MIXR Switch", "RECMIXR"},
2081 {"SPK MIXR", "INR Switch", "INR VOL"},
2082 {"SPK MIXR", "DAC R1 Switch", "DAC R1"},
2083 {"SPK MIXR", "DAC R2 Switch", "DAC R2"},
2084 {"SPK MIXR", "OUT MIXR Switch", "OUT MIXR"},
2086 {"OUT MIXL", "SPK MIXL Switch", "SPK MIXL"},
2087 {"OUT MIXL", "BST1 Switch", "BST1"},
2088 {"OUT MIXL", "INL Switch", "INL VOL"},
2089 {"OUT MIXL", "REC MIXL Switch", "RECMIXL"},
2090 {"OUT MIXL", "DAC R2 Switch", "DAC R2"},
2091 {"OUT MIXL", "DAC L2 Switch", "DAC L2"},
2092 {"OUT MIXL", "DAC L1 Switch", "DAC L1"},
2094 {"OUT MIXR", "SPK MIXR Switch", "SPK MIXR"},
2095 {"OUT MIXR", "BST2 Switch", "BST2"},
2096 {"OUT MIXR", "BST1 Switch", "BST1"},
2097 {"OUT MIXR", "INR Switch", "INR VOL"},
2098 {"OUT MIXR", "REC MIXR Switch", "RECMIXR"},
2099 {"OUT MIXR", "DAC L2 Switch", "DAC L2"},
2100 {"OUT MIXR", "DAC R2 Switch", "DAC R2"},
2101 {"OUT MIXR", "DAC R1 Switch", "DAC R1"},
2103 {"SPKVOL L", NULL, "SPK MIXL"},
2104 {"SPKVOL R", NULL, "SPK MIXR"},
2105 {"HPOVOL L", NULL, "OUT MIXL"},
2106 {"HPOVOL R", NULL, "OUT MIXR"},
2107 {"OUTVOL L", NULL, "OUT MIXL"},
2108 {"OUTVOL R", NULL, "OUT MIXR"},
2110 {"SPOL MIX", "DAC R1 Switch", "DAC R1"},
2111 {"SPOL MIX", "DAC L1 Switch", "DAC L1"},
2112 {"SPOL MIX", "SPKVOL R Switch", "SPKVOL R"},
2113 {"SPOL MIX", "SPKVOL L Switch", "SPKVOL L"},
2114 {"SPOL MIX", "BST1 Switch", "BST1"},
2115 {"SPOR MIX", "DAC R1 Switch", "DAC R1"},
2116 {"SPOR MIX", "SPKVOL R Switch", "SPKVOL R"},
2117 {"SPOR MIX", "BST1 Switch", "BST1"},
2119 {"HPOL MIX", "DAC2 Switch", "DAC L2"},
2120 {"HPOL MIX", "DAC1 Switch", "DAC L1"},
2121 {"HPOL MIX", "HPVOL Switch", "HPOVOL L"},
2122 {"HPOR MIX", "DAC2 Switch", "DAC R2"},
2123 {"HPOR MIX", "DAC1 Switch", "DAC R1"},
2124 {"HPOR MIX", "HPVOL Switch", "HPOVOL R"},
2126 {"LOUT MIX", "DAC L1 Switch", "DAC L1"},
2127 {"LOUT MIX", "DAC R1 Switch", "DAC R1"},
2128 {"LOUT MIX", "OUTVOL L Switch", "OUTVOL L"},
2129 {"LOUT MIX", "OUTVOL R Switch", "OUTVOL R"},
2131 {"Mono MIX", "DAC R2 Switch", "DAC R2"},
2132 {"Mono MIX", "DAC L2 Switch", "DAC L2"},
2133 {"Mono MIX", "OUTVOL R Switch", "OUTVOL R"},
2134 {"Mono MIX", "OUTVOL L Switch", "OUTVOL L"},
2135 {"Mono MIX", "BST1 Switch", "BST1"},
2137 {"HP L amp", NULL, "HPOL MIX"},
2138 {"HP R amp", NULL, "HPOR MIX"},
2140 /* {"HP L amp", NULL, "Improve HP amp drv"},
2141 {"HP R amp", NULL, "Improve HP amp drv"}, */
2143 {"SPOLP", NULL, "SPOL MIX"},
2144 {"SPOLN", NULL, "SPOL MIX"},
2145 {"SPORP", NULL, "SPOR MIX"},
2146 {"SPORN", NULL, "SPOR MIX"},
2148 {"SPOLP", NULL, "Improve SPK amp drv"},
2149 {"SPOLN", NULL, "Improve SPK amp drv"},
2150 {"SPORP", NULL, "Improve SPK amp drv"},
2151 {"SPORN", NULL, "Improve SPK amp drv"},
2153 {"HPOL", NULL, "Improve HP amp drv"},
2154 {"HPOR", NULL, "Improve HP amp drv"},
2156 {"HPOL", NULL, "HP L amp"},
2157 {"HPOR", NULL, "HP R amp"},
2158 {"LOUTL", NULL, "LOUT MIX"},
2159 {"LOUTR", NULL, "LOUT MIX"},
2160 {"MonoP", NULL, "Mono MIX"},
2161 {"MonoN", NULL, "Mono MIX"},
2162 {"MonoP", NULL, "Improve mono amp drv"},
2165 static int get_sdp_info(struct snd_soc_codec *codec, int dai_id)
2167 int ret = 0, val = snd_soc_read(codec, RT5640_I2S1_SDP);
2172 val = (val & RT5640_I2S_IF_MASK) >> RT5640_I2S_IF_SFT;
2175 if (val == RT5640_IF_123 || val == RT5640_IF_132 ||
2176 val == RT5640_IF_113)
2177 ret |= RT5640_U_IF1;
2178 if (val == RT5640_IF_312 || val == RT5640_IF_213 ||
2179 val == RT5640_IF_113)
2180 ret |= RT5640_U_IF2;
2181 if (val == RT5640_IF_321 || val == RT5640_IF_231)
2182 ret |= RT5640_U_IF3;
2186 if (val == RT5640_IF_231 || val == RT5640_IF_213 ||
2187 val == RT5640_IF_223)
2188 ret |= RT5640_U_IF1;
2189 if (val == RT5640_IF_123 || val == RT5640_IF_321 ||
2190 val == RT5640_IF_223)
2191 ret |= RT5640_U_IF2;
2192 if (val == RT5640_IF_132 || val == RT5640_IF_312)
2193 ret |= RT5640_U_IF3;
2196 #if defined(CONFIG_SND_SOC_RT5643_MODULE) || defined(CONFIG_SND_SOC_RT5643) || \
2197 defined(CONFIG_SND_SOC_RT5646_MODULE) || defined(CONFIG_SND_SOC_RT5646)
2199 if (val == RT5640_IF_312 || val == RT5640_IF_321)
2200 ret |= RT5640_U_IF1;
2201 if (val == RT5640_IF_132 || val == RT5640_IF_231)
2202 ret |= RT5640_U_IF2;
2203 if (val == RT5640_IF_123 || val == RT5640_IF_213 ||
2204 val == RT5640_IF_113 || val == RT5640_IF_223)
2205 ret |= RT5640_U_IF3;
2217 static int get_clk_info(int sclk, int rate)
2219 int i, pd[] = {1, 2, 3, 4, 6, 8, 12, 16};
2221 if (sclk <= 0 || rate <= 0)
2225 for (i = 0; i < ARRAY_SIZE(pd); i++)
2226 if (sclk == rate * pd[i])
2232 static int rt5640_hw_params(struct snd_pcm_substream *substream,
2233 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
2235 struct snd_soc_pcm_runtime *rtd = substream->private_data;
2236 struct snd_soc_codec *codec = rtd->codec;
2237 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2238 unsigned int val_len = 0, val_clk, mask_clk, dai_sel;
2239 int pre_div, bclk_ms, frame_size;
2240 mutex_lock(&rt5640->lock);
2241 CHECK_I2C_SHUTDOWN(rt5640, codec)
2243 rt5640->lrck[dai->id] = params_rate(params);
2244 pre_div = get_clk_info(rt5640->sysclk, rt5640->lrck[dai->id]);
2246 dev_err(codec->dev, "Unsupported clock setting\n");
2247 mutex_unlock(&rt5640->lock);
2250 frame_size = snd_soc_params_to_frame_size(params);
2251 if (frame_size < 0) {
2252 dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size);
2253 mutex_unlock(&rt5640->lock);
2256 bclk_ms = frame_size >= 32 ? 1 : 0;
2257 rt5640->bclk[dai->id] = rt5640->lrck[dai->id] * (32 << bclk_ms);
2259 dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
2260 rt5640->bclk[dai->id], rt5640->lrck[dai->id]);
2261 dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
2262 bclk_ms, pre_div, dai->id);
2264 switch (params_format(params)) {
2265 case SNDRV_PCM_FORMAT_S16_LE:
2267 case SNDRV_PCM_FORMAT_S20_3LE:
2268 val_len |= RT5640_I2S_DL_20;
2270 case SNDRV_PCM_FORMAT_S24_LE:
2271 val_len |= RT5640_I2S_DL_24;
2273 case SNDRV_PCM_FORMAT_S8:
2274 val_len |= RT5640_I2S_DL_8;
2277 mutex_unlock(&rt5640->lock);
2281 dai_sel = get_sdp_info(codec, dai->id);
2283 dev_err(codec->dev, "Failed to get sdp info: %d\n", dai_sel);
2284 mutex_unlock(&rt5640->lock);
2287 if (dai_sel & RT5640_U_IF1) {
2288 mask_clk = RT5640_I2S_BCLK_MS1_MASK | RT5640_I2S_PD1_MASK;
2289 val_clk = bclk_ms << RT5640_I2S_BCLK_MS1_SFT |
2290 pre_div << RT5640_I2S_PD1_SFT;
2291 snd_soc_update_bits(codec, RT5640_I2S1_SDP,
2292 RT5640_I2S_DL_MASK, val_len);
2293 snd_soc_update_bits(codec, RT5640_ADDA_CLK1, mask_clk, val_clk);
2295 if (dai_sel & RT5640_U_IF2) {
2296 mask_clk = RT5640_I2S_BCLK_MS2_MASK | RT5640_I2S_PD2_MASK;
2297 val_clk = bclk_ms << RT5640_I2S_BCLK_MS2_SFT |
2298 pre_div << RT5640_I2S_PD2_SFT;
2299 snd_soc_update_bits(codec, RT5640_I2S2_SDP,
2300 RT5640_I2S_DL_MASK, val_len);
2301 snd_soc_update_bits(codec, RT5640_ADDA_CLK1, mask_clk, val_clk);
2303 #if defined(CONFIG_SND_SOC_RT5643_MODULE) || defined(CONFIG_SND_SOC_RT5643) || \
2304 defined(CONFIG_SND_SOC_RT5646_MODULE) || defined(CONFIG_SND_SOC_RT5646)
2305 if (dai_sel & RT5640_U_IF3) {
2306 mask_clk = RT5640_I2S_BCLK_MS3_MASK | RT5640_I2S_PD3_MASK;
2307 val_clk = bclk_ms << RT5640_I2S_BCLK_MS3_SFT |
2308 pre_div << RT5640_I2S_PD3_SFT;
2309 snd_soc_update_bits(codec, RT5640_I2S3_SDP,
2310 RT5640_I2S_DL_MASK, val_len);
2311 snd_soc_update_bits(codec, RT5640_ADDA_CLK1, mask_clk, val_clk);
2314 mutex_unlock(&rt5640->lock);
2318 static int rt5640_prepare(struct snd_pcm_substream *substream,
2319 struct snd_soc_dai *dai)
2321 struct snd_soc_pcm_runtime *rtd = substream->private_data;
2322 struct snd_soc_codec *codec = rtd->codec;
2323 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2325 rt5640->aif_pu = dai->id;
2329 static int rt5640_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
2331 struct snd_soc_codec *codec = dai->codec;
2332 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2333 unsigned int reg_val = 0, dai_sel;
2334 mutex_lock(&rt5640->lock);
2335 CHECK_I2C_SHUTDOWN(rt5640, codec)
2337 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
2338 case SND_SOC_DAIFMT_CBM_CFM:
2339 rt5640->master[dai->id] = 1;
2341 case SND_SOC_DAIFMT_CBS_CFS:
2342 reg_val |= RT5640_I2S_MS_S;
2343 rt5640->master[dai->id] = 0;
2346 mutex_unlock(&rt5640->lock);
2350 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
2351 case SND_SOC_DAIFMT_NB_NF:
2353 case SND_SOC_DAIFMT_IB_NF:
2354 reg_val |= RT5640_I2S_BP_INV;
2357 mutex_unlock(&rt5640->lock);
2361 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
2362 case SND_SOC_DAIFMT_I2S:
2364 case SND_SOC_DAIFMT_LEFT_J:
2365 reg_val |= RT5640_I2S_DF_LEFT;
2367 case SND_SOC_DAIFMT_DSP_A:
2368 reg_val |= RT5640_I2S_DF_PCM_A;
2370 case SND_SOC_DAIFMT_DSP_B:
2371 reg_val |= RT5640_I2S_DF_PCM_B;
2374 mutex_unlock(&rt5640->lock);
2378 dai_sel = get_sdp_info(codec, dai->id);
2380 dev_err(codec->dev, "Failed to get sdp info: %d\n", dai_sel);
2381 mutex_unlock(&rt5640->lock);
2384 if (dai_sel & RT5640_U_IF1) {
2385 snd_soc_update_bits(codec, RT5640_I2S1_SDP,
2386 RT5640_I2S_MS_MASK | RT5640_I2S_BP_MASK |
2387 RT5640_I2S_DF_MASK, reg_val);
2389 if (dai_sel & RT5640_U_IF2) {
2390 snd_soc_update_bits(codec, RT5640_I2S2_SDP,
2391 RT5640_I2S_MS_MASK | RT5640_I2S_BP_MASK |
2392 RT5640_I2S_DF_MASK, reg_val);
2394 #if defined(CONFIG_SND_SOC_RT5643_MODULE) || defined(CONFIG_SND_SOC_RT5643) || \
2395 defined(CONFIG_SND_SOC_RT5646_MODULE) || defined(CONFIG_SND_SOC_RT5646)
2396 if (dai_sel & RT5640_U_IF3) {
2397 snd_soc_update_bits(codec, RT5640_I2S3_SDP,
2398 RT5640_I2S_MS_MASK | RT5640_I2S_BP_MASK |
2399 RT5640_I2S_DF_MASK, reg_val);
2402 mutex_unlock(&rt5640->lock);
2406 static int rt5640_set_dai_sysclk(struct snd_soc_dai *dai,
2407 int clk_id, unsigned int freq, int dir)
2409 struct snd_soc_codec *codec = dai->codec;
2410 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2411 unsigned int reg_val = 0;
2412 mutex_lock(&rt5640->lock);
2413 CHECK_I2C_SHUTDOWN(rt5640, codec)
2415 if (freq == rt5640->sysclk && clk_id == rt5640->sysclk_src) {
2416 mutex_unlock(&rt5640->lock);
2421 case RT5640_SCLK_S_MCLK:
2422 reg_val |= RT5640_SCLK_SRC_MCLK;
2424 case RT5640_SCLK_S_PLL1:
2425 reg_val |= RT5640_SCLK_SRC_PLL1;
2427 case RT5640_SCLK_S_PLL1_TK:
2428 reg_val |= RT5640_SCLK_SRC_PLL1T;
2430 case RT5640_SCLK_S_RCCLK:
2431 reg_val |= RT5640_SCLK_SRC_RCCLK;
2434 dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id);
2435 mutex_unlock(&rt5640->lock);
2438 snd_soc_update_bits(codec, RT5640_GLB_CLK,
2439 RT5640_SCLK_SRC_MASK, reg_val);
2440 rt5640->sysclk = freq;
2441 rt5640->sysclk_src = clk_id;
2443 dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
2444 mutex_unlock(&rt5640->lock);
2449 * rt5640_pll_calc - Calcualte PLL M/N/K code.
2450 * @freq_in: external clock provided to codec.
2451 * @freq_out: target clock which codec works on.
2452 * @pll_code: Pointer to structure with M, N, K and bypass flag.
2454 * Calcualte M/N/K code to configure PLL for codec. And K is assigned to 2
2455 * which make calculation more efficiently.
2457 * Returns 0 for success or negative error code.
2459 static int rt5640_pll_calc(const unsigned int freq_in,
2460 const unsigned int freq_out, struct rt5640_pll_code *pll_code)
2462 int max_n = RT5640_PLL_N_MAX, max_m = RT5640_PLL_M_MAX;
2463 int k, n = 0, m = 0, red, n_t, m_t, pll_out, in_t, out_t;
2464 int red_t = abs(freq_out - freq_in);
2465 bool bypass = false;
2467 if (RT5640_PLL_INP_MAX < freq_in || RT5640_PLL_INP_MIN > freq_in)
2470 k = 100000000 / freq_out - 2;
2471 if (k > RT5640_PLL_K_MAX)
2472 k = RT5640_PLL_K_MAX;
2473 for (n_t = 0; n_t <= max_n; n_t++) {
2474 in_t = freq_in / (k + 2);
2475 pll_out = freq_out / (n_t + 2);
2478 if (in_t == pll_out) {
2483 red = abs(in_t - pll_out);
2492 for (m_t = 0; m_t <= max_m; m_t++) {
2493 out_t = in_t / (m_t + 2);
2494 red = abs(out_t - pll_out);
2505 pr_debug("Only get approximation about PLL\n");
2509 pll_code->m_bp = bypass;
2510 pll_code->m_code = m;
2511 pll_code->n_code = n;
2512 pll_code->k_code = k;
2516 static int rt5640_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
2517 unsigned int freq_in, unsigned int freq_out)
2519 struct snd_soc_codec *codec = dai->codec;
2520 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2521 struct rt5640_pll_code pll_code;
2523 mutex_lock(&rt5640->lock);
2524 CHECK_I2C_SHUTDOWN(rt5640, codec)
2526 if (source == rt5640->pll_src && freq_in == rt5640->pll_in &&
2527 freq_out == rt5640->pll_out) {
2528 mutex_unlock(&rt5640->lock);
2532 if (!freq_in || !freq_out) {
2533 dev_dbg(codec->dev, "PLL disabled\n");
2536 rt5640->pll_out = 0;
2537 snd_soc_update_bits(codec, RT5640_GLB_CLK,
2538 RT5640_SCLK_SRC_MASK, RT5640_SCLK_SRC_MCLK);
2539 mutex_unlock(&rt5640->lock);
2544 case RT5640_PLL1_S_MCLK:
2545 snd_soc_update_bits(codec, RT5640_GLB_CLK,
2546 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_MCLK);
2548 case RT5640_PLL1_S_BCLK1:
2549 case RT5640_PLL1_S_BCLK2:
2550 #if defined(CONFIG_SND_SOC_RT5643_MODULE) || defined(CONFIG_SND_SOC_RT5643) || \
2551 defined(CONFIG_SND_SOC_RT5646_MODULE) || defined(CONFIG_SND_SOC_RT5646)
2552 case RT5640_PLL1_S_BCLK3:
2555 dai_sel = get_sdp_info(codec, dai->id);
2558 "Failed to get sdp info: %d\n", dai_sel);
2559 mutex_unlock(&rt5640->lock);
2562 if (dai_sel & RT5640_U_IF1) {
2563 snd_soc_update_bits(codec, RT5640_GLB_CLK,
2564 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_BCLK1);
2566 if (dai_sel & RT5640_U_IF2) {
2567 snd_soc_update_bits(codec, RT5640_GLB_CLK,
2568 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_BCLK2);
2570 if (dai_sel & RT5640_U_IF3) {
2571 snd_soc_update_bits(codec, RT5640_GLB_CLK,
2572 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_BCLK3);
2576 dev_err(codec->dev, "Unknown PLL source %d\n", source);
2577 mutex_unlock(&rt5640->lock);
2581 ret = rt5640_pll_calc(freq_in, freq_out, &pll_code);
2583 dev_err(codec->dev, "Unsupport input clock %d\n", freq_in);
2584 mutex_unlock(&rt5640->lock);
2588 dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=%d\n", pll_code.m_bp,
2589 (pll_code.m_bp ? 0 : pll_code.m_code),
2590 pll_code.n_code, pll_code.k_code);
2592 snd_soc_write(codec, RT5640_PLL_CTRL1,
2593 pll_code.n_code << RT5640_PLL_N_SFT | pll_code.k_code);
2594 snd_soc_write(codec, RT5640_PLL_CTRL2,
2595 (pll_code.m_bp ? 0 : pll_code.m_code) << RT5640_PLL_M_SFT |
2596 pll_code.m_bp << RT5640_PLL_M_BP_SFT);
2598 rt5640->pll_in = freq_in;
2599 rt5640->pll_out = freq_out;
2600 rt5640->pll_src = source;
2602 mutex_unlock(&rt5640->lock);
2607 * rt5640_index_show - Dump private registers.
2608 * @dev: codec device.
2609 * @attr: device attribute.
2610 * @buf: buffer for display.
2612 * To show non-zero values of all private registers.
2614 * Returns buffer length.
2616 static ssize_t rt5640_index_show(struct device *dev,
2617 struct device_attribute *attr, char *buf)
2619 struct i2c_client *client = to_i2c_client(dev);
2620 struct rt5640_priv *rt5640 = i2c_get_clientdata(client);
2621 struct snd_soc_codec *codec = rt5640->codec;
2624 mutex_lock(&rt5640->lock);
2625 CHECK_I2C_SHUTDOWN(rt5640, codec)
2627 cnt += sprintf(buf, "RT5640 index register\n");
2628 for (i = 0; i < 0xb4; i++) {
2629 if (cnt + 9 >= PAGE_SIZE - 1)
2631 val = rt5640_index_read(codec, i);
2634 cnt += snprintf(buf + cnt, 10, "%02x: %04x\n", i, val);
2637 if (cnt >= PAGE_SIZE)
2638 cnt = PAGE_SIZE - 1;
2640 mutex_unlock(&rt5640->lock);
2643 static DEVICE_ATTR(index_reg, 0444, rt5640_index_show, NULL);
2645 static int rt5640_set_bias_level(struct snd_soc_codec *codec,
2646 enum snd_soc_bias_level level)
2648 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2649 mutex_lock(&rt5640->lock);
2650 CHECK_I2C_SHUTDOWN(rt5640, codec)
2653 case SND_SOC_BIAS_ON:
2655 snd_soc_update_bits(codec, RT5640_SPK_VOL,
2656 RT5640_L_MUTE | RT5640_R_MUTE, 0);
2657 snd_soc_update_bits(codec, RT5640_HP_VOL,
2658 RT5640_L_MUTE | RT5640_R_MUTE, 0);
2661 case SND_SOC_BIAS_PREPARE:
2663 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
2664 RT5640_PWR_VREF1 | RT5640_PWR_MB |
2665 RT5640_PWR_BG | RT5640_PWR_VREF2,
2666 RT5640_PWR_VREF1 | RT5640_PWR_MB |
2667 RT5640_PWR_BG | RT5640_PWR_VREF2);
2670 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
2671 RT5640_PWR_FV1 | RT5640_PWR_FV2,
2672 RT5640_PWR_FV1 | RT5640_PWR_FV2);
2674 snd_soc_update_bits(codec, RT5640_PWR_ANLG2,
2675 RT5640_PWR_MB1 | RT5640_PWR_MB2,
2676 RT5640_PWR_MB1 | RT5640_PWR_MB2);
2680 case SND_SOC_BIAS_STANDBY:
2682 snd_soc_update_bits(codec, RT5640_SPK_VOL, RT5640_L_MUTE |
2683 RT5640_R_MUTE, RT5640_L_MUTE | RT5640_R_MUTE);
2684 snd_soc_update_bits(codec, RT5640_HP_VOL, RT5640_L_MUTE |
2685 RT5640_R_MUTE, RT5640_L_MUTE | RT5640_R_MUTE);
2687 snd_soc_update_bits(codec, RT5640_PWR_ANLG2,
2688 RT5640_PWR_MB1 | RT5640_PWR_MB2,
2691 if (SND_SOC_BIAS_OFF == codec->dapm.bias_level) {
2692 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
2693 RT5640_PWR_VREF1 | RT5640_PWR_MB |
2694 RT5640_PWR_BG | RT5640_PWR_VREF2,
2695 RT5640_PWR_VREF1 | RT5640_PWR_MB |
2696 RT5640_PWR_BG | RT5640_PWR_VREF2);
2698 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
2699 RT5640_PWR_FV1 | RT5640_PWR_FV2,
2700 RT5640_PWR_FV1 | RT5640_PWR_FV2);
2701 snd_soc_write(codec, RT5640_GEN_CTRL1, 0x3701);
2702 codec->cache_only = false;
2703 codec->cache_sync = 1;
2704 snd_soc_cache_sync(codec);
2705 rt5640_index_sync(codec);
2709 case SND_SOC_BIAS_OFF:
2711 snd_soc_update_bits(codec, RT5640_SPK_VOL, RT5640_L_MUTE |
2712 RT5640_R_MUTE, RT5640_L_MUTE | RT5640_R_MUTE);
2713 snd_soc_update_bits(codec, RT5640_HP_VOL, RT5640_L_MUTE |
2714 RT5640_R_MUTE, RT5640_L_MUTE | RT5640_R_MUTE);
2715 snd_soc_update_bits(codec, RT5640_OUTPUT, RT5640_L_MUTE |
2716 RT5640_R_MUTE, RT5640_L_MUTE | RT5640_R_MUTE);
2717 snd_soc_update_bits(codec, RT5640_MONO_OUT,
2718 RT5640_L_MUTE, RT5640_L_MUTE);
2720 snd_soc_write(codec, RT5640_DEPOP_M1, 0x0004);
2721 snd_soc_write(codec, RT5640_DEPOP_M2, 0x1100);
2722 snd_soc_write(codec, RT5640_GEN_CTRL1, 0x3700);
2723 snd_soc_write(codec, RT5640_PWR_DIG1, 0x0000);
2724 snd_soc_write(codec, RT5640_PWR_DIG2, 0x0000);
2725 snd_soc_write(codec, RT5640_PWR_VOL, 0x0000);
2726 snd_soc_write(codec, RT5640_PWR_MIXER, 0x0000);
2727 snd_soc_write(codec, RT5640_PWR_ANLG1, 0x0000);
2728 snd_soc_write(codec, RT5640_PWR_ANLG2, 0x0000);
2734 codec->dapm.bias_level = level;
2736 mutex_unlock(&rt5640->lock);
2740 static int rt5640_probe(struct snd_soc_codec *codec)
2742 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2745 mutex_lock(&rt5640->lock);
2746 CHECK_I2C_SHUTDOWN(rt5640, codec)
2748 codec->dapm.idle_bias_off = 1;
2750 ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_I2C);
2752 dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
2753 mutex_unlock(&rt5640->lock);
2757 val = snd_soc_read(codec, RT5640_RESET);
2758 if ((val != rt5640_reg[RT5640_RESET]) && (val != RT5639_RESET_ID)) {
2760 "Device with ID register %x is not rt5640/39\n", val);
2761 mutex_unlock(&rt5640->lock);
2765 rt5640_reset(codec);
2766 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
2767 RT5640_PWR_VREF1 | RT5640_PWR_MB |
2768 RT5640_PWR_BG | RT5640_PWR_VREF2,
2769 RT5640_PWR_VREF1 | RT5640_PWR_MB |
2770 RT5640_PWR_BG | RT5640_PWR_VREF2);
2772 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
2773 RT5640_PWR_FV1 | RT5640_PWR_FV2,
2774 RT5640_PWR_FV1 | RT5640_PWR_FV2);
2776 if (rt5640->dmic_en == RT5640_DMIC1) {
2777 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
2778 RT5640_GP2_PIN_MASK, RT5640_GP2_PIN_DMIC1_SCL);
2779 snd_soc_update_bits(codec, RT5640_DMIC,
2780 RT5640_DMIC_1L_LH_MASK | RT5640_DMIC_1R_LH_MASK,
2781 RT5640_DMIC_1L_LH_FALLING | RT5640_DMIC_1R_LH_RISING);
2782 } else if (rt5640->dmic_en == RT5640_DMIC2) {
2783 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
2784 RT5640_GP2_PIN_MASK, RT5640_GP2_PIN_DMIC1_SCL);
2785 snd_soc_update_bits(codec, RT5640_DMIC,
2786 RT5640_DMIC_2L_LH_MASK | RT5640_DMIC_2R_LH_MASK,
2787 RT5640_DMIC_2L_LH_FALLING | RT5640_DMIC_2R_LH_RISING);
2791 rt5640_reg_init(codec);
2794 #if defined(CONFIG_SND_SOC_RT5642_MODULE) || defined(CONFIG_SND_SOC_RT5642)
2795 rt5640_register_dsp(codec);
2798 DC_Calibrate(codec);
2800 codec->dapm.bias_level = SND_SOC_BIAS_STANDBY;
2802 snd_soc_add_codec_controls(codec, rt5640_snd_controls,
2803 ARRAY_SIZE(rt5640_snd_controls));
2805 rt5640->codec = codec;
2806 ret = device_create_file(codec->dev, &dev_attr_index_reg);
2809 "Failed to create index_reg sysfs files: %d\n", ret);
2810 mutex_unlock(&rt5640->lock);
2814 mutex_unlock(&rt5640->lock);
2818 static int rt5640_remove(struct snd_soc_codec *codec)
2820 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2822 rt5640_set_bias_level(codec, SND_SOC_BIAS_OFF);
2823 mutex_lock(&rt5640->lock);
2824 CHECK_I2C_SHUTDOWN(rt5640, codec)
2825 rt5640_reset(codec);
2826 snd_soc_write(codec, RT5640_PWR_ANLG1, 0);
2828 mutex_unlock(&rt5640->lock);
2832 static int rt5640_suspend(struct snd_soc_codec *codec)
2834 rt5640_reset(codec);
2835 rt5640_set_bias_level(codec, SND_SOC_BIAS_OFF);
2836 snd_soc_write(codec, RT5640_PWR_ANLG1, 0);
2841 static int rt5640_resume(struct snd_soc_codec *codec)
2845 codec->cache_sync = 1;
2846 ret = snd_soc_cache_sync(codec);
2848 dev_err(codec->dev,"Failed to sync cache: %d\n", ret);
2851 rt5640_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
2856 #define rt5640_suspend NULL
2857 #define rt5640_resume NULL
2860 #define RT5640_STEREO_RATES SNDRV_PCM_RATE_8000_96000
2861 #define RT5640_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
2862 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
2864 struct snd_soc_dai_ops rt5640_aif_dai_ops = {
2865 .hw_params = rt5640_hw_params,
2866 .prepare = rt5640_prepare,
2867 .set_fmt = rt5640_set_dai_fmt,
2868 .set_sysclk = rt5640_set_dai_sysclk,
2869 .set_pll = rt5640_set_dai_pll,
2872 struct snd_soc_dai_driver rt5640_dai[] = {
2874 .name = "rt5640-aif1",
2877 .stream_name = "AIF1 Playback",
2880 .rates = RT5640_STEREO_RATES,
2881 .formats = RT5640_FORMATS,
2884 .stream_name = "AIF1 Capture",
2887 .rates = RT5640_STEREO_RATES,
2888 .formats = RT5640_FORMATS,
2890 .ops = &rt5640_aif_dai_ops,
2893 .name = "rt5640-aif2",
2896 .stream_name = "AIF2 Playback",
2899 .rates = RT5640_STEREO_RATES,
2900 .formats = RT5640_FORMATS,
2903 .stream_name = "AIF2 Capture",
2906 .rates = RT5640_STEREO_RATES,
2907 .formats = RT5640_FORMATS,
2909 .ops = &rt5640_aif_dai_ops,
2911 #if defined(CONFIG_SND_SOC_RT5643_MODULE) || defined(CONFIG_SND_SOC_RT5643) || \
2912 defined(CONFIG_SND_SOC_RT5646_MODULE) || defined(CONFIG_SND_SOC_RT5646)
2914 .name = "rt5640-aif3",
2917 .stream_name = "AIF3 Playback",
2920 .rates = RT5640_STEREO_RATES,
2921 .formats = RT5640_FORMATS,
2924 .stream_name = "AIF3 Capture",
2927 .rates = RT5640_STEREO_RATES,
2928 .formats = RT5640_FORMATS,
2930 .ops = &rt5640_aif_dai_ops,
2935 static struct snd_soc_codec_driver soc_codec_dev_rt5640 = {
2936 .probe = rt5640_probe,
2937 .remove = rt5640_remove,
2938 .suspend = rt5640_suspend,
2939 .resume = rt5640_resume,
2940 .set_bias_level = rt5640_set_bias_level,
2941 .reg_cache_size = RT5640_VENDOR_ID2 + 1,
2942 .reg_word_size = sizeof(u16),
2943 .reg_cache_default = rt5640_reg,
2944 .volatile_register = rt5640_volatile_register,
2945 .readable_register = rt5640_readable_register,
2946 .reg_cache_step = 1,
2947 .dapm_widgets = rt5640_dapm_widgets,
2948 .num_dapm_widgets = ARRAY_SIZE(rt5640_dapm_widgets),
2949 .dapm_routes = rt5640_dapm_routes,
2950 .num_dapm_routes = ARRAY_SIZE(rt5640_dapm_routes),
2953 static const struct i2c_device_id rt5640_i2c_id[] = {
2957 MODULE_DEVICE_TABLE(i2c, rt5640_i2c_id);
2959 static int rt5640_i2c_probe(struct i2c_client *i2c,
2960 const struct i2c_device_id *id)
2962 struct rt5640_priv *rt5640;
2965 rt5640 = kzalloc(sizeof(struct rt5640_priv), GFP_KERNEL);
2969 i2c_set_clientdata(i2c, rt5640);
2970 mutex_init(&rt5640->lock);
2972 ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5640,
2973 rt5640_dai, ARRAY_SIZE(rt5640_dai));
2980 static int rt5640_i2c_remove(struct i2c_client *i2c)
2982 snd_soc_unregister_codec(&i2c->dev);
2983 kfree(i2c_get_clientdata(i2c));
2987 static void rt5640_i2c_shutdown(struct i2c_client *i2c)
2989 struct rt5640_priv *rt5640 = i2c_get_clientdata(i2c);
2991 mutex_lock(&rt5640->lock);
2994 disable_irq(i2c->irq);
2995 rt5640->shutdown_complete = 1;
2997 mutex_unlock(&rt5640->lock);
3000 struct i2c_driver rt5640_i2c_driver = {
3003 .owner = THIS_MODULE,
3005 .probe = rt5640_i2c_probe,
3006 .remove = rt5640_i2c_remove,
3007 .id_table = rt5640_i2c_id,
3008 .shutdown = rt5640_i2c_shutdown,
3011 static int __init rt5640_modinit(void)
3013 return i2c_add_driver(&rt5640_i2c_driver);
3015 module_init(rt5640_modinit);
3017 static void __exit rt5640_modexit(void)
3019 i2c_del_driver(&rt5640_i2c_driver);
3021 module_exit(rt5640_modexit);
3023 MODULE_DESCRIPTION("ASoC RT5640 driver");
3024 MODULE_AUTHOR("Johnny Hsu <johnnyhsu@realtek.com>");
3025 MODULE_LICENSE("GPL");