X-Git-Url: https://rtime.felk.cvut.cz/gitweb/mf624-simulink.git/blobdiff_plain/cdfaa5724afbfc3c86913798464c0f637ade164d..aae090ddcb04104f83e9c2a1a6f2bd1e7acdd7ee:/sfReadPWM.c

diff --git a/sfReadPWM.c b/sfReadPWM.c
index 451af83..da79c92 100644
--- a/sfReadPWM.c
+++ b/sfReadPWM.c
@@ -130,29 +130,29 @@ static void mdlInitializeSampleTimes(SimStruct *S)
    */
   static void mdlStart(SimStruct *S)
   {
-    if (mf624_init(S) != 0)
+    if (mf624_init(NULL) != 0)
 	return;
             
     /*Configuration of desired counter modes*/
-    mf624_write32(CTRX_MODE,MFST2REG(mfst,4,CTR0MODE));
-    mf624_write32(CTRX_MODE,MFST2REG(mfst,4,CTR1MODE));
-    mf624_write32(CTRX_MODE,MFST2REG(mfst,4,CTR2MODE));
-    mf624_write32(CTR4_MODE,MFST2REG(mfst,4,CTR4MODE));
+    mf624_write32(CTRX_MODE,MFST2REG(mfst,4,CTR0MODE_reg));
+    mf624_write32(CTRX_MODE,MFST2REG(mfst,4,CTR1MODE_reg));
+    mf624_write32(CTRX_MODE,MFST2REG(mfst,4,CTR2MODE_reg));
+    mf624_write32(CTR4_MODE,MFST2REG(mfst,4,CTR4MODE_reg));
     
     /*Set reload values of ctrs 0,1,2,4 to 0 just to be sure*/
-    mf624_write32(0,MFST2REG(mfst,4,CTR0));
-    mf624_write32(0,MFST2REG(mfst,4,CTR1));
-    mf624_write32(0,MFST2REG(mfst,4,CTR2));
-    mf624_write32(0,MFST2REG(mfst,4,CTR4));
+    mf624_write32(0,MFST2REG(mfst,4,CTR0_reg));
+    mf624_write32(0,MFST2REG(mfst,4,CTR1_reg));
+    mf624_write32(0,MFST2REG(mfst,4,CTR2_reg));
+    mf624_write32(0,MFST2REG(mfst,4,CTR4_reg));
     
     /*Read values from counters and initialize IWork values with them*/
-    ssSetIWorkValue(S,0,(unsigned int)mf624_read32(MFST2REG(mfst,4,CTR0)));
-    ssSetIWorkValue(S,1,(unsigned int)mf624_read32(MFST2REG(mfst,4,CTR1)));
-    ssSetIWorkValue(S,2,(unsigned int)mf624_read32(MFST2REG(mfst,4,CTR2)));
-    ssSetIWorkValue(S,3,(unsigned int)mf624_read32(MFST2REG(mfst,4,CTR4)));
+    ssSetIWorkValue(S,0,(unsigned int)mf624_read32(MFST2REG(mfst,4,CTR0_reg)));
+    ssSetIWorkValue(S,1,(unsigned int)mf624_read32(MFST2REG(mfst,4,CTR1_reg)));
+    ssSetIWorkValue(S,2,(unsigned int)mf624_read32(MFST2REG(mfst,4,CTR2_reg)));
+    ssSetIWorkValue(S,3,(unsigned int)mf624_read32(MFST2REG(mfst,4,CTR4_reg)));
     
     /*Start counters 0,1,2, tehy are gated with their inputs so no worries about premature start*/
-    mf624_write32(CTR_START,MFST2REG(mfst,4,CTRXCTRL));
+    mf624_write32(CTR_START,MFST2REG(mfst,4,CTRXCTRL_reg));
             
     
   }
@@ -173,11 +173,13 @@ static void mdlOutputs(SimStruct *S, int_T tid)
     unsigned int period;
     unsigned int c0,c1,c2,c4;
     
-    
-    c0 = mf624_read32(MFST2REG(mfst,4,CTR0));
-    c1 = mf624_read32(MFST2REG(mfst,4,CTR1));
-    c2 = mf624_read32(MFST2REG(mfst,4,CTR2));
-    c4 = mf624_read32(MFST2REG(mfst,4,CTR4));
+    if (mf624_check(S) != 0)
+	    return;
+	
+    c0 = mf624_read32(MFST2REG(mfst,4,CTR0_reg));
+    c1 = mf624_read32(MFST2REG(mfst,4,CTR1_reg));
+    c2 = mf624_read32(MFST2REG(mfst,4,CTR2_reg));
+    c4 = mf624_read32(MFST2REG(mfst,4,CTR4_reg));
     
     period = (unsigned int)(c4-(unsigned int)ssGetIWorkValue(S,3));
     
@@ -231,19 +233,11 @@ static void mdlOutputs(SimStruct *S, int_T tid)
  */
 static void mdlTerminate(SimStruct *S)
 {
-    /* FIXME: This is ugly! */
-    if(mfst!=NULL){
-        mf624_write32(CTR_STOP,MFST2REG(mfst,4,CTRXCTRL));
-        free(mfst);
-        mfst=NULL;
-    } else {
-        mfst = malloc(sizeof(mf624_state_t));
-	if (mf624_init(S) != 0)
-		return;
-        mf624_write32(CTR_STOP,MFST2REG(mfst,4,CTRXCTRL));
-        free(mfst);
-        mfst=NULL;
-    }
+    if (mf624_check(NULL) != 0)
+	    return;
+
+    mf624_write32(CTR_STOP,MFST2REG(mfst,4,CTRXCTRL_reg));
+    mf624_done();
 }