2 * ALSA SoC TWL4030 codec driver
4 * Author: Steve Sakoman, <steve@sakoman.com>
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
22 #include <linux/module.h>
23 #include <linux/moduleparam.h>
24 #include <linux/init.h>
25 #include <linux/delay.h>
27 #include <linux/i2c.h>
28 #include <linux/platform_device.h>
29 #include <linux/i2c/twl.h>
30 #include <sound/core.h>
31 #include <sound/pcm.h>
32 #include <sound/pcm_params.h>
33 #include <sound/soc.h>
34 #include <sound/soc-dapm.h>
35 #include <sound/initval.h>
36 #include <sound/tlv.h>
41 * twl4030 register cache & default register settings
43 static const u8 twl4030_reg[TWL4030_CACHEREGNUM] = {
44 0x00, /* this register not used */
45 0x91, /* REG_CODEC_MODE (0x1) */
46 0xc3, /* REG_OPTION (0x2) */
47 0x00, /* REG_UNKNOWN (0x3) */
48 0x00, /* REG_MICBIAS_CTL (0x4) */
49 0x20, /* REG_ANAMICL (0x5) */
50 0x00, /* REG_ANAMICR (0x6) */
51 0x00, /* REG_AVADC_CTL (0x7) */
52 0x00, /* REG_ADCMICSEL (0x8) */
53 0x00, /* REG_DIGMIXING (0x9) */
54 0x0c, /* REG_ATXL1PGA (0xA) */
55 0x0c, /* REG_ATXR1PGA (0xB) */
56 0x00, /* REG_AVTXL2PGA (0xC) */
57 0x00, /* REG_AVTXR2PGA (0xD) */
58 0x00, /* REG_AUDIO_IF (0xE) */
59 0x00, /* REG_VOICE_IF (0xF) */
60 0x00, /* REG_ARXR1PGA (0x10) */
61 0x00, /* REG_ARXL1PGA (0x11) */
62 0x6c, /* REG_ARXR2PGA (0x12) */
63 0x6c, /* REG_ARXL2PGA (0x13) */
64 0x00, /* REG_VRXPGA (0x14) */
65 0x00, /* REG_VSTPGA (0x15) */
66 0x00, /* REG_VRX2ARXPGA (0x16) */
67 0x00, /* REG_AVDAC_CTL (0x17) */
68 0x00, /* REG_ARX2VTXPGA (0x18) */
69 0x00, /* REG_ARXL1_APGA_CTL (0x19) */
70 0x00, /* REG_ARXR1_APGA_CTL (0x1A) */
71 0x4a, /* REG_ARXL2_APGA_CTL (0x1B) */
72 0x4a, /* REG_ARXR2_APGA_CTL (0x1C) */
73 0x00, /* REG_ATX2ARXPGA (0x1D) */
74 0x00, /* REG_BT_IF (0x1E) */
75 0x00, /* REG_BTPGA (0x1F) */
76 0x00, /* REG_BTSTPGA (0x20) */
77 0x00, /* REG_EAR_CTL (0x21) */
78 0x00, /* REG_HS_SEL (0x22) */
79 0x00, /* REG_HS_GAIN_SET (0x23) */
80 0x00, /* REG_HS_POPN_SET (0x24) */
81 0x00, /* REG_PREDL_CTL (0x25) */
82 0x00, /* REG_PREDR_CTL (0x26) */
83 0x00, /* REG_PRECKL_CTL (0x27) */
84 0x00, /* REG_PRECKR_CTL (0x28) */
85 0x00, /* REG_HFL_CTL (0x29) */
86 0x00, /* REG_HFR_CTL (0x2A) */
87 0x00, /* REG_ALC_CTL (0x2B) */
88 0x00, /* REG_ALC_SET1 (0x2C) */
89 0x00, /* REG_ALC_SET2 (0x2D) */
90 0x00, /* REG_BOOST_CTL (0x2E) */
91 0x00, /* REG_SOFTVOL_CTL (0x2F) */
92 0x00, /* REG_DTMF_FREQSEL (0x30) */
93 0x00, /* REG_DTMF_TONEXT1H (0x31) */
94 0x00, /* REG_DTMF_TONEXT1L (0x32) */
95 0x00, /* REG_DTMF_TONEXT2H (0x33) */
96 0x00, /* REG_DTMF_TONEXT2L (0x34) */
97 0x00, /* REG_DTMF_TONOFF (0x35) */
98 0x00, /* REG_DTMF_WANONOFF (0x36) */
99 0x00, /* REG_I2S_RX_SCRAMBLE_H (0x37) */
100 0x00, /* REG_I2S_RX_SCRAMBLE_M (0x38) */
101 0x00, /* REG_I2S_RX_SCRAMBLE_L (0x39) */
102 0x06, /* REG_APLL_CTL (0x3A) */
103 0x00, /* REG_DTMF_CTL (0x3B) */
104 0x00, /* REG_DTMF_PGA_CTL2 (0x3C) */
105 0x00, /* REG_DTMF_PGA_CTL1 (0x3D) */
106 0x00, /* REG_MISC_SET_1 (0x3E) */
107 0x00, /* REG_PCMBTMUX (0x3F) */
108 0x00, /* not used (0x40) */
109 0x00, /* not used (0x41) */
110 0x00, /* not used (0x42) */
111 0x00, /* REG_RX_PATH_SEL (0x43) */
112 0x00, /* REG_VDL_APGA_CTL (0x44) */
113 0x00, /* REG_VIBRA_CTL (0x45) */
114 0x00, /* REG_VIBRA_SET (0x46) */
115 0x00, /* REG_VIBRA_PWM_SET (0x47) */
116 0x00, /* REG_ANAMIC_GAIN (0x48) */
117 0x00, /* REG_MISC_SET_2 (0x49) */
118 0x00, /* REG_SW_SHADOW (0x4A) - Shadow, non HW register */
121 /* codec private data */
122 struct twl4030_priv {
123 struct snd_soc_codec codec;
125 unsigned int codec_powered;
127 /* reference counts of AIF/APLL users */
128 unsigned int apll_enabled;
130 struct snd_pcm_substream *master_substream;
131 struct snd_pcm_substream *slave_substream;
133 unsigned int configured;
135 unsigned int sample_bits;
136 unsigned int channels;
140 /* Output (with associated amp) states */
141 u8 hsl_enabled, hsr_enabled;
143 u8 predrivel_enabled, predriver_enabled;
144 u8 carkitl_enabled, carkitr_enabled;
148 * read twl4030 register cache
150 static inline unsigned int twl4030_read_reg_cache(struct snd_soc_codec *codec,
153 u8 *cache = codec->reg_cache;
155 if (reg >= TWL4030_CACHEREGNUM)
162 * write twl4030 register cache
164 static inline void twl4030_write_reg_cache(struct snd_soc_codec *codec,
167 u8 *cache = codec->reg_cache;
169 if (reg >= TWL4030_CACHEREGNUM)
175 * write to the twl4030 register space
177 static int twl4030_write(struct snd_soc_codec *codec,
178 unsigned int reg, unsigned int value)
180 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
181 int write_to_reg = 0;
183 twl4030_write_reg_cache(codec, reg, value);
184 if (likely(reg < TWL4030_REG_SW_SHADOW)) {
185 /* Decide if the given register can be written */
187 case TWL4030_REG_EAR_CTL:
188 if (twl4030->earpiece_enabled)
191 case TWL4030_REG_PREDL_CTL:
192 if (twl4030->predrivel_enabled)
195 case TWL4030_REG_PREDR_CTL:
196 if (twl4030->predriver_enabled)
199 case TWL4030_REG_PRECKL_CTL:
200 if (twl4030->carkitl_enabled)
203 case TWL4030_REG_PRECKR_CTL:
204 if (twl4030->carkitr_enabled)
207 case TWL4030_REG_HS_GAIN_SET:
208 if (twl4030->hsl_enabled || twl4030->hsr_enabled)
212 /* All other register can be written */
217 return twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
223 static void twl4030_codec_enable(struct snd_soc_codec *codec, int enable)
225 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
228 if (enable == twl4030->codec_powered)
232 mode = twl4030_codec_enable_resource(TWL4030_CODEC_RES_POWER);
234 mode = twl4030_codec_disable_resource(TWL4030_CODEC_RES_POWER);
237 twl4030_write_reg_cache(codec, TWL4030_REG_CODEC_MODE, mode);
238 twl4030->codec_powered = enable;
241 /* REVISIT: this delay is present in TI sample drivers */
242 /* but there seems to be no TRM requirement for it */
246 static void twl4030_init_chip(struct snd_soc_codec *codec)
248 u8 *cache = codec->reg_cache;
251 /* clear CODECPDZ prior to setting register defaults */
252 twl4030_codec_enable(codec, 0);
254 /* set all audio section registers to reasonable defaults */
255 for (i = TWL4030_REG_OPTION; i <= TWL4030_REG_MISC_SET_2; i++)
256 if (i != TWL4030_REG_APLL_CTL)
257 twl4030_write(codec, i, cache[i]);
261 static void twl4030_apll_enable(struct snd_soc_codec *codec, int enable)
263 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
267 twl4030->apll_enabled++;
268 if (twl4030->apll_enabled == 1)
269 status = twl4030_codec_enable_resource(
270 TWL4030_CODEC_RES_APLL);
272 twl4030->apll_enabled--;
273 if (!twl4030->apll_enabled)
274 status = twl4030_codec_disable_resource(
275 TWL4030_CODEC_RES_APLL);
279 twl4030_write_reg_cache(codec, TWL4030_REG_APLL_CTL, status);
282 static void twl4030_power_up(struct snd_soc_codec *codec)
284 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
285 u8 anamicl, regmisc1, byte;
288 if (twl4030->codec_powered)
291 /* set CODECPDZ to turn on codec */
292 twl4030_codec_enable(codec, 1);
294 /* initiate offset cancellation */
295 anamicl = twl4030_read_reg_cache(codec, TWL4030_REG_ANAMICL);
296 twl4030_write(codec, TWL4030_REG_ANAMICL,
297 anamicl | TWL4030_CNCL_OFFSET_START);
299 /* wait for offset cancellation to complete */
301 /* this takes a little while, so don't slam i2c */
303 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte,
304 TWL4030_REG_ANAMICL);
305 } while ((i++ < 100) &&
306 ((byte & TWL4030_CNCL_OFFSET_START) ==
307 TWL4030_CNCL_OFFSET_START));
309 /* Make sure that the reg_cache has the same value as the HW */
310 twl4030_write_reg_cache(codec, TWL4030_REG_ANAMICL, byte);
312 /* anti-pop when changing analog gain */
313 regmisc1 = twl4030_read_reg_cache(codec, TWL4030_REG_MISC_SET_1);
314 twl4030_write(codec, TWL4030_REG_MISC_SET_1,
315 regmisc1 | TWL4030_SMOOTH_ANAVOL_EN);
317 /* toggle CODECPDZ as per TRM */
318 twl4030_codec_enable(codec, 0);
319 twl4030_codec_enable(codec, 1);
323 * Unconditional power down
325 static void twl4030_power_down(struct snd_soc_codec *codec)
328 twl4030_codec_enable(codec, 0);
332 static const struct snd_kcontrol_new twl4030_dapm_earpiece_controls[] = {
333 SOC_DAPM_SINGLE("Voice", TWL4030_REG_EAR_CTL, 0, 1, 0),
334 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_EAR_CTL, 1, 1, 0),
335 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_EAR_CTL, 2, 1, 0),
336 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_EAR_CTL, 3, 1, 0),
340 static const struct snd_kcontrol_new twl4030_dapm_predrivel_controls[] = {
341 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDL_CTL, 0, 1, 0),
342 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PREDL_CTL, 1, 1, 0),
343 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDL_CTL, 2, 1, 0),
344 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDL_CTL, 3, 1, 0),
348 static const struct snd_kcontrol_new twl4030_dapm_predriver_controls[] = {
349 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDR_CTL, 0, 1, 0),
350 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PREDR_CTL, 1, 1, 0),
351 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDR_CTL, 2, 1, 0),
352 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDR_CTL, 3, 1, 0),
356 static const struct snd_kcontrol_new twl4030_dapm_hsol_controls[] = {
357 SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 0, 1, 0),
358 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_HS_SEL, 1, 1, 0),
359 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_HS_SEL, 2, 1, 0),
363 static const struct snd_kcontrol_new twl4030_dapm_hsor_controls[] = {
364 SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 3, 1, 0),
365 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_HS_SEL, 4, 1, 0),
366 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_HS_SEL, 5, 1, 0),
370 static const struct snd_kcontrol_new twl4030_dapm_carkitl_controls[] = {
371 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKL_CTL, 0, 1, 0),
372 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PRECKL_CTL, 1, 1, 0),
373 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PRECKL_CTL, 2, 1, 0),
377 static const struct snd_kcontrol_new twl4030_dapm_carkitr_controls[] = {
378 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKR_CTL, 0, 1, 0),
379 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PRECKR_CTL, 1, 1, 0),
380 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PRECKR_CTL, 2, 1, 0),
384 static const char *twl4030_handsfreel_texts[] =
385 {"Voice", "AudioL1", "AudioL2", "AudioR2"};
387 static const struct soc_enum twl4030_handsfreel_enum =
388 SOC_ENUM_SINGLE(TWL4030_REG_HFL_CTL, 0,
389 ARRAY_SIZE(twl4030_handsfreel_texts),
390 twl4030_handsfreel_texts);
392 static const struct snd_kcontrol_new twl4030_dapm_handsfreel_control =
393 SOC_DAPM_ENUM("Route", twl4030_handsfreel_enum);
395 /* Handsfree Left virtual mute */
396 static const struct snd_kcontrol_new twl4030_dapm_handsfreelmute_control =
397 SOC_DAPM_SINGLE("Switch", TWL4030_REG_SW_SHADOW, 0, 1, 0);
399 /* Handsfree Right */
400 static const char *twl4030_handsfreer_texts[] =
401 {"Voice", "AudioR1", "AudioR2", "AudioL2"};
403 static const struct soc_enum twl4030_handsfreer_enum =
404 SOC_ENUM_SINGLE(TWL4030_REG_HFR_CTL, 0,
405 ARRAY_SIZE(twl4030_handsfreer_texts),
406 twl4030_handsfreer_texts);
408 static const struct snd_kcontrol_new twl4030_dapm_handsfreer_control =
409 SOC_DAPM_ENUM("Route", twl4030_handsfreer_enum);
411 /* Handsfree Right virtual mute */
412 static const struct snd_kcontrol_new twl4030_dapm_handsfreermute_control =
413 SOC_DAPM_SINGLE("Switch", TWL4030_REG_SW_SHADOW, 1, 1, 0);
416 /* Vibra audio path selection */
417 static const char *twl4030_vibra_texts[] =
418 {"AudioL1", "AudioR1", "AudioL2", "AudioR2"};
420 static const struct soc_enum twl4030_vibra_enum =
421 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 2,
422 ARRAY_SIZE(twl4030_vibra_texts),
423 twl4030_vibra_texts);
425 static const struct snd_kcontrol_new twl4030_dapm_vibra_control =
426 SOC_DAPM_ENUM("Route", twl4030_vibra_enum);
428 /* Vibra path selection: local vibrator (PWM) or audio driven */
429 static const char *twl4030_vibrapath_texts[] =
430 {"Local vibrator", "Audio"};
432 static const struct soc_enum twl4030_vibrapath_enum =
433 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 4,
434 ARRAY_SIZE(twl4030_vibrapath_texts),
435 twl4030_vibrapath_texts);
437 static const struct snd_kcontrol_new twl4030_dapm_vibrapath_control =
438 SOC_DAPM_ENUM("Route", twl4030_vibrapath_enum);
440 /* Left analog microphone selection */
441 static const struct snd_kcontrol_new twl4030_dapm_analoglmic_controls[] = {
442 SOC_DAPM_SINGLE("Main Mic Capture Switch",
443 TWL4030_REG_ANAMICL, 0, 1, 0),
444 SOC_DAPM_SINGLE("Headset Mic Capture Switch",
445 TWL4030_REG_ANAMICL, 1, 1, 0),
446 SOC_DAPM_SINGLE("AUXL Capture Switch",
447 TWL4030_REG_ANAMICL, 2, 1, 0),
448 SOC_DAPM_SINGLE("Carkit Mic Capture Switch",
449 TWL4030_REG_ANAMICL, 3, 1, 0),
452 /* Right analog microphone selection */
453 static const struct snd_kcontrol_new twl4030_dapm_analogrmic_controls[] = {
454 SOC_DAPM_SINGLE("Sub Mic Capture Switch", TWL4030_REG_ANAMICR, 0, 1, 0),
455 SOC_DAPM_SINGLE("AUXR Capture Switch", TWL4030_REG_ANAMICR, 2, 1, 0),
458 /* TX1 L/R Analog/Digital microphone selection */
459 static const char *twl4030_micpathtx1_texts[] =
460 {"Analog", "Digimic0"};
462 static const struct soc_enum twl4030_micpathtx1_enum =
463 SOC_ENUM_SINGLE(TWL4030_REG_ADCMICSEL, 0,
464 ARRAY_SIZE(twl4030_micpathtx1_texts),
465 twl4030_micpathtx1_texts);
467 static const struct snd_kcontrol_new twl4030_dapm_micpathtx1_control =
468 SOC_DAPM_ENUM("Route", twl4030_micpathtx1_enum);
470 /* TX2 L/R Analog/Digital microphone selection */
471 static const char *twl4030_micpathtx2_texts[] =
472 {"Analog", "Digimic1"};
474 static const struct soc_enum twl4030_micpathtx2_enum =
475 SOC_ENUM_SINGLE(TWL4030_REG_ADCMICSEL, 2,
476 ARRAY_SIZE(twl4030_micpathtx2_texts),
477 twl4030_micpathtx2_texts);
479 static const struct snd_kcontrol_new twl4030_dapm_micpathtx2_control =
480 SOC_DAPM_ENUM("Route", twl4030_micpathtx2_enum);
482 /* Analog bypass for AudioR1 */
483 static const struct snd_kcontrol_new twl4030_dapm_abypassr1_control =
484 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR1_APGA_CTL, 2, 1, 0);
486 /* Analog bypass for AudioL1 */
487 static const struct snd_kcontrol_new twl4030_dapm_abypassl1_control =
488 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL1_APGA_CTL, 2, 1, 0);
490 /* Analog bypass for AudioR2 */
491 static const struct snd_kcontrol_new twl4030_dapm_abypassr2_control =
492 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR2_APGA_CTL, 2, 1, 0);
494 /* Analog bypass for AudioL2 */
495 static const struct snd_kcontrol_new twl4030_dapm_abypassl2_control =
496 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL2_APGA_CTL, 2, 1, 0);
498 /* Analog bypass for Voice */
499 static const struct snd_kcontrol_new twl4030_dapm_abypassv_control =
500 SOC_DAPM_SINGLE("Switch", TWL4030_REG_VDL_APGA_CTL, 2, 1, 0);
502 /* Digital bypass gain, 0 mutes the bypass */
503 static const unsigned int twl4030_dapm_dbypass_tlv[] = {
504 TLV_DB_RANGE_HEAD(2),
505 0, 3, TLV_DB_SCALE_ITEM(-2400, 0, 1),
506 4, 7, TLV_DB_SCALE_ITEM(-1800, 600, 0),
509 /* Digital bypass left (TX1L -> RX2L) */
510 static const struct snd_kcontrol_new twl4030_dapm_dbypassl_control =
511 SOC_DAPM_SINGLE_TLV("Volume",
512 TWL4030_REG_ATX2ARXPGA, 3, 7, 0,
513 twl4030_dapm_dbypass_tlv);
515 /* Digital bypass right (TX1R -> RX2R) */
516 static const struct snd_kcontrol_new twl4030_dapm_dbypassr_control =
517 SOC_DAPM_SINGLE_TLV("Volume",
518 TWL4030_REG_ATX2ARXPGA, 0, 7, 0,
519 twl4030_dapm_dbypass_tlv);
522 * Voice Sidetone GAIN volume control:
523 * from -51 to -10 dB in 1 dB steps (mute instead of -51 dB)
525 static DECLARE_TLV_DB_SCALE(twl4030_dapm_dbypassv_tlv, -5100, 100, 1);
527 /* Digital bypass voice: sidetone (VUL -> VDL)*/
528 static const struct snd_kcontrol_new twl4030_dapm_dbypassv_control =
529 SOC_DAPM_SINGLE_TLV("Volume",
530 TWL4030_REG_VSTPGA, 0, 0x29, 0,
531 twl4030_dapm_dbypassv_tlv);
533 static int micpath_event(struct snd_soc_dapm_widget *w,
534 struct snd_kcontrol *kcontrol, int event)
536 struct soc_enum *e = (struct soc_enum *)w->kcontrols->private_value;
537 unsigned char adcmicsel, micbias_ctl;
539 adcmicsel = twl4030_read_reg_cache(w->codec, TWL4030_REG_ADCMICSEL);
540 micbias_ctl = twl4030_read_reg_cache(w->codec, TWL4030_REG_MICBIAS_CTL);
541 /* Prepare the bits for the given TX path:
542 * shift_l == 0: TX1 microphone path
543 * shift_l == 2: TX2 microphone path */
545 /* TX2 microphone path */
546 if (adcmicsel & TWL4030_TX2IN_SEL)
547 micbias_ctl |= TWL4030_MICBIAS2_CTL; /* digimic */
549 micbias_ctl &= ~TWL4030_MICBIAS2_CTL;
551 /* TX1 microphone path */
552 if (adcmicsel & TWL4030_TX1IN_SEL)
553 micbias_ctl |= TWL4030_MICBIAS1_CTL; /* digimic */
555 micbias_ctl &= ~TWL4030_MICBIAS1_CTL;
558 twl4030_write(w->codec, TWL4030_REG_MICBIAS_CTL, micbias_ctl);
564 * Output PGA builder:
565 * Handle the muting and unmuting of the given output (turning off the
566 * amplifier associated with the output pin)
567 * On mute bypass the reg_cache and write 0 to the register
568 * On unmute: restore the register content from the reg_cache
569 * Outputs handled in this way: Earpiece, PreDrivL/R, CarkitL/R
571 #define TWL4030_OUTPUT_PGA(pin_name, reg, mask) \
572 static int pin_name##pga_event(struct snd_soc_dapm_widget *w, \
573 struct snd_kcontrol *kcontrol, int event) \
575 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec); \
578 case SND_SOC_DAPM_POST_PMU: \
579 twl4030->pin_name##_enabled = 1; \
580 twl4030_write(w->codec, reg, \
581 twl4030_read_reg_cache(w->codec, reg)); \
583 case SND_SOC_DAPM_POST_PMD: \
584 twl4030->pin_name##_enabled = 0; \
585 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, \
592 TWL4030_OUTPUT_PGA(earpiece, TWL4030_REG_EAR_CTL, TWL4030_EAR_GAIN);
593 TWL4030_OUTPUT_PGA(predrivel, TWL4030_REG_PREDL_CTL, TWL4030_PREDL_GAIN);
594 TWL4030_OUTPUT_PGA(predriver, TWL4030_REG_PREDR_CTL, TWL4030_PREDR_GAIN);
595 TWL4030_OUTPUT_PGA(carkitl, TWL4030_REG_PRECKL_CTL, TWL4030_PRECKL_GAIN);
596 TWL4030_OUTPUT_PGA(carkitr, TWL4030_REG_PRECKR_CTL, TWL4030_PRECKR_GAIN);
598 static void handsfree_ramp(struct snd_soc_codec *codec, int reg, int ramp)
600 unsigned char hs_ctl;
602 hs_ctl = twl4030_read_reg_cache(codec, reg);
606 hs_ctl |= TWL4030_HF_CTL_REF_EN;
607 twl4030_write(codec, reg, hs_ctl);
609 hs_ctl |= TWL4030_HF_CTL_RAMP_EN;
610 twl4030_write(codec, reg, hs_ctl);
612 hs_ctl |= TWL4030_HF_CTL_LOOP_EN;
613 hs_ctl |= TWL4030_HF_CTL_HB_EN;
614 twl4030_write(codec, reg, hs_ctl);
617 hs_ctl &= ~TWL4030_HF_CTL_LOOP_EN;
618 hs_ctl &= ~TWL4030_HF_CTL_HB_EN;
619 twl4030_write(codec, reg, hs_ctl);
620 hs_ctl &= ~TWL4030_HF_CTL_RAMP_EN;
621 twl4030_write(codec, reg, hs_ctl);
623 hs_ctl &= ~TWL4030_HF_CTL_REF_EN;
624 twl4030_write(codec, reg, hs_ctl);
628 static int handsfreelpga_event(struct snd_soc_dapm_widget *w,
629 struct snd_kcontrol *kcontrol, int event)
632 case SND_SOC_DAPM_POST_PMU:
633 handsfree_ramp(w->codec, TWL4030_REG_HFL_CTL, 1);
635 case SND_SOC_DAPM_POST_PMD:
636 handsfree_ramp(w->codec, TWL4030_REG_HFL_CTL, 0);
642 static int handsfreerpga_event(struct snd_soc_dapm_widget *w,
643 struct snd_kcontrol *kcontrol, int event)
646 case SND_SOC_DAPM_POST_PMU:
647 handsfree_ramp(w->codec, TWL4030_REG_HFR_CTL, 1);
649 case SND_SOC_DAPM_POST_PMD:
650 handsfree_ramp(w->codec, TWL4030_REG_HFR_CTL, 0);
656 static int vibramux_event(struct snd_soc_dapm_widget *w,
657 struct snd_kcontrol *kcontrol, int event)
659 twl4030_write(w->codec, TWL4030_REG_VIBRA_SET, 0xff);
663 static int apll_event(struct snd_soc_dapm_widget *w,
664 struct snd_kcontrol *kcontrol, int event)
667 case SND_SOC_DAPM_PRE_PMU:
668 twl4030_apll_enable(w->codec, 1);
670 case SND_SOC_DAPM_POST_PMD:
671 twl4030_apll_enable(w->codec, 0);
677 static int aif_event(struct snd_soc_dapm_widget *w,
678 struct snd_kcontrol *kcontrol, int event)
682 audio_if = twl4030_read_reg_cache(w->codec, TWL4030_REG_AUDIO_IF);
684 case SND_SOC_DAPM_PRE_PMU:
686 /* enable the PLL before we use it to clock the DAI */
687 twl4030_apll_enable(w->codec, 1);
689 twl4030_write(w->codec, TWL4030_REG_AUDIO_IF,
690 audio_if | TWL4030_AIF_EN);
692 case SND_SOC_DAPM_POST_PMD:
693 /* disable the DAI before we stop it's source PLL */
694 twl4030_write(w->codec, TWL4030_REG_AUDIO_IF,
695 audio_if & ~TWL4030_AIF_EN);
696 twl4030_apll_enable(w->codec, 0);
702 static void headset_ramp(struct snd_soc_codec *codec, int ramp)
704 struct snd_soc_device *socdev = codec->socdev;
705 struct twl4030_setup_data *setup = socdev->codec_data;
707 unsigned char hs_gain, hs_pop;
708 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
709 /* Base values for ramp delay calculation: 2^19 - 2^26 */
710 unsigned int ramp_base[] = {524288, 1048576, 2097152, 4194304,
711 8388608, 16777216, 33554432, 67108864};
713 hs_gain = twl4030_read_reg_cache(codec, TWL4030_REG_HS_GAIN_SET);
714 hs_pop = twl4030_read_reg_cache(codec, TWL4030_REG_HS_POPN_SET);
716 /* Enable external mute control, this dramatically reduces
718 if (setup && setup->hs_extmute) {
719 if (setup->set_hs_extmute) {
720 setup->set_hs_extmute(1);
722 hs_pop |= TWL4030_EXTMUTE;
723 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
728 /* Headset ramp-up according to the TRM */
729 hs_pop |= TWL4030_VMID_EN;
730 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
731 /* Actually write to the register */
732 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
734 TWL4030_REG_HS_GAIN_SET);
735 hs_pop |= TWL4030_RAMP_EN;
736 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
737 /* Wait ramp delay time + 1, so the VMID can settle */
738 mdelay((ramp_base[(hs_pop & TWL4030_RAMP_DELAY) >> 2] /
739 twl4030->sysclk) + 1);
741 /* Headset ramp-down _not_ according to
742 * the TRM, but in a way that it is working */
743 hs_pop &= ~TWL4030_RAMP_EN;
744 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
745 /* Wait ramp delay time + 1, so the VMID can settle */
746 mdelay((ramp_base[(hs_pop & TWL4030_RAMP_DELAY) >> 2] /
747 twl4030->sysclk) + 1);
748 /* Bypass the reg_cache to mute the headset */
749 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
751 TWL4030_REG_HS_GAIN_SET);
753 hs_pop &= ~TWL4030_VMID_EN;
754 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
757 /* Disable external mute */
758 if (setup && setup->hs_extmute) {
759 if (setup->set_hs_extmute) {
760 setup->set_hs_extmute(0);
762 hs_pop &= ~TWL4030_EXTMUTE;
763 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
768 static int headsetlpga_event(struct snd_soc_dapm_widget *w,
769 struct snd_kcontrol *kcontrol, int event)
771 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec);
774 case SND_SOC_DAPM_POST_PMU:
775 /* Do the ramp-up only once */
776 if (!twl4030->hsr_enabled)
777 headset_ramp(w->codec, 1);
779 twl4030->hsl_enabled = 1;
781 case SND_SOC_DAPM_POST_PMD:
782 /* Do the ramp-down only if both headsetL/R is disabled */
783 if (!twl4030->hsr_enabled)
784 headset_ramp(w->codec, 0);
786 twl4030->hsl_enabled = 0;
792 static int headsetrpga_event(struct snd_soc_dapm_widget *w,
793 struct snd_kcontrol *kcontrol, int event)
795 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec);
798 case SND_SOC_DAPM_POST_PMU:
799 /* Do the ramp-up only once */
800 if (!twl4030->hsl_enabled)
801 headset_ramp(w->codec, 1);
803 twl4030->hsr_enabled = 1;
805 case SND_SOC_DAPM_POST_PMD:
806 /* Do the ramp-down only if both headsetL/R is disabled */
807 if (!twl4030->hsl_enabled)
808 headset_ramp(w->codec, 0);
810 twl4030->hsr_enabled = 0;
817 * Some of the gain controls in TWL (mostly those which are associated with
818 * the outputs) are implemented in an interesting way:
819 * 0x0 : Power down (mute)
823 * Inverting not going to help with these.
824 * Custom volsw and volsw_2r get/put functions to handle these gain bits.
826 #define SOC_DOUBLE_TLV_TWL4030(xname, xreg, shift_left, shift_right, xmax,\
827 xinvert, tlv_array) \
828 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
829 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
830 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
831 .tlv.p = (tlv_array), \
832 .info = snd_soc_info_volsw, \
833 .get = snd_soc_get_volsw_twl4030, \
834 .put = snd_soc_put_volsw_twl4030, \
835 .private_value = (unsigned long)&(struct soc_mixer_control) \
836 {.reg = xreg, .shift = shift_left, .rshift = shift_right,\
837 .max = xmax, .invert = xinvert} }
838 #define SOC_DOUBLE_R_TLV_TWL4030(xname, reg_left, reg_right, xshift, xmax,\
839 xinvert, tlv_array) \
840 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
841 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
842 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
843 .tlv.p = (tlv_array), \
844 .info = snd_soc_info_volsw_2r, \
845 .get = snd_soc_get_volsw_r2_twl4030,\
846 .put = snd_soc_put_volsw_r2_twl4030, \
847 .private_value = (unsigned long)&(struct soc_mixer_control) \
848 {.reg = reg_left, .rreg = reg_right, .shift = xshift, \
849 .rshift = xshift, .max = xmax, .invert = xinvert} }
850 #define SOC_SINGLE_TLV_TWL4030(xname, xreg, xshift, xmax, xinvert, tlv_array) \
851 SOC_DOUBLE_TLV_TWL4030(xname, xreg, xshift, xshift, xmax, \
854 static int snd_soc_get_volsw_twl4030(struct snd_kcontrol *kcontrol,
855 struct snd_ctl_elem_value *ucontrol)
857 struct soc_mixer_control *mc =
858 (struct soc_mixer_control *)kcontrol->private_value;
859 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
860 unsigned int reg = mc->reg;
861 unsigned int shift = mc->shift;
862 unsigned int rshift = mc->rshift;
864 int mask = (1 << fls(max)) - 1;
866 ucontrol->value.integer.value[0] =
867 (snd_soc_read(codec, reg) >> shift) & mask;
868 if (ucontrol->value.integer.value[0])
869 ucontrol->value.integer.value[0] =
870 max + 1 - ucontrol->value.integer.value[0];
872 if (shift != rshift) {
873 ucontrol->value.integer.value[1] =
874 (snd_soc_read(codec, reg) >> rshift) & mask;
875 if (ucontrol->value.integer.value[1])
876 ucontrol->value.integer.value[1] =
877 max + 1 - ucontrol->value.integer.value[1];
883 static int snd_soc_put_volsw_twl4030(struct snd_kcontrol *kcontrol,
884 struct snd_ctl_elem_value *ucontrol)
886 struct soc_mixer_control *mc =
887 (struct soc_mixer_control *)kcontrol->private_value;
888 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
889 unsigned int reg = mc->reg;
890 unsigned int shift = mc->shift;
891 unsigned int rshift = mc->rshift;
893 int mask = (1 << fls(max)) - 1;
894 unsigned short val, val2, val_mask;
896 val = (ucontrol->value.integer.value[0] & mask);
898 val_mask = mask << shift;
902 if (shift != rshift) {
903 val2 = (ucontrol->value.integer.value[1] & mask);
904 val_mask |= mask << rshift;
906 val2 = max + 1 - val2;
907 val |= val2 << rshift;
909 return snd_soc_update_bits(codec, reg, val_mask, val);
912 static int snd_soc_get_volsw_r2_twl4030(struct snd_kcontrol *kcontrol,
913 struct snd_ctl_elem_value *ucontrol)
915 struct soc_mixer_control *mc =
916 (struct soc_mixer_control *)kcontrol->private_value;
917 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
918 unsigned int reg = mc->reg;
919 unsigned int reg2 = mc->rreg;
920 unsigned int shift = mc->shift;
922 int mask = (1<<fls(max))-1;
924 ucontrol->value.integer.value[0] =
925 (snd_soc_read(codec, reg) >> shift) & mask;
926 ucontrol->value.integer.value[1] =
927 (snd_soc_read(codec, reg2) >> shift) & mask;
929 if (ucontrol->value.integer.value[0])
930 ucontrol->value.integer.value[0] =
931 max + 1 - ucontrol->value.integer.value[0];
932 if (ucontrol->value.integer.value[1])
933 ucontrol->value.integer.value[1] =
934 max + 1 - ucontrol->value.integer.value[1];
939 static int snd_soc_put_volsw_r2_twl4030(struct snd_kcontrol *kcontrol,
940 struct snd_ctl_elem_value *ucontrol)
942 struct soc_mixer_control *mc =
943 (struct soc_mixer_control *)kcontrol->private_value;
944 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
945 unsigned int reg = mc->reg;
946 unsigned int reg2 = mc->rreg;
947 unsigned int shift = mc->shift;
949 int mask = (1 << fls(max)) - 1;
951 unsigned short val, val2, val_mask;
953 val_mask = mask << shift;
954 val = (ucontrol->value.integer.value[0] & mask);
955 val2 = (ucontrol->value.integer.value[1] & mask);
960 val2 = max + 1 - val2;
963 val2 = val2 << shift;
965 err = snd_soc_update_bits(codec, reg, val_mask, val);
969 err = snd_soc_update_bits(codec, reg2, val_mask, val2);
973 /* Codec operation modes */
974 static const char *twl4030_op_modes_texts[] = {
975 "Option 2 (voice/audio)", "Option 1 (audio)"
978 static const struct soc_enum twl4030_op_modes_enum =
979 SOC_ENUM_SINGLE(TWL4030_REG_CODEC_MODE, 0,
980 ARRAY_SIZE(twl4030_op_modes_texts),
981 twl4030_op_modes_texts);
983 static int snd_soc_put_twl4030_opmode_enum_double(struct snd_kcontrol *kcontrol,
984 struct snd_ctl_elem_value *ucontrol)
986 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
987 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
988 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
990 unsigned short mask, bitmask;
992 if (twl4030->configured) {
993 printk(KERN_ERR "twl4030 operation mode cannot be "
994 "changed on-the-fly\n");
998 for (bitmask = 1; bitmask < e->max; bitmask <<= 1)
1000 if (ucontrol->value.enumerated.item[0] > e->max - 1)
1003 val = ucontrol->value.enumerated.item[0] << e->shift_l;
1004 mask = (bitmask - 1) << e->shift_l;
1005 if (e->shift_l != e->shift_r) {
1006 if (ucontrol->value.enumerated.item[1] > e->max - 1)
1008 val |= ucontrol->value.enumerated.item[1] << e->shift_r;
1009 mask |= (bitmask - 1) << e->shift_r;
1012 return snd_soc_update_bits(codec, e->reg, mask, val);
1016 * FGAIN volume control:
1017 * from -62 to 0 dB in 1 dB steps (mute instead of -63 dB)
1019 static DECLARE_TLV_DB_SCALE(digital_fine_tlv, -6300, 100, 1);
1022 * CGAIN volume control:
1023 * 0 dB to 12 dB in 6 dB steps
1024 * value 2 and 3 means 12 dB
1026 static DECLARE_TLV_DB_SCALE(digital_coarse_tlv, 0, 600, 0);
1029 * Voice Downlink GAIN volume control:
1030 * from -37 to 12 dB in 1 dB steps (mute instead of -37 dB)
1032 static DECLARE_TLV_DB_SCALE(digital_voice_downlink_tlv, -3700, 100, 1);
1035 * Analog playback gain
1036 * -24 dB to 12 dB in 2 dB steps
1038 static DECLARE_TLV_DB_SCALE(analog_tlv, -2400, 200, 0);
1041 * Gain controls tied to outputs
1042 * -6 dB to 6 dB in 6 dB steps (mute instead of -12)
1044 static DECLARE_TLV_DB_SCALE(output_tvl, -1200, 600, 1);
1047 * Gain control for earpiece amplifier
1048 * 0 dB to 12 dB in 6 dB steps (mute instead of -6)
1050 static DECLARE_TLV_DB_SCALE(output_ear_tvl, -600, 600, 1);
1053 * Capture gain after the ADCs
1054 * from 0 dB to 31 dB in 1 dB steps
1056 static DECLARE_TLV_DB_SCALE(digital_capture_tlv, 0, 100, 0);
1059 * Gain control for input amplifiers
1060 * 0 dB to 30 dB in 6 dB steps
1062 static DECLARE_TLV_DB_SCALE(input_gain_tlv, 0, 600, 0);
1064 /* AVADC clock priority */
1065 static const char *twl4030_avadc_clk_priority_texts[] = {
1066 "Voice high priority", "HiFi high priority"
1069 static const struct soc_enum twl4030_avadc_clk_priority_enum =
1070 SOC_ENUM_SINGLE(TWL4030_REG_AVADC_CTL, 2,
1071 ARRAY_SIZE(twl4030_avadc_clk_priority_texts),
1072 twl4030_avadc_clk_priority_texts);
1074 static const char *twl4030_rampdelay_texts[] = {
1075 "27/20/14 ms", "55/40/27 ms", "109/81/55 ms", "218/161/109 ms",
1076 "437/323/218 ms", "874/645/437 ms", "1748/1291/874 ms",
1080 static const struct soc_enum twl4030_rampdelay_enum =
1081 SOC_ENUM_SINGLE(TWL4030_REG_HS_POPN_SET, 2,
1082 ARRAY_SIZE(twl4030_rampdelay_texts),
1083 twl4030_rampdelay_texts);
1085 /* Vibra H-bridge direction mode */
1086 static const char *twl4030_vibradirmode_texts[] = {
1087 "Vibra H-bridge direction", "Audio data MSB",
1090 static const struct soc_enum twl4030_vibradirmode_enum =
1091 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 5,
1092 ARRAY_SIZE(twl4030_vibradirmode_texts),
1093 twl4030_vibradirmode_texts);
1095 /* Vibra H-bridge direction */
1096 static const char *twl4030_vibradir_texts[] = {
1097 "Positive polarity", "Negative polarity",
1100 static const struct soc_enum twl4030_vibradir_enum =
1101 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 1,
1102 ARRAY_SIZE(twl4030_vibradir_texts),
1103 twl4030_vibradir_texts);
1105 /* Digimic Left and right swapping */
1106 static const char *twl4030_digimicswap_texts[] = {
1107 "Not swapped", "Swapped",
1110 static const struct soc_enum twl4030_digimicswap_enum =
1111 SOC_ENUM_SINGLE(TWL4030_REG_MISC_SET_1, 0,
1112 ARRAY_SIZE(twl4030_digimicswap_texts),
1113 twl4030_digimicswap_texts);
1115 static const struct snd_kcontrol_new twl4030_snd_controls[] = {
1116 /* Codec operation mode control */
1117 SOC_ENUM_EXT("Codec Operation Mode", twl4030_op_modes_enum,
1118 snd_soc_get_enum_double,
1119 snd_soc_put_twl4030_opmode_enum_double),
1121 /* Common playback gain controls */
1122 SOC_DOUBLE_R_TLV("DAC1 Digital Fine Playback Volume",
1123 TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA,
1124 0, 0x3f, 0, digital_fine_tlv),
1125 SOC_DOUBLE_R_TLV("DAC2 Digital Fine Playback Volume",
1126 TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA,
1127 0, 0x3f, 0, digital_fine_tlv),
1129 SOC_DOUBLE_R_TLV("DAC1 Digital Coarse Playback Volume",
1130 TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA,
1131 6, 0x2, 0, digital_coarse_tlv),
1132 SOC_DOUBLE_R_TLV("DAC2 Digital Coarse Playback Volume",
1133 TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA,
1134 6, 0x2, 0, digital_coarse_tlv),
1136 SOC_DOUBLE_R_TLV("DAC1 Analog Playback Volume",
1137 TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL,
1138 3, 0x12, 1, analog_tlv),
1139 SOC_DOUBLE_R_TLV("DAC2 Analog Playback Volume",
1140 TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL,
1141 3, 0x12, 1, analog_tlv),
1142 SOC_DOUBLE_R("DAC1 Analog Playback Switch",
1143 TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL,
1145 SOC_DOUBLE_R("DAC2 Analog Playback Switch",
1146 TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL,
1149 /* Common voice downlink gain controls */
1150 SOC_SINGLE_TLV("DAC Voice Digital Downlink Volume",
1151 TWL4030_REG_VRXPGA, 0, 0x31, 0, digital_voice_downlink_tlv),
1153 SOC_SINGLE_TLV("DAC Voice Analog Downlink Volume",
1154 TWL4030_REG_VDL_APGA_CTL, 3, 0x12, 1, analog_tlv),
1156 SOC_SINGLE("DAC Voice Analog Downlink Switch",
1157 TWL4030_REG_VDL_APGA_CTL, 1, 1, 0),
1159 /* Separate output gain controls */
1160 SOC_DOUBLE_R_TLV_TWL4030("PreDriv Playback Volume",
1161 TWL4030_REG_PREDL_CTL, TWL4030_REG_PREDR_CTL,
1162 4, 3, 0, output_tvl),
1164 SOC_DOUBLE_TLV_TWL4030("Headset Playback Volume",
1165 TWL4030_REG_HS_GAIN_SET, 0, 2, 3, 0, output_tvl),
1167 SOC_DOUBLE_R_TLV_TWL4030("Carkit Playback Volume",
1168 TWL4030_REG_PRECKL_CTL, TWL4030_REG_PRECKR_CTL,
1169 4, 3, 0, output_tvl),
1171 SOC_SINGLE_TLV_TWL4030("Earpiece Playback Volume",
1172 TWL4030_REG_EAR_CTL, 4, 3, 0, output_ear_tvl),
1174 /* Common capture gain controls */
1175 SOC_DOUBLE_R_TLV("TX1 Digital Capture Volume",
1176 TWL4030_REG_ATXL1PGA, TWL4030_REG_ATXR1PGA,
1177 0, 0x1f, 0, digital_capture_tlv),
1178 SOC_DOUBLE_R_TLV("TX2 Digital Capture Volume",
1179 TWL4030_REG_AVTXL2PGA, TWL4030_REG_AVTXR2PGA,
1180 0, 0x1f, 0, digital_capture_tlv),
1182 SOC_DOUBLE_TLV("Analog Capture Volume", TWL4030_REG_ANAMIC_GAIN,
1183 0, 3, 5, 0, input_gain_tlv),
1185 SOC_ENUM("AVADC Clock Priority", twl4030_avadc_clk_priority_enum),
1187 SOC_ENUM("HS ramp delay", twl4030_rampdelay_enum),
1189 SOC_ENUM("Vibra H-bridge mode", twl4030_vibradirmode_enum),
1190 SOC_ENUM("Vibra H-bridge direction", twl4030_vibradir_enum),
1192 SOC_ENUM("Digimic LR Swap", twl4030_digimicswap_enum),
1195 static const struct snd_soc_dapm_widget twl4030_dapm_widgets[] = {
1196 /* Left channel inputs */
1197 SND_SOC_DAPM_INPUT("MAINMIC"),
1198 SND_SOC_DAPM_INPUT("HSMIC"),
1199 SND_SOC_DAPM_INPUT("AUXL"),
1200 SND_SOC_DAPM_INPUT("CARKITMIC"),
1201 /* Right channel inputs */
1202 SND_SOC_DAPM_INPUT("SUBMIC"),
1203 SND_SOC_DAPM_INPUT("AUXR"),
1204 /* Digital microphones (Stereo) */
1205 SND_SOC_DAPM_INPUT("DIGIMIC0"),
1206 SND_SOC_DAPM_INPUT("DIGIMIC1"),
1209 SND_SOC_DAPM_OUTPUT("EARPIECE"),
1210 SND_SOC_DAPM_OUTPUT("PREDRIVEL"),
1211 SND_SOC_DAPM_OUTPUT("PREDRIVER"),
1212 SND_SOC_DAPM_OUTPUT("HSOL"),
1213 SND_SOC_DAPM_OUTPUT("HSOR"),
1214 SND_SOC_DAPM_OUTPUT("CARKITL"),
1215 SND_SOC_DAPM_OUTPUT("CARKITR"),
1216 SND_SOC_DAPM_OUTPUT("HFL"),
1217 SND_SOC_DAPM_OUTPUT("HFR"),
1218 SND_SOC_DAPM_OUTPUT("VIBRA"),
1220 /* AIF and APLL clocks for running DAIs (including loopback) */
1221 SND_SOC_DAPM_OUTPUT("Virtual HiFi OUT"),
1222 SND_SOC_DAPM_INPUT("Virtual HiFi IN"),
1223 SND_SOC_DAPM_OUTPUT("Virtual Voice OUT"),
1226 SND_SOC_DAPM_DAC("DAC Right1", "Right Front HiFi Playback",
1227 SND_SOC_NOPM, 0, 0),
1228 SND_SOC_DAPM_DAC("DAC Left1", "Left Front HiFi Playback",
1229 SND_SOC_NOPM, 0, 0),
1230 SND_SOC_DAPM_DAC("DAC Right2", "Right Rear HiFi Playback",
1231 SND_SOC_NOPM, 0, 0),
1232 SND_SOC_DAPM_DAC("DAC Left2", "Left Rear HiFi Playback",
1233 SND_SOC_NOPM, 0, 0),
1234 SND_SOC_DAPM_DAC("DAC Voice", "Voice Playback",
1235 SND_SOC_NOPM, 0, 0),
1237 /* Analog bypasses */
1238 SND_SOC_DAPM_SWITCH("Right1 Analog Loopback", SND_SOC_NOPM, 0, 0,
1239 &twl4030_dapm_abypassr1_control),
1240 SND_SOC_DAPM_SWITCH("Left1 Analog Loopback", SND_SOC_NOPM, 0, 0,
1241 &twl4030_dapm_abypassl1_control),
1242 SND_SOC_DAPM_SWITCH("Right2 Analog Loopback", SND_SOC_NOPM, 0, 0,
1243 &twl4030_dapm_abypassr2_control),
1244 SND_SOC_DAPM_SWITCH("Left2 Analog Loopback", SND_SOC_NOPM, 0, 0,
1245 &twl4030_dapm_abypassl2_control),
1246 SND_SOC_DAPM_SWITCH("Voice Analog Loopback", SND_SOC_NOPM, 0, 0,
1247 &twl4030_dapm_abypassv_control),
1249 /* Master analog loopback switch */
1250 SND_SOC_DAPM_SUPPLY("FM Loop Enable", TWL4030_REG_MISC_SET_1, 5, 0,
1253 /* Digital bypasses */
1254 SND_SOC_DAPM_SWITCH("Left Digital Loopback", SND_SOC_NOPM, 0, 0,
1255 &twl4030_dapm_dbypassl_control),
1256 SND_SOC_DAPM_SWITCH("Right Digital Loopback", SND_SOC_NOPM, 0, 0,
1257 &twl4030_dapm_dbypassr_control),
1258 SND_SOC_DAPM_SWITCH("Voice Digital Loopback", SND_SOC_NOPM, 0, 0,
1259 &twl4030_dapm_dbypassv_control),
1261 /* Digital mixers, power control for the physical DACs */
1262 SND_SOC_DAPM_MIXER("Digital R1 Playback Mixer",
1263 TWL4030_REG_AVDAC_CTL, 0, 0, NULL, 0),
1264 SND_SOC_DAPM_MIXER("Digital L1 Playback Mixer",
1265 TWL4030_REG_AVDAC_CTL, 1, 0, NULL, 0),
1266 SND_SOC_DAPM_MIXER("Digital R2 Playback Mixer",
1267 TWL4030_REG_AVDAC_CTL, 2, 0, NULL, 0),
1268 SND_SOC_DAPM_MIXER("Digital L2 Playback Mixer",
1269 TWL4030_REG_AVDAC_CTL, 3, 0, NULL, 0),
1270 SND_SOC_DAPM_MIXER("Digital Voice Playback Mixer",
1271 TWL4030_REG_AVDAC_CTL, 4, 0, NULL, 0),
1273 /* Analog mixers, power control for the physical PGAs */
1274 SND_SOC_DAPM_MIXER("Analog R1 Playback Mixer",
1275 TWL4030_REG_ARXR1_APGA_CTL, 0, 0, NULL, 0),
1276 SND_SOC_DAPM_MIXER("Analog L1 Playback Mixer",
1277 TWL4030_REG_ARXL1_APGA_CTL, 0, 0, NULL, 0),
1278 SND_SOC_DAPM_MIXER("Analog R2 Playback Mixer",
1279 TWL4030_REG_ARXR2_APGA_CTL, 0, 0, NULL, 0),
1280 SND_SOC_DAPM_MIXER("Analog L2 Playback Mixer",
1281 TWL4030_REG_ARXL2_APGA_CTL, 0, 0, NULL, 0),
1282 SND_SOC_DAPM_MIXER("Analog Voice Playback Mixer",
1283 TWL4030_REG_VDL_APGA_CTL, 0, 0, NULL, 0),
1285 SND_SOC_DAPM_SUPPLY("APLL Enable", SND_SOC_NOPM, 0, 0, apll_event,
1286 SND_SOC_DAPM_PRE_PMU|SND_SOC_DAPM_POST_PMD),
1288 SND_SOC_DAPM_SUPPLY("AIF Enable", SND_SOC_NOPM, 0, 0, aif_event,
1289 SND_SOC_DAPM_PRE_PMU|SND_SOC_DAPM_POST_PMD),
1291 /* Output MIXER controls */
1293 SND_SOC_DAPM_MIXER("Earpiece Mixer", SND_SOC_NOPM, 0, 0,
1294 &twl4030_dapm_earpiece_controls[0],
1295 ARRAY_SIZE(twl4030_dapm_earpiece_controls)),
1296 SND_SOC_DAPM_PGA_E("Earpiece PGA", SND_SOC_NOPM,
1297 0, 0, NULL, 0, earpiecepga_event,
1298 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1300 SND_SOC_DAPM_MIXER("PredriveL Mixer", SND_SOC_NOPM, 0, 0,
1301 &twl4030_dapm_predrivel_controls[0],
1302 ARRAY_SIZE(twl4030_dapm_predrivel_controls)),
1303 SND_SOC_DAPM_PGA_E("PredriveL PGA", SND_SOC_NOPM,
1304 0, 0, NULL, 0, predrivelpga_event,
1305 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1306 SND_SOC_DAPM_MIXER("PredriveR Mixer", SND_SOC_NOPM, 0, 0,
1307 &twl4030_dapm_predriver_controls[0],
1308 ARRAY_SIZE(twl4030_dapm_predriver_controls)),
1309 SND_SOC_DAPM_PGA_E("PredriveR PGA", SND_SOC_NOPM,
1310 0, 0, NULL, 0, predriverpga_event,
1311 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1313 SND_SOC_DAPM_MIXER("HeadsetL Mixer", SND_SOC_NOPM, 0, 0,
1314 &twl4030_dapm_hsol_controls[0],
1315 ARRAY_SIZE(twl4030_dapm_hsol_controls)),
1316 SND_SOC_DAPM_PGA_E("HeadsetL PGA", SND_SOC_NOPM,
1317 0, 0, NULL, 0, headsetlpga_event,
1318 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1319 SND_SOC_DAPM_MIXER("HeadsetR Mixer", SND_SOC_NOPM, 0, 0,
1320 &twl4030_dapm_hsor_controls[0],
1321 ARRAY_SIZE(twl4030_dapm_hsor_controls)),
1322 SND_SOC_DAPM_PGA_E("HeadsetR PGA", SND_SOC_NOPM,
1323 0, 0, NULL, 0, headsetrpga_event,
1324 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1326 SND_SOC_DAPM_MIXER("CarkitL Mixer", SND_SOC_NOPM, 0, 0,
1327 &twl4030_dapm_carkitl_controls[0],
1328 ARRAY_SIZE(twl4030_dapm_carkitl_controls)),
1329 SND_SOC_DAPM_PGA_E("CarkitL PGA", SND_SOC_NOPM,
1330 0, 0, NULL, 0, carkitlpga_event,
1331 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1332 SND_SOC_DAPM_MIXER("CarkitR Mixer", SND_SOC_NOPM, 0, 0,
1333 &twl4030_dapm_carkitr_controls[0],
1334 ARRAY_SIZE(twl4030_dapm_carkitr_controls)),
1335 SND_SOC_DAPM_PGA_E("CarkitR PGA", SND_SOC_NOPM,
1336 0, 0, NULL, 0, carkitrpga_event,
1337 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1339 /* Output MUX controls */
1341 SND_SOC_DAPM_MUX("HandsfreeL Mux", SND_SOC_NOPM, 0, 0,
1342 &twl4030_dapm_handsfreel_control),
1343 SND_SOC_DAPM_SWITCH("HandsfreeL", SND_SOC_NOPM, 0, 0,
1344 &twl4030_dapm_handsfreelmute_control),
1345 SND_SOC_DAPM_PGA_E("HandsfreeL PGA", SND_SOC_NOPM,
1346 0, 0, NULL, 0, handsfreelpga_event,
1347 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1348 SND_SOC_DAPM_MUX("HandsfreeR Mux", SND_SOC_NOPM, 5, 0,
1349 &twl4030_dapm_handsfreer_control),
1350 SND_SOC_DAPM_SWITCH("HandsfreeR", SND_SOC_NOPM, 0, 0,
1351 &twl4030_dapm_handsfreermute_control),
1352 SND_SOC_DAPM_PGA_E("HandsfreeR PGA", SND_SOC_NOPM,
1353 0, 0, NULL, 0, handsfreerpga_event,
1354 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1356 SND_SOC_DAPM_MUX_E("Vibra Mux", TWL4030_REG_VIBRA_CTL, 0, 0,
1357 &twl4030_dapm_vibra_control, vibramux_event,
1358 SND_SOC_DAPM_PRE_PMU),
1359 SND_SOC_DAPM_MUX("Vibra Route", SND_SOC_NOPM, 0, 0,
1360 &twl4030_dapm_vibrapath_control),
1362 /* Introducing four virtual ADC, since TWL4030 have four channel for
1364 SND_SOC_DAPM_ADC("ADC Virtual Left1", "Left Front Capture",
1365 SND_SOC_NOPM, 0, 0),
1366 SND_SOC_DAPM_ADC("ADC Virtual Right1", "Right Front Capture",
1367 SND_SOC_NOPM, 0, 0),
1368 SND_SOC_DAPM_ADC("ADC Virtual Left2", "Left Rear Capture",
1369 SND_SOC_NOPM, 0, 0),
1370 SND_SOC_DAPM_ADC("ADC Virtual Right2", "Right Rear Capture",
1371 SND_SOC_NOPM, 0, 0),
1373 /* Analog/Digital mic path selection.
1374 TX1 Left/Right: either analog Left/Right or Digimic0
1375 TX2 Left/Right: either analog Left/Right or Digimic1 */
1376 SND_SOC_DAPM_MUX_E("TX1 Capture Route", SND_SOC_NOPM, 0, 0,
1377 &twl4030_dapm_micpathtx1_control, micpath_event,
1378 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD|
1379 SND_SOC_DAPM_POST_REG),
1380 SND_SOC_DAPM_MUX_E("TX2 Capture Route", SND_SOC_NOPM, 0, 0,
1381 &twl4030_dapm_micpathtx2_control, micpath_event,
1382 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD|
1383 SND_SOC_DAPM_POST_REG),
1385 /* Analog input mixers for the capture amplifiers */
1386 SND_SOC_DAPM_MIXER("Analog Left",
1387 TWL4030_REG_ANAMICL, 4, 0,
1388 &twl4030_dapm_analoglmic_controls[0],
1389 ARRAY_SIZE(twl4030_dapm_analoglmic_controls)),
1390 SND_SOC_DAPM_MIXER("Analog Right",
1391 TWL4030_REG_ANAMICR, 4, 0,
1392 &twl4030_dapm_analogrmic_controls[0],
1393 ARRAY_SIZE(twl4030_dapm_analogrmic_controls)),
1395 SND_SOC_DAPM_PGA("ADC Physical Left",
1396 TWL4030_REG_AVADC_CTL, 3, 0, NULL, 0),
1397 SND_SOC_DAPM_PGA("ADC Physical Right",
1398 TWL4030_REG_AVADC_CTL, 1, 0, NULL, 0),
1400 SND_SOC_DAPM_PGA("Digimic0 Enable",
1401 TWL4030_REG_ADCMICSEL, 1, 0, NULL, 0),
1402 SND_SOC_DAPM_PGA("Digimic1 Enable",
1403 TWL4030_REG_ADCMICSEL, 3, 0, NULL, 0),
1405 SND_SOC_DAPM_MICBIAS("Mic Bias 1", TWL4030_REG_MICBIAS_CTL, 0, 0),
1406 SND_SOC_DAPM_MICBIAS("Mic Bias 2", TWL4030_REG_MICBIAS_CTL, 1, 0),
1407 SND_SOC_DAPM_MICBIAS("Headset Mic Bias", TWL4030_REG_MICBIAS_CTL, 2, 0),
1411 static const struct snd_soc_dapm_route intercon[] = {
1412 {"Digital L1 Playback Mixer", NULL, "DAC Left1"},
1413 {"Digital R1 Playback Mixer", NULL, "DAC Right1"},
1414 {"Digital L2 Playback Mixer", NULL, "DAC Left2"},
1415 {"Digital R2 Playback Mixer", NULL, "DAC Right2"},
1416 {"Digital Voice Playback Mixer", NULL, "DAC Voice"},
1418 /* Supply for the digital part (APLL) */
1419 {"Digital Voice Playback Mixer", NULL, "APLL Enable"},
1421 {"Digital R1 Playback Mixer", NULL, "AIF Enable"},
1422 {"Digital L1 Playback Mixer", NULL, "AIF Enable"},
1423 {"Digital R2 Playback Mixer", NULL, "AIF Enable"},
1424 {"Digital L2 Playback Mixer", NULL, "AIF Enable"},
1426 {"Analog L1 Playback Mixer", NULL, "Digital L1 Playback Mixer"},
1427 {"Analog R1 Playback Mixer", NULL, "Digital R1 Playback Mixer"},
1428 {"Analog L2 Playback Mixer", NULL, "Digital L2 Playback Mixer"},
1429 {"Analog R2 Playback Mixer", NULL, "Digital R2 Playback Mixer"},
1430 {"Analog Voice Playback Mixer", NULL, "Digital Voice Playback Mixer"},
1432 /* Internal playback routings */
1434 {"Earpiece Mixer", "Voice", "Analog Voice Playback Mixer"},
1435 {"Earpiece Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1436 {"Earpiece Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1437 {"Earpiece Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1438 {"Earpiece PGA", NULL, "Earpiece Mixer"},
1440 {"PredriveL Mixer", "Voice", "Analog Voice Playback Mixer"},
1441 {"PredriveL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1442 {"PredriveL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1443 {"PredriveL Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1444 {"PredriveL PGA", NULL, "PredriveL Mixer"},
1446 {"PredriveR Mixer", "Voice", "Analog Voice Playback Mixer"},
1447 {"PredriveR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1448 {"PredriveR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1449 {"PredriveR Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1450 {"PredriveR PGA", NULL, "PredriveR Mixer"},
1452 {"HeadsetL Mixer", "Voice", "Analog Voice Playback Mixer"},
1453 {"HeadsetL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1454 {"HeadsetL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1455 {"HeadsetL PGA", NULL, "HeadsetL Mixer"},
1457 {"HeadsetR Mixer", "Voice", "Analog Voice Playback Mixer"},
1458 {"HeadsetR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1459 {"HeadsetR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1460 {"HeadsetR PGA", NULL, "HeadsetR Mixer"},
1462 {"CarkitL Mixer", "Voice", "Analog Voice Playback Mixer"},
1463 {"CarkitL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1464 {"CarkitL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1465 {"CarkitL PGA", NULL, "CarkitL Mixer"},
1467 {"CarkitR Mixer", "Voice", "Analog Voice Playback Mixer"},
1468 {"CarkitR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1469 {"CarkitR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1470 {"CarkitR PGA", NULL, "CarkitR Mixer"},
1472 {"HandsfreeL Mux", "Voice", "Analog Voice Playback Mixer"},
1473 {"HandsfreeL Mux", "AudioL1", "Analog L1 Playback Mixer"},
1474 {"HandsfreeL Mux", "AudioL2", "Analog L2 Playback Mixer"},
1475 {"HandsfreeL Mux", "AudioR2", "Analog R2 Playback Mixer"},
1476 {"HandsfreeL", "Switch", "HandsfreeL Mux"},
1477 {"HandsfreeL PGA", NULL, "HandsfreeL"},
1479 {"HandsfreeR Mux", "Voice", "Analog Voice Playback Mixer"},
1480 {"HandsfreeR Mux", "AudioR1", "Analog R1 Playback Mixer"},
1481 {"HandsfreeR Mux", "AudioR2", "Analog R2 Playback Mixer"},
1482 {"HandsfreeR Mux", "AudioL2", "Analog L2 Playback Mixer"},
1483 {"HandsfreeR", "Switch", "HandsfreeR Mux"},
1484 {"HandsfreeR PGA", NULL, "HandsfreeR"},
1486 {"Vibra Mux", "AudioL1", "DAC Left1"},
1487 {"Vibra Mux", "AudioR1", "DAC Right1"},
1488 {"Vibra Mux", "AudioL2", "DAC Left2"},
1489 {"Vibra Mux", "AudioR2", "DAC Right2"},
1492 /* Must be always connected (for AIF and APLL) */
1493 {"Virtual HiFi OUT", NULL, "Digital L1 Playback Mixer"},
1494 {"Virtual HiFi OUT", NULL, "Digital R1 Playback Mixer"},
1495 {"Virtual HiFi OUT", NULL, "Digital L2 Playback Mixer"},
1496 {"Virtual HiFi OUT", NULL, "Digital R2 Playback Mixer"},
1497 /* Must be always connected (for APLL) */
1498 {"Virtual Voice OUT", NULL, "Digital Voice Playback Mixer"},
1499 /* Physical outputs */
1500 {"EARPIECE", NULL, "Earpiece PGA"},
1501 {"PREDRIVEL", NULL, "PredriveL PGA"},
1502 {"PREDRIVER", NULL, "PredriveR PGA"},
1503 {"HSOL", NULL, "HeadsetL PGA"},
1504 {"HSOR", NULL, "HeadsetR PGA"},
1505 {"CARKITL", NULL, "CarkitL PGA"},
1506 {"CARKITR", NULL, "CarkitR PGA"},
1507 {"HFL", NULL, "HandsfreeL PGA"},
1508 {"HFR", NULL, "HandsfreeR PGA"},
1509 {"Vibra Route", "Audio", "Vibra Mux"},
1510 {"VIBRA", NULL, "Vibra Route"},
1513 /* Must be always connected (for AIF and APLL) */
1514 {"ADC Virtual Left1", NULL, "Virtual HiFi IN"},
1515 {"ADC Virtual Right1", NULL, "Virtual HiFi IN"},
1516 {"ADC Virtual Left2", NULL, "Virtual HiFi IN"},
1517 {"ADC Virtual Right2", NULL, "Virtual HiFi IN"},
1518 /* Physical inputs */
1519 {"Analog Left", "Main Mic Capture Switch", "MAINMIC"},
1520 {"Analog Left", "Headset Mic Capture Switch", "HSMIC"},
1521 {"Analog Left", "AUXL Capture Switch", "AUXL"},
1522 {"Analog Left", "Carkit Mic Capture Switch", "CARKITMIC"},
1524 {"Analog Right", "Sub Mic Capture Switch", "SUBMIC"},
1525 {"Analog Right", "AUXR Capture Switch", "AUXR"},
1527 {"ADC Physical Left", NULL, "Analog Left"},
1528 {"ADC Physical Right", NULL, "Analog Right"},
1530 {"Digimic0 Enable", NULL, "DIGIMIC0"},
1531 {"Digimic1 Enable", NULL, "DIGIMIC1"},
1533 /* TX1 Left capture path */
1534 {"TX1 Capture Route", "Analog", "ADC Physical Left"},
1535 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
1536 /* TX1 Right capture path */
1537 {"TX1 Capture Route", "Analog", "ADC Physical Right"},
1538 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
1539 /* TX2 Left capture path */
1540 {"TX2 Capture Route", "Analog", "ADC Physical Left"},
1541 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
1542 /* TX2 Right capture path */
1543 {"TX2 Capture Route", "Analog", "ADC Physical Right"},
1544 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
1546 {"ADC Virtual Left1", NULL, "TX1 Capture Route"},
1547 {"ADC Virtual Right1", NULL, "TX1 Capture Route"},
1548 {"ADC Virtual Left2", NULL, "TX2 Capture Route"},
1549 {"ADC Virtual Right2", NULL, "TX2 Capture Route"},
1551 {"ADC Virtual Left1", NULL, "AIF Enable"},
1552 {"ADC Virtual Right1", NULL, "AIF Enable"},
1553 {"ADC Virtual Left2", NULL, "AIF Enable"},
1554 {"ADC Virtual Right2", NULL, "AIF Enable"},
1556 /* Analog bypass routes */
1557 {"Right1 Analog Loopback", "Switch", "Analog Right"},
1558 {"Left1 Analog Loopback", "Switch", "Analog Left"},
1559 {"Right2 Analog Loopback", "Switch", "Analog Right"},
1560 {"Left2 Analog Loopback", "Switch", "Analog Left"},
1561 {"Voice Analog Loopback", "Switch", "Analog Left"},
1563 /* Supply for the Analog loopbacks */
1564 {"Right1 Analog Loopback", NULL, "FM Loop Enable"},
1565 {"Left1 Analog Loopback", NULL, "FM Loop Enable"},
1566 {"Right2 Analog Loopback", NULL, "FM Loop Enable"},
1567 {"Left2 Analog Loopback", NULL, "FM Loop Enable"},
1568 {"Voice Analog Loopback", NULL, "FM Loop Enable"},
1570 {"Analog R1 Playback Mixer", NULL, "Right1 Analog Loopback"},
1571 {"Analog L1 Playback Mixer", NULL, "Left1 Analog Loopback"},
1572 {"Analog R2 Playback Mixer", NULL, "Right2 Analog Loopback"},
1573 {"Analog L2 Playback Mixer", NULL, "Left2 Analog Loopback"},
1574 {"Analog Voice Playback Mixer", NULL, "Voice Analog Loopback"},
1576 /* Digital bypass routes */
1577 {"Right Digital Loopback", "Volume", "TX1 Capture Route"},
1578 {"Left Digital Loopback", "Volume", "TX1 Capture Route"},
1579 {"Voice Digital Loopback", "Volume", "TX2 Capture Route"},
1581 {"Digital R2 Playback Mixer", NULL, "Right Digital Loopback"},
1582 {"Digital L2 Playback Mixer", NULL, "Left Digital Loopback"},
1583 {"Digital Voice Playback Mixer", NULL, "Voice Digital Loopback"},
1587 static int twl4030_add_widgets(struct snd_soc_codec *codec)
1589 snd_soc_dapm_new_controls(codec, twl4030_dapm_widgets,
1590 ARRAY_SIZE(twl4030_dapm_widgets));
1592 snd_soc_dapm_add_routes(codec, intercon, ARRAY_SIZE(intercon));
1597 static int twl4030_set_bias_level(struct snd_soc_codec *codec,
1598 enum snd_soc_bias_level level)
1601 case SND_SOC_BIAS_ON:
1603 case SND_SOC_BIAS_PREPARE:
1605 case SND_SOC_BIAS_STANDBY:
1606 if (codec->bias_level == SND_SOC_BIAS_OFF)
1607 twl4030_power_up(codec);
1609 case SND_SOC_BIAS_OFF:
1610 twl4030_power_down(codec);
1613 codec->bias_level = level;
1618 static void twl4030_constraints(struct twl4030_priv *twl4030,
1619 struct snd_pcm_substream *mst_substream)
1621 struct snd_pcm_substream *slv_substream;
1623 /* Pick the stream, which need to be constrained */
1624 if (mst_substream == twl4030->master_substream)
1625 slv_substream = twl4030->slave_substream;
1626 else if (mst_substream == twl4030->slave_substream)
1627 slv_substream = twl4030->master_substream;
1628 else /* This should not happen.. */
1631 /* Set the constraints according to the already configured stream */
1632 snd_pcm_hw_constraint_minmax(slv_substream->runtime,
1633 SNDRV_PCM_HW_PARAM_RATE,
1637 snd_pcm_hw_constraint_minmax(slv_substream->runtime,
1638 SNDRV_PCM_HW_PARAM_SAMPLE_BITS,
1639 twl4030->sample_bits,
1640 twl4030->sample_bits);
1642 snd_pcm_hw_constraint_minmax(slv_substream->runtime,
1643 SNDRV_PCM_HW_PARAM_CHANNELS,
1648 /* In case of 4 channel mode, the RX1 L/R for playback and the TX2 L/R for
1649 * capture has to be enabled/disabled. */
1650 static void twl4030_tdm_enable(struct snd_soc_codec *codec, int direction,
1655 reg = twl4030_read_reg_cache(codec, TWL4030_REG_OPTION);
1657 if (direction == SNDRV_PCM_STREAM_PLAYBACK)
1658 mask = TWL4030_ARXL1_VRX_EN | TWL4030_ARXR1_EN;
1660 mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN;
1667 twl4030_write(codec, TWL4030_REG_OPTION, reg);
1670 static int twl4030_startup(struct snd_pcm_substream *substream,
1671 struct snd_soc_dai *dai)
1673 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1674 struct snd_soc_device *socdev = rtd->socdev;
1675 struct snd_soc_codec *codec = socdev->card->codec;
1676 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
1678 if (twl4030->master_substream) {
1679 twl4030->slave_substream = substream;
1680 /* The DAI has one configuration for playback and capture, so
1681 * if the DAI has been already configured then constrain this
1682 * substream to match it. */
1683 if (twl4030->configured)
1684 twl4030_constraints(twl4030, twl4030->master_substream);
1686 if (!(twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE) &
1687 TWL4030_OPTION_1)) {
1688 /* In option2 4 channel is not supported, set the
1689 * constraint for the first stream for channels, the
1690 * second stream will 'inherit' this cosntraint */
1691 snd_pcm_hw_constraint_minmax(substream->runtime,
1692 SNDRV_PCM_HW_PARAM_CHANNELS,
1695 twl4030->master_substream = substream;
1701 static void twl4030_shutdown(struct snd_pcm_substream *substream,
1702 struct snd_soc_dai *dai)
1704 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1705 struct snd_soc_device *socdev = rtd->socdev;
1706 struct snd_soc_codec *codec = socdev->card->codec;
1707 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
1709 if (twl4030->master_substream == substream)
1710 twl4030->master_substream = twl4030->slave_substream;
1712 twl4030->slave_substream = NULL;
1714 /* If all streams are closed, or the remaining stream has not yet
1715 * been configured than set the DAI as not configured. */
1716 if (!twl4030->master_substream)
1717 twl4030->configured = 0;
1718 else if (!twl4030->master_substream->runtime->channels)
1719 twl4030->configured = 0;
1721 /* If the closing substream had 4 channel, do the necessary cleanup */
1722 if (substream->runtime->channels == 4)
1723 twl4030_tdm_enable(codec, substream->stream, 0);
1726 static int twl4030_hw_params(struct snd_pcm_substream *substream,
1727 struct snd_pcm_hw_params *params,
1728 struct snd_soc_dai *dai)
1730 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1731 struct snd_soc_device *socdev = rtd->socdev;
1732 struct snd_soc_codec *codec = socdev->card->codec;
1733 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
1734 u8 mode, old_mode, format, old_format;
1736 /* If the substream has 4 channel, do the necessary setup */
1737 if (params_channels(params) == 4) {
1738 format = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
1739 mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE);
1741 /* Safety check: are we in the correct operating mode and
1742 * the interface is in TDM mode? */
1743 if ((mode & TWL4030_OPTION_1) &&
1744 ((format & TWL4030_AIF_FORMAT) == TWL4030_AIF_FORMAT_TDM))
1745 twl4030_tdm_enable(codec, substream->stream, 1);
1750 if (twl4030->configured)
1751 /* Ignoring hw_params for already configured DAI */
1755 old_mode = twl4030_read_reg_cache(codec,
1756 TWL4030_REG_CODEC_MODE) & ~TWL4030_CODECPDZ;
1757 mode = old_mode & ~TWL4030_APLL_RATE;
1759 switch (params_rate(params)) {
1761 mode |= TWL4030_APLL_RATE_8000;
1764 mode |= TWL4030_APLL_RATE_11025;
1767 mode |= TWL4030_APLL_RATE_12000;
1770 mode |= TWL4030_APLL_RATE_16000;
1773 mode |= TWL4030_APLL_RATE_22050;
1776 mode |= TWL4030_APLL_RATE_24000;
1779 mode |= TWL4030_APLL_RATE_32000;
1782 mode |= TWL4030_APLL_RATE_44100;
1785 mode |= TWL4030_APLL_RATE_48000;
1788 mode |= TWL4030_APLL_RATE_96000;
1791 printk(KERN_ERR "TWL4030 hw params: unknown rate %d\n",
1792 params_rate(params));
1796 if (mode != old_mode) {
1797 /* change rate and set CODECPDZ */
1798 twl4030_codec_enable(codec, 0);
1799 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
1800 twl4030_codec_enable(codec, 1);
1804 old_format = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
1805 format = old_format;
1806 format &= ~TWL4030_DATA_WIDTH;
1807 switch (params_format(params)) {
1808 case SNDRV_PCM_FORMAT_S16_LE:
1809 format |= TWL4030_DATA_WIDTH_16S_16W;
1811 case SNDRV_PCM_FORMAT_S24_LE:
1812 format |= TWL4030_DATA_WIDTH_32S_24W;
1815 printk(KERN_ERR "TWL4030 hw params: unknown format %d\n",
1816 params_format(params));
1820 if (format != old_format) {
1822 /* clear CODECPDZ before changing format (codec requirement) */
1823 twl4030_codec_enable(codec, 0);
1826 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1828 /* set CODECPDZ afterwards */
1829 twl4030_codec_enable(codec, 1);
1832 /* Store the important parameters for the DAI configuration and set
1833 * the DAI as configured */
1834 twl4030->configured = 1;
1835 twl4030->rate = params_rate(params);
1836 twl4030->sample_bits = hw_param_interval(params,
1837 SNDRV_PCM_HW_PARAM_SAMPLE_BITS)->min;
1838 twl4030->channels = params_channels(params);
1840 /* If both playback and capture streams are open, and one of them
1841 * is setting the hw parameters right now (since we are here), set
1842 * constraints to the other stream to match the current one. */
1843 if (twl4030->slave_substream)
1844 twl4030_constraints(twl4030, substream);
1849 static int twl4030_set_dai_sysclk(struct snd_soc_dai *codec_dai,
1850 int clk_id, unsigned int freq, int dir)
1852 struct snd_soc_codec *codec = codec_dai->codec;
1853 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
1861 dev_err(codec->dev, "Unsupported APLL mclk: %u\n", freq);
1865 if ((freq / 1000) != twl4030->sysclk) {
1867 "Mismatch in APLL mclk: %u (configured: %u)\n",
1868 freq, twl4030->sysclk * 1000);
1875 static int twl4030_set_dai_fmt(struct snd_soc_dai *codec_dai,
1878 struct snd_soc_codec *codec = codec_dai->codec;
1879 u8 old_format, format;
1882 old_format = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
1883 format = old_format;
1885 /* set master/slave audio interface */
1886 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1887 case SND_SOC_DAIFMT_CBM_CFM:
1888 format &= ~(TWL4030_AIF_SLAVE_EN);
1889 format &= ~(TWL4030_CLK256FS_EN);
1891 case SND_SOC_DAIFMT_CBS_CFS:
1892 format |= TWL4030_AIF_SLAVE_EN;
1893 format |= TWL4030_CLK256FS_EN;
1899 /* interface format */
1900 format &= ~TWL4030_AIF_FORMAT;
1901 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1902 case SND_SOC_DAIFMT_I2S:
1903 format |= TWL4030_AIF_FORMAT_CODEC;
1905 case SND_SOC_DAIFMT_DSP_A:
1906 format |= TWL4030_AIF_FORMAT_TDM;
1912 if (format != old_format) {
1914 /* clear CODECPDZ before changing format (codec requirement) */
1915 twl4030_codec_enable(codec, 0);
1918 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1920 /* set CODECPDZ afterwards */
1921 twl4030_codec_enable(codec, 1);
1927 static int twl4030_set_tristate(struct snd_soc_dai *dai, int tristate)
1929 struct snd_soc_codec *codec = dai->codec;
1930 u8 reg = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
1933 reg |= TWL4030_AIF_TRI_EN;
1935 reg &= ~TWL4030_AIF_TRI_EN;
1937 return twl4030_write(codec, TWL4030_REG_AUDIO_IF, reg);
1940 /* In case of voice mode, the RX1 L(VRX) for downlink and the TX2 L/R
1941 * (VTXL, VTXR) for uplink has to be enabled/disabled. */
1942 static void twl4030_voice_enable(struct snd_soc_codec *codec, int direction,
1947 reg = twl4030_read_reg_cache(codec, TWL4030_REG_OPTION);
1949 if (direction == SNDRV_PCM_STREAM_PLAYBACK)
1950 mask = TWL4030_ARXL1_VRX_EN;
1952 mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN;
1959 twl4030_write(codec, TWL4030_REG_OPTION, reg);
1962 static int twl4030_voice_startup(struct snd_pcm_substream *substream,
1963 struct snd_soc_dai *dai)
1965 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1966 struct snd_soc_device *socdev = rtd->socdev;
1967 struct snd_soc_codec *codec = socdev->card->codec;
1968 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
1971 /* If the system master clock is not 26MHz, the voice PCM interface is
1974 if (twl4030->sysclk != 26000) {
1975 dev_err(codec->dev, "The board is configured for %u Hz, while"
1976 "the Voice interface needs 26MHz APLL mclk\n",
1977 twl4030->sysclk * 1000);
1981 /* If the codec mode is not option2, the voice PCM interface is not
1984 mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE)
1987 if (mode != TWL4030_OPTION_2) {
1988 printk(KERN_ERR "TWL4030 voice startup: "
1989 "the codec mode is not option2\n");
1996 static void twl4030_voice_shutdown(struct snd_pcm_substream *substream,
1997 struct snd_soc_dai *dai)
1999 struct snd_soc_pcm_runtime *rtd = substream->private_data;
2000 struct snd_soc_device *socdev = rtd->socdev;
2001 struct snd_soc_codec *codec = socdev->card->codec;
2003 /* Enable voice digital filters */
2004 twl4030_voice_enable(codec, substream->stream, 0);
2007 static int twl4030_voice_hw_params(struct snd_pcm_substream *substream,
2008 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
2010 struct snd_soc_pcm_runtime *rtd = substream->private_data;
2011 struct snd_soc_device *socdev = rtd->socdev;
2012 struct snd_soc_codec *codec = socdev->card->codec;
2015 /* Enable voice digital filters */
2016 twl4030_voice_enable(codec, substream->stream, 1);
2019 old_mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE)
2020 & ~(TWL4030_CODECPDZ);
2023 switch (params_rate(params)) {
2025 mode &= ~(TWL4030_SEL_16K);
2028 mode |= TWL4030_SEL_16K;
2031 printk(KERN_ERR "TWL4030 voice hw params: unknown rate %d\n",
2032 params_rate(params));
2036 if (mode != old_mode) {
2037 /* change rate and set CODECPDZ */
2038 twl4030_codec_enable(codec, 0);
2039 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
2040 twl4030_codec_enable(codec, 1);
2046 static int twl4030_voice_set_dai_sysclk(struct snd_soc_dai *codec_dai,
2047 int clk_id, unsigned int freq, int dir)
2049 struct snd_soc_codec *codec = codec_dai->codec;
2050 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
2052 if (freq != 26000000) {
2053 dev_err(codec->dev, "Unsupported APLL mclk: %u, the Voice"
2054 "interface needs 26MHz APLL mclk\n", freq);
2057 if ((freq / 1000) != twl4030->sysclk) {
2059 "Mismatch in APLL mclk: %u (configured: %u)\n",
2060 freq, twl4030->sysclk * 1000);
2066 static int twl4030_voice_set_dai_fmt(struct snd_soc_dai *codec_dai,
2069 struct snd_soc_codec *codec = codec_dai->codec;
2070 u8 old_format, format;
2073 old_format = twl4030_read_reg_cache(codec, TWL4030_REG_VOICE_IF);
2074 format = old_format;
2076 /* set master/slave audio interface */
2077 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
2078 case SND_SOC_DAIFMT_CBM_CFM:
2079 format &= ~(TWL4030_VIF_SLAVE_EN);
2081 case SND_SOC_DAIFMT_CBS_CFS:
2082 format |= TWL4030_VIF_SLAVE_EN;
2088 /* clock inversion */
2089 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
2090 case SND_SOC_DAIFMT_IB_NF:
2091 format &= ~(TWL4030_VIF_FORMAT);
2093 case SND_SOC_DAIFMT_NB_IF:
2094 format |= TWL4030_VIF_FORMAT;
2100 if (format != old_format) {
2101 /* change format and set CODECPDZ */
2102 twl4030_codec_enable(codec, 0);
2103 twl4030_write(codec, TWL4030_REG_VOICE_IF, format);
2104 twl4030_codec_enable(codec, 1);
2110 static int twl4030_voice_set_tristate(struct snd_soc_dai *dai, int tristate)
2112 struct snd_soc_codec *codec = dai->codec;
2113 u8 reg = twl4030_read_reg_cache(codec, TWL4030_REG_VOICE_IF);
2116 reg |= TWL4030_VIF_TRI_EN;
2118 reg &= ~TWL4030_VIF_TRI_EN;
2120 return twl4030_write(codec, TWL4030_REG_VOICE_IF, reg);
2123 #define TWL4030_RATES (SNDRV_PCM_RATE_8000_48000)
2124 #define TWL4030_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FORMAT_S24_LE)
2126 static struct snd_soc_dai_ops twl4030_dai_ops = {
2127 .startup = twl4030_startup,
2128 .shutdown = twl4030_shutdown,
2129 .hw_params = twl4030_hw_params,
2130 .set_sysclk = twl4030_set_dai_sysclk,
2131 .set_fmt = twl4030_set_dai_fmt,
2132 .set_tristate = twl4030_set_tristate,
2135 static struct snd_soc_dai_ops twl4030_dai_voice_ops = {
2136 .startup = twl4030_voice_startup,
2137 .shutdown = twl4030_voice_shutdown,
2138 .hw_params = twl4030_voice_hw_params,
2139 .set_sysclk = twl4030_voice_set_dai_sysclk,
2140 .set_fmt = twl4030_voice_set_dai_fmt,
2141 .set_tristate = twl4030_voice_set_tristate,
2144 struct snd_soc_dai twl4030_dai[] = {
2148 .stream_name = "HiFi Playback",
2151 .rates = TWL4030_RATES | SNDRV_PCM_RATE_96000,
2152 .formats = TWL4030_FORMATS,},
2154 .stream_name = "Capture",
2157 .rates = TWL4030_RATES,
2158 .formats = TWL4030_FORMATS,},
2159 .ops = &twl4030_dai_ops,
2162 .name = "twl4030 Voice",
2164 .stream_name = "Voice Playback",
2167 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
2168 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
2170 .stream_name = "Capture",
2173 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
2174 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
2175 .ops = &twl4030_dai_voice_ops,
2178 EXPORT_SYMBOL_GPL(twl4030_dai);
2180 static int twl4030_soc_suspend(struct platform_device *pdev, pm_message_t state)
2182 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
2183 struct snd_soc_codec *codec = socdev->card->codec;
2185 twl4030_set_bias_level(codec, SND_SOC_BIAS_OFF);
2190 static int twl4030_soc_resume(struct platform_device *pdev)
2192 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
2193 struct snd_soc_codec *codec = socdev->card->codec;
2195 twl4030_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
2199 static struct snd_soc_codec *twl4030_codec;
2201 static int twl4030_soc_probe(struct platform_device *pdev)
2203 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
2204 struct twl4030_setup_data *setup = socdev->codec_data;
2205 struct snd_soc_codec *codec;
2206 struct twl4030_priv *twl4030;
2209 BUG_ON(!twl4030_codec);
2211 codec = twl4030_codec;
2212 twl4030 = snd_soc_codec_get_drvdata(codec);
2213 socdev->card->codec = codec;
2215 /* Configuration for headset ramp delay from setup data */
2217 unsigned char hs_pop;
2219 if (setup->sysclk != twl4030->sysclk)
2220 dev_warn(&pdev->dev,
2221 "Mismatch in APLL mclk: %u (configured: %u)\n",
2222 setup->sysclk, twl4030->sysclk);
2224 hs_pop = twl4030_read_reg_cache(codec, TWL4030_REG_HS_POPN_SET);
2225 hs_pop &= ~TWL4030_RAMP_DELAY;
2226 hs_pop |= (setup->ramp_delay_value << 2);
2227 twl4030_write_reg_cache(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
2231 ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
2233 dev_err(&pdev->dev, "failed to create pcms\n");
2237 snd_soc_add_controls(codec, twl4030_snd_controls,
2238 ARRAY_SIZE(twl4030_snd_controls));
2239 twl4030_add_widgets(codec);
2244 static int twl4030_soc_remove(struct platform_device *pdev)
2246 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
2247 struct snd_soc_codec *codec = socdev->card->codec;
2249 twl4030_set_bias_level(codec, SND_SOC_BIAS_OFF);
2250 snd_soc_free_pcms(socdev);
2251 snd_soc_dapm_free(socdev);
2256 static int __devinit twl4030_codec_probe(struct platform_device *pdev)
2258 struct twl4030_codec_audio_data *pdata = pdev->dev.platform_data;
2259 struct snd_soc_codec *codec;
2260 struct twl4030_priv *twl4030;
2264 dev_err(&pdev->dev, "platform_data is missing\n");
2268 twl4030 = kzalloc(sizeof(struct twl4030_priv), GFP_KERNEL);
2269 if (twl4030 == NULL) {
2270 dev_err(&pdev->dev, "Can not allocate memroy\n");
2274 codec = &twl4030->codec;
2275 snd_soc_codec_set_drvdata(codec, twl4030);
2276 codec->dev = &pdev->dev;
2277 twl4030_dai[0].dev = &pdev->dev;
2278 twl4030_dai[1].dev = &pdev->dev;
2280 mutex_init(&codec->mutex);
2281 INIT_LIST_HEAD(&codec->dapm_widgets);
2282 INIT_LIST_HEAD(&codec->dapm_paths);
2284 codec->name = "twl4030";
2285 codec->owner = THIS_MODULE;
2286 codec->read = twl4030_read_reg_cache;
2287 codec->write = twl4030_write;
2288 codec->set_bias_level = twl4030_set_bias_level;
2289 codec->dai = twl4030_dai;
2290 codec->num_dai = ARRAY_SIZE(twl4030_dai);
2291 codec->reg_cache_size = sizeof(twl4030_reg);
2292 codec->reg_cache = kmemdup(twl4030_reg, sizeof(twl4030_reg),
2294 if (codec->reg_cache == NULL) {
2299 platform_set_drvdata(pdev, twl4030);
2300 twl4030_codec = codec;
2302 /* Set the defaults, and power up the codec */
2303 twl4030->sysclk = twl4030_codec_get_mclk() / 1000;
2304 twl4030_init_chip(codec);
2305 codec->bias_level = SND_SOC_BIAS_OFF;
2306 twl4030_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
2308 ret = snd_soc_register_codec(codec);
2310 dev_err(codec->dev, "Failed to register codec: %d\n", ret);
2314 ret = snd_soc_register_dais(&twl4030_dai[0], ARRAY_SIZE(twl4030_dai));
2316 dev_err(codec->dev, "Failed to register DAIs: %d\n", ret);
2317 snd_soc_unregister_codec(codec);
2324 twl4030_power_down(codec);
2325 kfree(codec->reg_cache);
2331 static int __devexit twl4030_codec_remove(struct platform_device *pdev)
2333 struct twl4030_priv *twl4030 = platform_get_drvdata(pdev);
2335 snd_soc_unregister_dais(&twl4030_dai[0], ARRAY_SIZE(twl4030_dai));
2336 snd_soc_unregister_codec(&twl4030->codec);
2337 kfree(twl4030->codec.reg_cache);
2340 twl4030_codec = NULL;
2344 MODULE_ALIAS("platform:twl4030_codec_audio");
2346 static struct platform_driver twl4030_codec_driver = {
2347 .probe = twl4030_codec_probe,
2348 .remove = __devexit_p(twl4030_codec_remove),
2350 .name = "twl4030_codec_audio",
2351 .owner = THIS_MODULE,
2355 static int __init twl4030_modinit(void)
2357 return platform_driver_register(&twl4030_codec_driver);
2359 module_init(twl4030_modinit);
2361 static void __exit twl4030_exit(void)
2363 platform_driver_unregister(&twl4030_codec_driver);
2365 module_exit(twl4030_exit);
2367 struct snd_soc_codec_device soc_codec_dev_twl4030 = {
2368 .probe = twl4030_soc_probe,
2369 .remove = twl4030_soc_remove,
2370 .suspend = twl4030_soc_suspend,
2371 .resume = twl4030_soc_resume,
2373 EXPORT_SYMBOL_GPL(soc_codec_dev_twl4030);
2375 MODULE_DESCRIPTION("ASoC TWL4030 codec driver");
2376 MODULE_AUTHOR("Steve Sakoman");
2377 MODULE_LICENSE("GPL");