2 * PCI Express Hot Plug Controller Driver
4 * Copyright (C) 1995,2001 Compaq Computer Corporation
5 * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
6 * Copyright (C) 2001 IBM Corp.
7 * Copyright (C) 2003-2004 Intel Corporation
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or (at
14 * your option) any later version.
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
19 * NON INFRINGEMENT. See the GNU General Public License for more
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
26 * Send feedback to <greg@kroah.com>, <kristen.c.accardi@intel.com>
32 #include <linux/types.h>
33 #include <linux/pci.h>
34 #include <linux/pci_hotplug.h>
35 #include <linux/delay.h>
36 #include <linux/sched.h> /* signal_pending() */
37 #include <linux/pcieport_if.h>
38 #include <linux/mutex.h>
40 #define MY_NAME "pciehp"
42 extern int pciehp_poll_mode;
43 extern int pciehp_poll_time;
44 extern int pciehp_debug;
45 extern int pciehp_force;
46 extern struct workqueue_struct *pciehp_wq;
48 #define dbg(format, arg...) \
51 printk(KERN_DEBUG "%s: " format, MY_NAME , ## arg); \
53 #define err(format, arg...) \
54 printk(KERN_ERR "%s: " format, MY_NAME , ## arg)
55 #define info(format, arg...) \
56 printk(KERN_INFO "%s: " format, MY_NAME , ## arg)
57 #define warn(format, arg...) \
58 printk(KERN_WARNING "%s: " format, MY_NAME , ## arg)
60 #define ctrl_dbg(ctrl, format, arg...) \
63 dev_printk(KERN_DEBUG, &ctrl->pcie->device, \
66 #define ctrl_err(ctrl, format, arg...) \
67 dev_err(&ctrl->pcie->device, format, ## arg)
68 #define ctrl_info(ctrl, format, arg...) \
69 dev_info(&ctrl->pcie->device, format, ## arg)
70 #define ctrl_warn(ctrl, format, arg...) \
71 dev_warn(&ctrl->pcie->device, format, ## arg)
73 #define SLOT_NAME_SIZE 10
80 struct controller *ctrl;
81 struct hpc_ops *hpc_ops;
82 struct hotplug_slot *hotplug_slot;
83 struct delayed_work work; /* work for button event */
90 struct work_struct work;
94 struct mutex crit_sect; /* critical section mutex */
95 struct mutex ctrl_lock; /* controller lock */
96 int slot_num_inc; /* 1 or -1 */
97 struct pci_dev *pci_dev;
98 struct pcie_device *pcie; /* PCI Express port service */
100 struct hpc_ops *hpc_ops;
101 wait_queue_head_t queue; /* sleep & wake process */
102 u8 slot_device_offset;
103 u32 first_slot; /* First physical slot number */ /* PCIE only has 1 slot */
104 u8 slot_bus; /* Bus where the slots handled by this controller sit */
107 struct timer_list poll_timer;
108 unsigned int cmd_busy:1;
109 unsigned int no_cmd_complete:1;
110 unsigned int link_active_reporting:1;
111 unsigned int notification_enabled:1;
112 unsigned int power_fault_detected;
115 #define INT_BUTTON_IGNORE 0
116 #define INT_PRESENCE_ON 1
117 #define INT_PRESENCE_OFF 2
118 #define INT_SWITCH_CLOSE 3
119 #define INT_SWITCH_OPEN 4
120 #define INT_POWER_FAULT 5
121 #define INT_POWER_FAULT_CLEAR 6
122 #define INT_BUTTON_PRESS 7
123 #define INT_BUTTON_RELEASE 8
124 #define INT_BUTTON_CANCEL 9
126 #define STATIC_STATE 0
127 #define BLINKINGON_STATE 1
128 #define BLINKINGOFF_STATE 2
129 #define POWERON_STATE 3
130 #define POWEROFF_STATE 4
133 #define INTERLOCK_OPEN 0x00000002
134 #define ADD_NOT_SUPPORTED 0x00000003
135 #define CARD_FUNCTIONING 0x00000005
136 #define ADAPTER_NOT_SAME 0x00000006
137 #define NO_ADAPTER_PRESENT 0x00000009
138 #define NOT_ENOUGH_RESOURCES 0x0000000B
139 #define DEVICE_TYPE_NOT_SUPPORTED 0x0000000C
140 #define WRONG_BUS_FREQUENCY 0x0000000D
141 #define POWER_FAILURE 0x0000000E
143 /* Field definitions in Slot Capabilities Register */
144 #define ATTN_BUTTN_PRSN 0x00000001
145 #define PWR_CTRL_PRSN 0x00000002
146 #define MRL_SENS_PRSN 0x00000004
147 #define ATTN_LED_PRSN 0x00000008
148 #define PWR_LED_PRSN 0x00000010
149 #define HP_SUPR_RM_SUP 0x00000020
150 #define EMI_PRSN 0x00020000
151 #define NO_CMD_CMPL_SUP 0x00040000
153 #define ATTN_BUTTN(ctrl) ((ctrl)->slot_cap & ATTN_BUTTN_PRSN)
154 #define POWER_CTRL(ctrl) ((ctrl)->slot_cap & PWR_CTRL_PRSN)
155 #define MRL_SENS(ctrl) ((ctrl)->slot_cap & MRL_SENS_PRSN)
156 #define ATTN_LED(ctrl) ((ctrl)->slot_cap & ATTN_LED_PRSN)
157 #define PWR_LED(ctrl) ((ctrl)->slot_cap & PWR_LED_PRSN)
158 #define HP_SUPR_RM(ctrl) ((ctrl)->slot_cap & HP_SUPR_RM_SUP)
159 #define EMI(ctrl) ((ctrl)->slot_cap & EMI_PRSN)
160 #define NO_CMD_CMPL(ctrl) ((ctrl)->slot_cap & NO_CMD_CMPL_SUP)
162 extern int pciehp_sysfs_enable_slot(struct slot *slot);
163 extern int pciehp_sysfs_disable_slot(struct slot *slot);
164 extern u8 pciehp_handle_attention_button(struct slot *p_slot);
165 extern u8 pciehp_handle_switch_change(struct slot *p_slot);
166 extern u8 pciehp_handle_presence_change(struct slot *p_slot);
167 extern u8 pciehp_handle_power_fault(struct slot *p_slot);
168 extern int pciehp_configure_device(struct slot *p_slot);
169 extern int pciehp_unconfigure_device(struct slot *p_slot);
170 extern void pciehp_queue_pushbutton_work(struct work_struct *work);
171 struct controller *pcie_init(struct pcie_device *dev);
172 int pcie_init_notification(struct controller *ctrl);
173 int pciehp_enable_slot(struct slot *p_slot);
174 int pciehp_disable_slot(struct slot *p_slot);
175 int pcie_enable_notification(struct controller *ctrl);
177 static inline const char *slot_name(struct slot *slot)
179 return hotplug_slot_name(slot->hotplug_slot);
183 int (*power_on_slot)(struct slot *slot);
184 int (*power_off_slot)(struct slot *slot);
185 int (*get_power_status)(struct slot *slot, u8 *status);
186 int (*get_attention_status)(struct slot *slot, u8 *status);
187 int (*set_attention_status)(struct slot *slot, u8 status);
188 int (*get_latch_status)(struct slot *slot, u8 *status);
189 int (*get_adapter_status)(struct slot *slot, u8 *status);
190 int (*get_max_bus_speed)(struct slot *slot, enum pci_bus_speed *speed);
191 int (*get_cur_bus_speed)(struct slot *slot, enum pci_bus_speed *speed);
192 int (*get_max_lnk_width)(struct slot *slot, enum pcie_link_width *val);
193 int (*get_cur_lnk_width)(struct slot *slot, enum pcie_link_width *val);
194 int (*query_power_fault)(struct slot *slot);
195 void (*green_led_on)(struct slot *slot);
196 void (*green_led_off)(struct slot *slot);
197 void (*green_led_blink)(struct slot *slot);
198 void (*release_ctlr)(struct controller *ctrl);
199 int (*check_lnk_status)(struct controller *ctrl);
203 #include <acpi/acpi.h>
204 #include <acpi/acpi_bus.h>
205 #include <linux/pci-acpi.h>
207 extern void __init pciehp_acpi_slot_detection_init(void);
208 extern int pciehp_acpi_slot_detection_check(struct pci_dev *dev);
210 static inline void pciehp_firmware_init(void)
212 pciehp_acpi_slot_detection_init();
215 static inline int pciehp_get_hp_hw_control_from_firmware(struct pci_dev *dev)
218 u32 flags = (OSC_PCI_EXPRESS_NATIVE_HP_CONTROL |
219 OSC_PCI_EXPRESS_CAP_STRUCTURE_CONTROL);
220 retval = acpi_get_hp_hw_control_from_firmware(dev, flags);
223 return pciehp_acpi_slot_detection_check(dev);
226 #define pciehp_firmware_init() do {} while (0)
227 #define pciehp_get_hp_hw_control_from_firmware(dev) 0
228 #endif /* CONFIG_ACPI */
229 #endif /* _PCIEHP_H */