]> rtime.felk.cvut.cz Git - linux-imx.git/blobdiff - drivers/gpu/drm/radeon/radeon_asic.c
drm/radeon: use CP DMA on r6xx for bo moves
[linux-imx.git] / drivers / gpu / drm / radeon / radeon_asic.c
index 4ca134bef689905d449c2d2d2e6264699c3ab4c0..fea997e247ba0e1de7d88515f9a45a6f93dd8adc 100644 (file)
@@ -1026,8 +1026,8 @@ static struct radeon_asic r600_asic = {
                .blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
                .dma = &r600_copy_dma,
                .dma_ring_index = R600_RING_TYPE_DMA_INDEX,
-               .copy = &r600_copy_dma,
-               .copy_ring_index = R600_RING_TYPE_DMA_INDEX,
+               .copy = &r600_copy_cpdma,
+               .copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
        },
        .surface = {
                .set_reg = r600_set_surface_reg,
@@ -1119,8 +1119,8 @@ static struct radeon_asic rv6xx_asic = {
                .blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
                .dma = &r600_copy_dma,
                .dma_ring_index = R600_RING_TYPE_DMA_INDEX,
-               .copy = &r600_copy_dma,
-               .copy_ring_index = R600_RING_TYPE_DMA_INDEX,
+               .copy = &r600_copy_cpdma,
+               .copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
        },
        .surface = {
                .set_reg = r600_set_surface_reg,
@@ -1152,12 +1152,15 @@ static struct radeon_asic rv6xx_asic = {
                .setup_asic = &rv6xx_setup_asic,
                .enable = &rv6xx_dpm_enable,
                .disable = &rv6xx_dpm_disable,
+               .pre_set_power_state = &r600_dpm_pre_set_power_state,
                .set_power_state = &rv6xx_dpm_set_power_state,
+               .post_set_power_state = &r600_dpm_post_set_power_state,
                .display_configuration_changed = &rv6xx_dpm_display_configuration_changed,
                .fini = &rv6xx_dpm_fini,
                .get_sclk = &rv6xx_dpm_get_sclk,
                .get_mclk = &rv6xx_dpm_get_mclk,
                .print_power_state = &rv6xx_dpm_print_power_state,
+               .debugfs_print_current_performance_level = &rv6xx_dpm_debugfs_print_current_performance_level,
        },
        .pflip = {
                .pre_page_flip = &rs600_pre_page_flip,
@@ -1226,8 +1229,8 @@ static struct radeon_asic rs780_asic = {
                .blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
                .dma = &r600_copy_dma,
                .dma_ring_index = R600_RING_TYPE_DMA_INDEX,
-               .copy = &r600_copy_dma,
-               .copy_ring_index = R600_RING_TYPE_DMA_INDEX,
+               .copy = &r600_copy_cpdma,
+               .copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
        },
        .surface = {
                .set_reg = r600_set_surface_reg,
@@ -1259,7 +1262,9 @@ static struct radeon_asic rs780_asic = {
                .setup_asic = &rs780_dpm_setup_asic,
                .enable = &rs780_dpm_enable,
                .disable = &rs780_dpm_disable,
+               .pre_set_power_state = &r600_dpm_pre_set_power_state,
                .set_power_state = &rs780_dpm_set_power_state,
+               .post_set_power_state = &r600_dpm_post_set_power_state,
                .display_configuration_changed = &rs780_dpm_display_configuration_changed,
                .fini = &rs780_dpm_fini,
                .get_sclk = &rs780_dpm_get_sclk,
@@ -1379,12 +1384,17 @@ static struct radeon_asic rv770_asic = {
                .setup_asic = &rv770_dpm_setup_asic,
                .enable = &rv770_dpm_enable,
                .disable = &rv770_dpm_disable,
+               .pre_set_power_state = &r600_dpm_pre_set_power_state,
                .set_power_state = &rv770_dpm_set_power_state,
+               .post_set_power_state = &r600_dpm_post_set_power_state,
                .display_configuration_changed = &rv770_dpm_display_configuration_changed,
                .fini = &rv770_dpm_fini,
                .get_sclk = &rv770_dpm_get_sclk,
                .get_mclk = &rv770_dpm_get_mclk,
                .print_power_state = &rv770_dpm_print_power_state,
+               .debugfs_print_current_performance_level = &rv770_dpm_debugfs_print_current_performance_level,
+               .force_performance_level = &rv770_dpm_force_performance_level,
+               .vblank_too_short = &rv770_dpm_vblank_too_short,
        },
        .pflip = {
                .pre_page_flip = &rs600_pre_page_flip,
@@ -1499,12 +1509,17 @@ static struct radeon_asic evergreen_asic = {
                .setup_asic = &cypress_dpm_setup_asic,
                .enable = &cypress_dpm_enable,
                .disable = &cypress_dpm_disable,
+               .pre_set_power_state = &r600_dpm_pre_set_power_state,
                .set_power_state = &cypress_dpm_set_power_state,
+               .post_set_power_state = &r600_dpm_post_set_power_state,
                .display_configuration_changed = &cypress_dpm_display_configuration_changed,
                .fini = &cypress_dpm_fini,
                .get_sclk = &rv770_dpm_get_sclk,
                .get_mclk = &rv770_dpm_get_mclk,
                .print_power_state = &rv770_dpm_print_power_state,
+               .debugfs_print_current_performance_level = &rv770_dpm_debugfs_print_current_performance_level,
+               .force_performance_level = &rv770_dpm_force_performance_level,
+               .vblank_too_short = &cypress_dpm_vblank_too_short,
        },
        .pflip = {
                .pre_page_flip = &evergreen_pre_page_flip,
@@ -1614,6 +1629,22 @@ static struct radeon_asic sumo_asic = {
                .set_uvd_clocks = &sumo_set_uvd_clocks,
                .get_temperature = &sumo_get_temp,
        },
+       .dpm = {
+               .init = &sumo_dpm_init,
+               .setup_asic = &sumo_dpm_setup_asic,
+               .enable = &sumo_dpm_enable,
+               .disable = &sumo_dpm_disable,
+               .pre_set_power_state = &sumo_dpm_pre_set_power_state,
+               .set_power_state = &sumo_dpm_set_power_state,
+               .post_set_power_state = &sumo_dpm_post_set_power_state,
+               .display_configuration_changed = &sumo_dpm_display_configuration_changed,
+               .fini = &sumo_dpm_fini,
+               .get_sclk = &sumo_dpm_get_sclk,
+               .get_mclk = &sumo_dpm_get_mclk,
+               .print_power_state = &sumo_dpm_print_power_state,
+               .debugfs_print_current_performance_level = &sumo_dpm_debugfs_print_current_performance_level,
+               .force_performance_level = &sumo_dpm_force_performance_level,
+       },
        .pflip = {
                .pre_page_flip = &evergreen_pre_page_flip,
                .page_flip = &evergreen_page_flip,
@@ -1722,6 +1753,23 @@ static struct radeon_asic btc_asic = {
                .set_uvd_clocks = &evergreen_set_uvd_clocks,
                .get_temperature = &evergreen_get_temp,
        },
+       .dpm = {
+               .init = &btc_dpm_init,
+               .setup_asic = &btc_dpm_setup_asic,
+               .enable = &btc_dpm_enable,
+               .disable = &btc_dpm_disable,
+               .pre_set_power_state = &btc_dpm_pre_set_power_state,
+               .set_power_state = &btc_dpm_set_power_state,
+               .post_set_power_state = &btc_dpm_post_set_power_state,
+               .display_configuration_changed = &cypress_dpm_display_configuration_changed,
+               .fini = &btc_dpm_fini,
+               .get_sclk = &btc_dpm_get_sclk,
+               .get_mclk = &btc_dpm_get_mclk,
+               .print_power_state = &rv770_dpm_print_power_state,
+               .debugfs_print_current_performance_level = &rv770_dpm_debugfs_print_current_performance_level,
+               .force_performance_level = &rv770_dpm_force_performance_level,
+               .vblank_too_short = &btc_dpm_vblank_too_short,
+       },
        .pflip = {
                .pre_page_flip = &evergreen_pre_page_flip,
                .page_flip = &evergreen_page_flip,
@@ -1882,6 +1930,23 @@ static struct radeon_asic cayman_asic = {
                .set_uvd_clocks = &evergreen_set_uvd_clocks,
                .get_temperature = &evergreen_get_temp,
        },
+       .dpm = {
+               .init = &ni_dpm_init,
+               .setup_asic = &ni_dpm_setup_asic,
+               .enable = &ni_dpm_enable,
+               .disable = &ni_dpm_disable,
+               .pre_set_power_state = &ni_dpm_pre_set_power_state,
+               .set_power_state = &ni_dpm_set_power_state,
+               .post_set_power_state = &ni_dpm_post_set_power_state,
+               .display_configuration_changed = &cypress_dpm_display_configuration_changed,
+               .fini = &ni_dpm_fini,
+               .get_sclk = &ni_dpm_get_sclk,
+               .get_mclk = &ni_dpm_get_mclk,
+               .print_power_state = &ni_dpm_print_power_state,
+               .debugfs_print_current_performance_level = &ni_dpm_debugfs_print_current_performance_level,
+               .force_performance_level = &ni_dpm_force_performance_level,
+               .vblank_too_short = &ni_dpm_vblank_too_short,
+       },
        .pflip = {
                .pre_page_flip = &evergreen_pre_page_flip,
                .page_flip = &evergreen_page_flip,
@@ -2040,6 +2105,22 @@ static struct radeon_asic trinity_asic = {
                .set_uvd_clocks = &sumo_set_uvd_clocks,
                .get_temperature = &tn_get_temp,
        },
+       .dpm = {
+               .init = &trinity_dpm_init,
+               .setup_asic = &trinity_dpm_setup_asic,
+               .enable = &trinity_dpm_enable,
+               .disable = &trinity_dpm_disable,
+               .pre_set_power_state = &trinity_dpm_pre_set_power_state,
+               .set_power_state = &trinity_dpm_set_power_state,
+               .post_set_power_state = &trinity_dpm_post_set_power_state,
+               .display_configuration_changed = &trinity_dpm_display_configuration_changed,
+               .fini = &trinity_dpm_fini,
+               .get_sclk = &trinity_dpm_get_sclk,
+               .get_mclk = &trinity_dpm_get_mclk,
+               .print_power_state = &trinity_dpm_print_power_state,
+               .debugfs_print_current_performance_level = &trinity_dpm_debugfs_print_current_performance_level,
+               .force_performance_level = &trinity_dpm_force_performance_level,
+       },
        .pflip = {
                .pre_page_flip = &evergreen_pre_page_flip,
                .page_flip = &evergreen_page_flip,
@@ -2198,6 +2279,23 @@ static struct radeon_asic si_asic = {
                .set_uvd_clocks = &si_set_uvd_clocks,
                .get_temperature = &si_get_temp,
        },
+       .dpm = {
+               .init = &si_dpm_init,
+               .setup_asic = &si_dpm_setup_asic,
+               .enable = &si_dpm_enable,
+               .disable = &si_dpm_disable,
+               .pre_set_power_state = &si_dpm_pre_set_power_state,
+               .set_power_state = &si_dpm_set_power_state,
+               .post_set_power_state = &si_dpm_post_set_power_state,
+               .display_configuration_changed = &si_dpm_display_configuration_changed,
+               .fini = &si_dpm_fini,
+               .get_sclk = &ni_dpm_get_sclk,
+               .get_mclk = &ni_dpm_get_mclk,
+               .print_power_state = &ni_dpm_print_power_state,
+               .debugfs_print_current_performance_level = &si_dpm_debugfs_print_current_performance_level,
+               .force_performance_level = &si_dpm_force_performance_level,
+               .vblank_too_short = &ni_dpm_vblank_too_short,
+       },
        .pflip = {
                .pre_page_flip = &evergreen_pre_page_flip,
                .page_flip = &evergreen_page_flip,