drivers/gpu/drm/i915/intel_sdvo.c

   1 /*
   2  * Copyright 2006 Dave Airlie <airlied@linux.ie>
   3  * Copyright © 2006-2007 Intel Corporation
   4  *   Jesse Barnes <jesse.barnes@intel.com>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  22  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  23  * DEALINGS IN THE SOFTWARE.
  24  *
  25  * Authors:
  26  *      Eric Anholt <eric@anholt.net>
  27  */
  28 #include <linux/i2c.h>
  29 #include <linux/slab.h>
  30 #include <linux/delay.h>
  31 #include <linux/export.h>
  32 #include <drm/drmP.h>
  33 #include <drm/drm_crtc.h>
  34 #include <drm/drm_edid.h>
  35 #include "intel_drv.h"
  36 #include <drm/i915_drm.h>
  37 #include "i915_drv.h"
  38 #include "intel_sdvo_regs.h"
  39
  40 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
  41 #define SDVO_RGB_MASK  (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
  42 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
  43 #define SDVO_TV_MASK   (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
  44
  45 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
  46                         SDVO_TV_MASK)
  47
  48 #define IS_TV(c)        (c->output_flag & SDVO_TV_MASK)
  49 #define IS_TMDS(c)      (c->output_flag & SDVO_TMDS_MASK)
  50 #define IS_LVDS(c)      (c->output_flag & SDVO_LVDS_MASK)
  51 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
  52 #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
  53
  54
  55 static const char *tv_format_names[] = {
  56         "NTSC_M"   , "NTSC_J"  , "NTSC_443",
  57         "PAL_B"    , "PAL_D"   , "PAL_G"   ,
  58         "PAL_H"    , "PAL_I"   , "PAL_M"   ,
  59         "PAL_N"    , "PAL_NC"  , "PAL_60"  ,
  60         "SECAM_B"  , "SECAM_D" , "SECAM_G" ,
  61         "SECAM_K"  , "SECAM_K1", "SECAM_L" ,
  62         "SECAM_60"
  63 };
  64
  65 #define TV_FORMAT_NUM  (sizeof(tv_format_names) / sizeof(*tv_format_names))
  66
  67 struct intel_sdvo {
  68         struct intel_encoder base;
  69
  70         struct i2c_adapter *i2c;
  71         u8 slave_addr;
  72
  73         struct i2c_adapter ddc;
  74
  75         /* Register for the SDVO device: SDVOB or SDVOC */
  76         uint32_t sdvo_reg;
  77
  78         /* Active outputs controlled by this SDVO output */
  79         uint16_t controlled_output;
  80
  81         /*
  82          * Capabilities of the SDVO device returned by
  83          * i830_sdvo_get_capabilities()
  84          */
  85         struct intel_sdvo_caps caps;
  86
  87         /* Pixel clock limitations reported by the SDVO device, in kHz */
  88         int pixel_clock_min, pixel_clock_max;
  89
  90         /*
  91         * For multiple function SDVO device,
  92         * this is for current attached outputs.
  93         */
  94         uint16_t attached_output;
  95
  96         /*
  97          * Hotplug activation bits for this device
  98          */
  99         uint16_t hotplug_active;
 100
 101         /**
 102          * This is used to select the color range of RBG outputs in HDMI mode.
 103          * It is only valid when using TMDS encoding and 8 bit per color mode.
 104          */
 105         uint32_t color_range;
 106         bool color_range_auto;
 107
 108         /**
 109          * This is set if we're going to treat the device as TV-out.
 110          *
 111          * While we have these nice friendly flags for output types that ought
 112          * to decide this for us, the S-Video output on our HDMI+S-Video card
 113          * shows up as RGB1 (VGA).
 114          */
 115         bool is_tv;
 116
 117         /* On different gens SDVOB is at different places. */
 118         bool is_sdvob;
 119
 120         /* This is for current tv format name */
 121         int tv_format_index;
 122
 123         /**
 124          * This is set if we treat the device as HDMI, instead of DVI.
 125          */
 126         bool is_hdmi;
 127         bool has_hdmi_monitor;
 128         bool has_hdmi_audio;
 129         bool rgb_quant_range_selectable;
 130
 131         /**
 132          * This is set if we detect output of sdvo device as LVDS and
 133          * have a valid fixed mode to use with the panel.
 134          */
 135         bool is_lvds;
 136
 137         /**
 138          * This is sdvo fixed pannel mode pointer
 139          */
 140         struct drm_display_mode *sdvo_lvds_fixed_mode;
 141
 142         /* DDC bus used by this SDVO encoder */
 143         uint8_t ddc_bus;
 144
 145         /*
 146          * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd
 147          */
 148         uint8_t dtd_sdvo_flags;
 149 };
 150
 151 struct intel_sdvo_connector {
 152         struct intel_connector base;
 153
 154         /* Mark the type of connector */
 155         uint16_t output_flag;
 156
 157         enum hdmi_force_audio force_audio;
 158
 159         /* This contains all current supported TV format */
 160         u8 tv_format_supported[TV_FORMAT_NUM];
 161         int   format_supported_num;
 162         struct drm_property *tv_format;
 163
 164         /* add the property for the SDVO-TV */
 165         struct drm_property *left;
 166         struct drm_property *right;
 167         struct drm_property *top;
 168         struct drm_property *bottom;
 169         struct drm_property *hpos;
 170         struct drm_property *vpos;
 171         struct drm_property *contrast;
 172         struct drm_property *saturation;
 173         struct drm_property *hue;
 174         struct drm_property *sharpness;
 175         struct drm_property *flicker_filter;
 176         struct drm_property *flicker_filter_adaptive;
 177         struct drm_property *flicker_filter_2d;
 178         struct drm_property *tv_chroma_filter;
 179         struct drm_property *tv_luma_filter;
 180         struct drm_property *dot_crawl;
 181
 182         /* add the property for the SDVO-TV/LVDS */
 183         struct drm_property *brightness;
 184
 185         /* Add variable to record current setting for the above property */
 186         u32     left_margin, right_margin, top_margin, bottom_margin;
 187
 188         /* this is to get the range of margin.*/
 189         u32     max_hscan,  max_vscan;
 190         u32     max_hpos, cur_hpos;
 191         u32     max_vpos, cur_vpos;
 192         u32     cur_brightness, max_brightness;
 193         u32     cur_contrast,   max_contrast;
 194         u32     cur_saturation, max_saturation;
 195         u32     cur_hue,        max_hue;
 196         u32     cur_sharpness,  max_sharpness;
 197         u32     cur_flicker_filter,             max_flicker_filter;
 198         u32     cur_flicker_filter_adaptive,    max_flicker_filter_adaptive;
 199         u32     cur_flicker_filter_2d,          max_flicker_filter_2d;
 200         u32     cur_tv_chroma_filter,   max_tv_chroma_filter;
 201         u32     cur_tv_luma_filter,     max_tv_luma_filter;
 202         u32     cur_dot_crawl,  max_dot_crawl;
 203 };
 204
 205 static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
 206 {
 207         return container_of(encoder, struct intel_sdvo, base.base);
 208 }
 209
 210 static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
 211 {
 212         return container_of(intel_attached_encoder(connector),
 213                             struct intel_sdvo, base);
 214 }
 215
 216 static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
 217 {
 218         return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
 219 }
 220
 221 static bool
 222 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
 223 static bool
 224 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
 225                               struct intel_sdvo_connector *intel_sdvo_connector,
 226                               int type);
 227 static bool
 228 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
 229                                    struct intel_sdvo_connector *intel_sdvo_connector);
 230
 231 /**
 232  * Writes the SDVOB or SDVOC with the given value, but always writes both
 233  * SDVOB and SDVOC to work around apparent hardware issues (according to
 234  * comments in the BIOS).
 235  */
 236 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
 237 {
 238         struct drm_device *dev = intel_sdvo->base.base.dev;
 239         struct drm_i915_private *dev_priv = dev->dev_private;
 240         u32 bval = val, cval = val;
 241         int i;
 242
 243         if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
 244                 I915_WRITE(intel_sdvo->sdvo_reg, val);
 245                 I915_READ(intel_sdvo->sdvo_reg);
 246                 return;
 247         }
 248
 249         if (intel_sdvo->sdvo_reg == GEN3_SDVOB)
 250                 cval = I915_READ(GEN3_SDVOC);
 251         else
 252                 bval = I915_READ(GEN3_SDVOB);
 253
 254         /*
 255          * Write the registers twice for luck. Sometimes,
 256          * writing them only once doesn't appear to 'stick'.
 257          * The BIOS does this too. Yay, magic
 258          */
 259         for (i = 0; i < 2; i++)
 260         {
 261                 I915_WRITE(GEN3_SDVOB, bval);
 262                 I915_READ(GEN3_SDVOB);
 263                 I915_WRITE(GEN3_SDVOC, cval);
 264                 I915_READ(GEN3_SDVOC);
 265         }
 266 }
 267
 268 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
 269 {
 270         struct i2c_msg msgs[] = {
 271                 {
 272                         .addr = intel_sdvo->slave_addr,
 273                         .flags = 0,
 274                         .len = 1,
 275                         .buf = &addr,
 276                 },
 277                 {
 278                         .addr = intel_sdvo->slave_addr,
 279                         .flags = I2C_M_RD,
 280                         .len = 1,
 281                         .buf = ch,
 282                 }
 283         };
 284         int ret;
 285
 286         if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
 287                 return true;
 288
 289         DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
 290         return false;
 291 }
 292
 293 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
 294 /** Mapping of command numbers to names, for debug output */
 295 static const struct _sdvo_cmd_name {
 296         u8 cmd;
 297         const char *name;
 298 } sdvo_cmd_names[] = {
 299         SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
 300         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
 301         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
 302         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
 303         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
 304         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
 305         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
 306         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
 307         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
 308         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
 309         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
 310         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
 311         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
 312         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
 313         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
 314         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
 315         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
 316         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
 317         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
 318         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
 319         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
 320         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
 321         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
 322         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
 323         SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
 324         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
 325         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
 326         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
 327         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
 328         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
 329         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
 330         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
 331         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
 332         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
 333         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
 334         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
 335         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
 336         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
 337         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
 338         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
 339         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
 340         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
 341         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
 342
 343         /* Add the op code for SDVO enhancements */
 344         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
 345         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
 346         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
 347         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
 348         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
 349         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
 350         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
 351         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
 352         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
 353         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
 354         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
 355         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
 356         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
 357         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
 358         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
 359         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
 360         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
 361         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
 362         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
 363         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
 364         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
 365         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
 366         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
 367         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
 368         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
 369         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
 370         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
 371         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
 372         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
 373         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
 374         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
 375         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
 376         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
 377         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
 378         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
 379         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
 380         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
 381         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
 382         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
 383         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
 384         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
 385         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
 386         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
 387         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
 388
 389         /* HDMI op code */
 390         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
 391         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
 392         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
 393         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
 394         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
 395         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
 396         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
 397         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
 398         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
 399         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
 400         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
 401         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
 402         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
 403         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
 404         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
 405         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
 406         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
 407         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
 408         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
 409         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
 410 };
 411
 412 #define SDVO_NAME(svdo) ((svdo)->is_sdvob ? "SDVOB" : "SDVOC")
 413
 414 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
 415                                    const void *args, int args_len)
 416 {
 417         int i;
 418
 419         DRM_DEBUG_KMS("%s: W: %02X ",
 420                                 SDVO_NAME(intel_sdvo), cmd);
 421         for (i = 0; i < args_len; i++)
 422                 DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
 423         for (; i < 8; i++)
 424                 DRM_LOG_KMS("   ");
 425         for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
 426                 if (cmd == sdvo_cmd_names[i].cmd) {
 427                         DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
 428                         break;
 429                 }
 430         }
 431         if (i == ARRAY_SIZE(sdvo_cmd_names))
 432                 DRM_LOG_KMS("(%02X)", cmd);
 433         DRM_LOG_KMS("\n");
 434 }
 435
 436 static const char *cmd_status_names[] = {
 437         "Power on",
 438         "Success",
 439         "Not supported",
 440         "Invalid arg",
 441         "Pending",
 442         "Target not specified",
 443         "Scaling not supported"
 444 };
 445
 446 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
 447                                  const void *args, int args_len)
 448 {
 449         u8 *buf, status;
 450         struct i2c_msg *msgs;
 451         int i, ret = true;
 452
 453         /* Would be simpler to allocate both in one go ? */
 454         buf = kzalloc(args_len * 2 + 2, GFP_KERNEL);
 455         if (!buf)
 456                 return false;
 457
 458         msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL);
 459         if (!msgs) {
 460                 kfree(buf);
 461                 return false;
 462         }
 463
 464         intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
 465
 466         for (i = 0; i < args_len; i++) {
 467                 msgs[i].addr = intel_sdvo->slave_addr;
 468                 msgs[i].flags = 0;
 469                 msgs[i].len = 2;
 470                 msgs[i].buf = buf + 2 *i;
 471                 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
 472                 buf[2*i + 1] = ((u8*)args)[i];
 473         }
 474         msgs[i].addr = intel_sdvo->slave_addr;
 475         msgs[i].flags = 0;
 476         msgs[i].len = 2;
 477         msgs[i].buf = buf + 2*i;
 478         buf[2*i + 0] = SDVO_I2C_OPCODE;
 479         buf[2*i + 1] = cmd;
 480
 481         /* the following two are to read the response */
 482         status = SDVO_I2C_CMD_STATUS;
 483         msgs[i+1].addr = intel_sdvo->slave_addr;
 484         msgs[i+1].flags = 0;
 485         msgs[i+1].len = 1;
 486         msgs[i+1].buf = &status;
 487
 488         msgs[i+2].addr = intel_sdvo->slave_addr;
 489         msgs[i+2].flags = I2C_M_RD;
 490         msgs[i+2].len = 1;
 491         msgs[i+2].buf = &status;
 492
 493         ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
 494         if (ret < 0) {
 495                 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
 496                 ret = false;
 497                 goto out;
 498         }
 499         if (ret != i+3) {
 500                 /* failure in I2C transfer */
 501                 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
 502                 ret = false;
 503         }
 504
 505 out:
 506         kfree(msgs);
 507         kfree(buf);
 508         return ret;
 509 }
 510
 511 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
 512                                      void *response, int response_len)
 513 {
 514         u8 retry = 15; /* 5 quick checks, followed by 10 long checks */
 515         u8 status;
 516         int i;
 517
 518         DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
 519
 520         /*
 521          * The documentation states that all commands will be
 522          * processed within 15µs, and that we need only poll
 523          * the status byte a maximum of 3 times in order for the
 524          * command to be complete.
 525          *
 526          * Check 5 times in case the hardware failed to read the docs.
 527          *
 528          * Also beware that the first response by many devices is to
 529          * reply PENDING and stall for time. TVs are notorious for
 530          * requiring longer than specified to complete their replies.
 531          * Originally (in the DDX long ago), the delay was only ever 15ms
 532          * with an additional delay of 30ms applied for TVs added later after
 533          * many experiments. To accommodate both sets of delays, we do a
 534          * sequence of slow checks if the device is falling behind and fails
 535          * to reply within 5*15µs.
 536          */
 537         if (!intel_sdvo_read_byte(intel_sdvo,
 538                                   SDVO_I2C_CMD_STATUS,
 539                                   &status))
 540                 goto log_fail;
 541
 542         while (status == SDVO_CMD_STATUS_PENDING && --retry) {
 543                 if (retry < 10)
 544                         msleep(15);
 545                 else
 546                         udelay(15);
 547
 548                 if (!intel_sdvo_read_byte(intel_sdvo,
 549                                           SDVO_I2C_CMD_STATUS,
 550                                           &status))
 551                         goto log_fail;
 552         }
 553
 554         if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
 555                 DRM_LOG_KMS("(%s)", cmd_status_names[status]);
 556         else
 557                 DRM_LOG_KMS("(??? %d)", status);
 558
 559         if (status != SDVO_CMD_STATUS_SUCCESS)
 560                 goto log_fail;
 561
 562         /* Read the command response */
 563         for (i = 0; i < response_len; i++) {
 564                 if (!intel_sdvo_read_byte(intel_sdvo,
 565                                           SDVO_I2C_RETURN_0 + i,
 566                                           &((u8 *)response)[i]))
 567                         goto log_fail;
 568                 DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
 569         }
 570         DRM_LOG_KMS("\n");
 571         return true;
 572
 573 log_fail:
 574         DRM_LOG_KMS("... failed\n");
 575         return false;
 576 }
 577
 578 static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
 579 {
 580         if (mode->clock >= 100000)
 581                 return 1;
 582         else if (mode->clock >= 50000)
 583                 return 2;
 584         else
 585                 return 4;
 586 }
 587
 588 static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
 589                                               u8 ddc_bus)
 590 {
 591         /* This must be the immediately preceding write before the i2c xfer */
 592         return intel_sdvo_write_cmd(intel_sdvo,
 593                                     SDVO_CMD_SET_CONTROL_BUS_SWITCH,
 594                                     &ddc_bus, 1);
 595 }
 596
 597 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
 598 {
 599         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
 600                 return false;
 601
 602         return intel_sdvo_read_response(intel_sdvo, NULL, 0);
 603 }
 604
 605 static bool
 606 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
 607 {
 608         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
 609                 return false;
 610
 611         return intel_sdvo_read_response(intel_sdvo, value, len);
 612 }
 613
 614 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
 615 {
 616         struct intel_sdvo_set_target_input_args targets = {0};
 617         return intel_sdvo_set_value(intel_sdvo,
 618                                     SDVO_CMD_SET_TARGET_INPUT,
 619                                     &targets, sizeof(targets));
 620 }
 621
 622 /**
 623  * Return whether each input is trained.
 624  *
 625  * This function is making an assumption about the layout of the response,
 626  * which should be checked against the docs.
 627  */
 628 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
 629 {
 630         struct intel_sdvo_get_trained_inputs_response response;
 631
 632         BUILD_BUG_ON(sizeof(response) != 1);
 633         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
 634                                   &response, sizeof(response)))
 635                 return false;
 636
 637         *input_1 = response.input0_trained;
 638         *input_2 = response.input1_trained;
 639         return true;
 640 }
 641
 642 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
 643                                           u16 outputs)
 644 {
 645         return intel_sdvo_set_value(intel_sdvo,
 646                                     SDVO_CMD_SET_ACTIVE_OUTPUTS,
 647                                     &outputs, sizeof(outputs));
 648 }
 649
 650 static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo,
 651                                           u16 *outputs)
 652 {
 653         return intel_sdvo_get_value(intel_sdvo,
 654                                     SDVO_CMD_GET_ACTIVE_OUTPUTS,
 655                                     outputs, sizeof(*outputs));
 656 }
 657
 658 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
 659                                                int mode)
 660 {
 661         u8 state = SDVO_ENCODER_STATE_ON;
 662
 663         switch (mode) {
 664         case DRM_MODE_DPMS_ON:
 665                 state = SDVO_ENCODER_STATE_ON;
 666                 break;
 667         case DRM_MODE_DPMS_STANDBY:
 668                 state = SDVO_ENCODER_STATE_STANDBY;
 669                 break;
 670         case DRM_MODE_DPMS_SUSPEND:
 671                 state = SDVO_ENCODER_STATE_SUSPEND;
 672                 break;
 673         case DRM_MODE_DPMS_OFF:
 674                 state = SDVO_ENCODER_STATE_OFF;
 675                 break;
 676         }
 677
 678         return intel_sdvo_set_value(intel_sdvo,
 679                                     SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
 680 }
 681
 682 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
 683                                                    int *clock_min,
 684                                                    int *clock_max)
 685 {
 686         struct intel_sdvo_pixel_clock_range clocks;
 687
 688         BUILD_BUG_ON(sizeof(clocks) != 4);
 689         if (!intel_sdvo_get_value(intel_sdvo,
 690                                   SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
 691                                   &clocks, sizeof(clocks)))
 692                 return false;
 693
 694         /* Convert the values from units of 10 kHz to kHz. */
 695         *clock_min = clocks.min * 10;
 696         *clock_max = clocks.max * 10;
 697         return true;
 698 }
 699
 700 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
 701                                          u16 outputs)
 702 {
 703         return intel_sdvo_set_value(intel_sdvo,
 704                                     SDVO_CMD_SET_TARGET_OUTPUT,
 705                                     &outputs, sizeof(outputs));
 706 }
 707
 708 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
 709                                   struct intel_sdvo_dtd *dtd)
 710 {
 711         return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
 712                 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
 713 }
 714
 715 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
 716                                          struct intel_sdvo_dtd *dtd)
 717 {
 718         return intel_sdvo_set_timing(intel_sdvo,
 719                                      SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
 720 }
 721
 722 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
 723                                          struct intel_sdvo_dtd *dtd)
 724 {
 725         return intel_sdvo_set_timing(intel_sdvo,
 726                                      SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
 727 }
 728
 729 static bool
 730 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
 731                                          uint16_t clock,
 732                                          uint16_t width,
 733                                          uint16_t height)
 734 {
 735         struct intel_sdvo_preferred_input_timing_args args;
 736
 737         memset(&args, 0, sizeof(args));
 738         args.clock = clock;
 739         args.width = width;
 740         args.height = height;
 741         args.interlace = 0;
 742
 743         if (intel_sdvo->is_lvds &&
 744            (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
 745             intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
 746                 args.scaled = 1;
 747
 748         return intel_sdvo_set_value(intel_sdvo,
 749                                     SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
 750                                     &args, sizeof(args));
 751 }
 752
 753 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
 754                                                   struct intel_sdvo_dtd *dtd)
 755 {
 756         BUILD_BUG_ON(sizeof(dtd->part1) != 8);
 757         BUILD_BUG_ON(sizeof(dtd->part2) != 8);
 758         return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
 759                                     &dtd->part1, sizeof(dtd->part1)) &&
 760                 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
 761                                      &dtd->part2, sizeof(dtd->part2));
 762 }
 763
 764 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
 765 {
 766         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
 767 }
 768
 769 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
 770                                          const struct drm_display_mode *mode)
 771 {
 772         uint16_t width, height;
 773         uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
 774         uint16_t h_sync_offset, v_sync_offset;
 775         int mode_clock;
 776
 777         width = mode->hdisplay;
 778         height = mode->vdisplay;
 779
 780         /* do some mode translations */
 781         h_blank_len = mode->htotal - mode->hdisplay;
 782         h_sync_len = mode->hsync_end - mode->hsync_start;
 783
 784         v_blank_len = mode->vtotal - mode->vdisplay;
 785         v_sync_len = mode->vsync_end - mode->vsync_start;
 786
 787         h_sync_offset = mode->hsync_start - mode->hdisplay;
 788         v_sync_offset = mode->vsync_start - mode->vdisplay;
 789
 790         mode_clock = mode->clock;
 791         mode_clock /= 10;
 792         dtd->part1.clock = mode_clock;
 793
 794         dtd->part1.h_active = width & 0xff;
 795         dtd->part1.h_blank = h_blank_len & 0xff;
 796         dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
 797                 ((h_blank_len >> 8) & 0xf);
 798         dtd->part1.v_active = height & 0xff;
 799         dtd->part1.v_blank = v_blank_len & 0xff;
 800         dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
 801                 ((v_blank_len >> 8) & 0xf);
 802
 803         dtd->part2.h_sync_off = h_sync_offset & 0xff;
 804         dtd->part2.h_sync_width = h_sync_len & 0xff;
 805         dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
 806                 (v_sync_len & 0xf);
 807         dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
 808                 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
 809                 ((v_sync_len & 0x30) >> 4);
 810
 811         dtd->part2.dtd_flags = 0x18;
 812         if (mode->flags & DRM_MODE_FLAG_INTERLACE)
 813                 dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE;
 814         if (mode->flags & DRM_MODE_FLAG_PHSYNC)
 815                 dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE;
 816         if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 817                 dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE;
 818
 819         dtd->part2.sdvo_flags = 0;
 820         dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
 821         dtd->part2.reserved = 0;
 822 }
 823
 824 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
 825                                          const struct intel_sdvo_dtd *dtd)
 826 {
 827         mode->hdisplay = dtd->part1.h_active;
 828         mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
 829         mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
 830         mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
 831         mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
 832         mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
 833         mode->htotal = mode->hdisplay + dtd->part1.h_blank;
 834         mode->htotal += (dtd->part1.h_high & 0xf) << 8;
 835
 836         mode->vdisplay = dtd->part1.v_active;
 837         mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
 838         mode->vsync_start = mode->vdisplay;
 839         mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
 840         mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
 841         mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
 842         mode->vsync_end = mode->vsync_start +
 843                 (dtd->part2.v_sync_off_width & 0xf);
 844         mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
 845         mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
 846         mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
 847
 848         mode->clock = dtd->part1.clock * 10;
 849
 850         mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
 851         if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE)
 852                 mode->flags |= DRM_MODE_FLAG_INTERLACE;
 853         if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
 854                 mode->flags |= DRM_MODE_FLAG_PHSYNC;
 855         if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
 856                 mode->flags |= DRM_MODE_FLAG_PVSYNC;
 857 }
 858
 859 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
 860 {
 861         struct intel_sdvo_encode encode;
 862
 863         BUILD_BUG_ON(sizeof(encode) != 2);
 864         return intel_sdvo_get_value(intel_sdvo,
 865                                   SDVO_CMD_GET_SUPP_ENCODE,
 866                                   &encode, sizeof(encode));
 867 }
 868
 869 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
 870                                   uint8_t mode)
 871 {
 872         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
 873 }
 874
 875 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
 876                                        uint8_t mode)
 877 {
 878         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
 879 }
 880
 881 #if 0
 882 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
 883 {
 884         int i, j;
 885         uint8_t set_buf_index[2];
 886         uint8_t av_split;
 887         uint8_t buf_size;
 888         uint8_t buf[48];
 889         uint8_t *pos;
 890
 891         intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
 892
 893         for (i = 0; i <= av_split; i++) {
 894                 set_buf_index[0] = i; set_buf_index[1] = 0;
 895                 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
 896                                      set_buf_index, 2);
 897                 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
 898                 intel_sdvo_read_response(encoder, &buf_size, 1);
 899
 900                 pos = buf;
 901                 for (j = 0; j <= buf_size; j += 8) {
 902                         intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
 903                                              NULL, 0);
 904                         intel_sdvo_read_response(encoder, pos, 8);
 905                         pos += 8;
 906                 }
 907         }
 908 }
 909 #endif
 910
 911 static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo,
 912                                        unsigned if_index, uint8_t tx_rate,
 913                                        uint8_t *data, unsigned length)
 914 {
 915         uint8_t set_buf_index[2] = { if_index, 0 };
 916         uint8_t hbuf_size, tmp[8];
 917         int i;
 918
 919         if (!intel_sdvo_set_value(intel_sdvo,
 920                                   SDVO_CMD_SET_HBUF_INDEX,
 921                                   set_buf_index, 2))
 922                 return false;
 923
 924         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO,
 925                                   &hbuf_size, 1))
 926                 return false;
 927
 928         /* Buffer size is 0 based, hooray! */
 929         hbuf_size++;
 930
 931         DRM_DEBUG_KMS("writing sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i\n",
 932                       if_index, length, hbuf_size);
 933
 934         for (i = 0; i < hbuf_size; i += 8) {
 935                 memset(tmp, 0, 8);
 936                 if (i < length)
 937                         memcpy(tmp, data + i, min_t(unsigned, 8, length - i));
 938
 939                 if (!intel_sdvo_set_value(intel_sdvo,
 940                                           SDVO_CMD_SET_HBUF_DATA,
 941                                           tmp, 8))
 942                         return false;
 943         }
 944
 945         return intel_sdvo_set_value(intel_sdvo,
 946                                     SDVO_CMD_SET_HBUF_TXRATE,
 947                                     &tx_rate, 1);
 948 }
 949
 950 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo,
 951                                          const struct drm_display_mode *adjusted_mode)
 952 {
 953         struct dip_infoframe avi_if = {
 954                 .type = DIP_TYPE_AVI,
 955                 .ver = DIP_VERSION_AVI,
 956                 .len = DIP_LEN_AVI,
 957         };
 958         uint8_t sdvo_data[4 + sizeof(avi_if.body.avi)];
 959         struct intel_crtc *intel_crtc = to_intel_crtc(intel_sdvo->base.base.crtc);
 960
 961         if (intel_sdvo->rgb_quant_range_selectable) {
 962                 if (intel_crtc->config.limited_color_range)
 963                         avi_if.body.avi.ITC_EC_Q_SC |= DIP_AVI_RGB_QUANT_RANGE_LIMITED;
 964                 else
 965                         avi_if.body.avi.ITC_EC_Q_SC |= DIP_AVI_RGB_QUANT_RANGE_FULL;
 966         }
 967
 968         avi_if.body.avi.VIC = drm_match_cea_mode(adjusted_mode);
 969
 970         intel_dip_infoframe_csum(&avi_if);
 971
 972         /* sdvo spec says that the ecc is handled by the hw, and it looks like
 973          * we must not send the ecc field, either. */
 974         memcpy(sdvo_data, &avi_if, 3);
 975         sdvo_data[3] = avi_if.checksum;
 976         memcpy(&sdvo_data[4], &avi_if.body, sizeof(avi_if.body.avi));
 977
 978         return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF,
 979                                           SDVO_HBUF_TX_VSYNC,
 980                                           sdvo_data, sizeof(sdvo_data));
 981 }
 982
 983 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
 984 {
 985         struct intel_sdvo_tv_format format;
 986         uint32_t format_map;
 987
 988         format_map = 1 << intel_sdvo->tv_format_index;
 989         memset(&format, 0, sizeof(format));
 990         memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
 991
 992         BUILD_BUG_ON(sizeof(format) != 6);
 993         return intel_sdvo_set_value(intel_sdvo,
 994                                     SDVO_CMD_SET_TV_FORMAT,
 995                                     &format, sizeof(format));
 996 }
 997
 998 static bool
 999 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
1000                                         const struct drm_display_mode *mode)
1001 {
1002         struct intel_sdvo_dtd output_dtd;
1003
1004         if (!intel_sdvo_set_target_output(intel_sdvo,
1005                                           intel_sdvo->attached_output))
1006                 return false;
1007
1008         intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1009         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1010                 return false;
1011
1012         return true;
1013 }
1014
1015 /* Asks the sdvo controller for the preferred input mode given the output mode.
1016  * Unfortunately we have to set up the full output mode to do that. */
1017 static bool
1018 intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo,
1019                                     const struct drm_display_mode *mode,
1020                                     struct drm_display_mode *adjusted_mode)
1021 {
1022         struct intel_sdvo_dtd input_dtd;
1023
1024         /* Reset the input timing to the screen. Assume always input 0. */
1025         if (!intel_sdvo_set_target_input(intel_sdvo))
1026                 return false;
1027
1028         if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
1029                                                       mode->clock / 10,
1030                                                       mode->hdisplay,
1031                                                       mode->vdisplay))
1032                 return false;
1033
1034         if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
1035                                                    &input_dtd))
1036                 return false;
1037
1038         intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
1039         intel_sdvo->dtd_sdvo_flags = input_dtd.part2.sdvo_flags;
1040
1041         return true;
1042 }
1043
1044 static bool intel_sdvo_compute_config(struct intel_encoder *encoder,
1045                                       struct intel_crtc_config *pipe_config)
1046 {
1047         struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1048         struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
1049         struct drm_display_mode *mode = &pipe_config->requested_mode;
1050
1051         DRM_DEBUG_KMS("forcing bpc to 8 for SDVO\n");
1052         pipe_config->pipe_bpp = 8*3;
1053
1054         if (HAS_PCH_SPLIT(encoder->base.dev))
1055                 pipe_config->has_pch_encoder = true;
1056
1057         /* We need to construct preferred input timings based on our
1058          * output timings.  To do that, we have to set the output
1059          * timings, even though this isn't really the right place in
1060          * the sequence to do it. Oh well.
1061          */
1062         if (intel_sdvo->is_tv) {
1063                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
1064                         return false;
1065
1066                 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1067                                                            mode,
1068                                                            adjusted_mode);
1069         } else if (intel_sdvo->is_lvds) {
1070                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
1071                                                              intel_sdvo->sdvo_lvds_fixed_mode))
1072                         return false;
1073
1074                 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1075                                                            mode,
1076                                                            adjusted_mode);
1077         }
1078
1079         /* Make the CRTC code factor in the SDVO pixel multiplier.  The
1080          * SDVO device will factor out the multiplier during mode_set.
1081          */
1082         pipe_config->pixel_multiplier =
1083                 intel_sdvo_get_pixel_multiplier(adjusted_mode);
1084         adjusted_mode->clock *= pipe_config->pixel_multiplier;
1085
1086         if (intel_sdvo->color_range_auto) {
1087                 /* See CEA-861-E - 5.1 Default Encoding Parameters */
1088                 /* FIXME: This bit is only valid when using TMDS encoding and 8
1089                  * bit per color mode. */
1090                 if (intel_sdvo->has_hdmi_monitor &&
1091                     drm_match_cea_mode(adjusted_mode) > 1)
1092                         intel_sdvo->color_range = HDMI_COLOR_RANGE_16_235;
1093                 else
1094                         intel_sdvo->color_range = 0;
1095         }
1096
1097         if (intel_sdvo->color_range)
1098                 pipe_config->limited_color_range = true;
1099
1100         return true;
1101 }
1102
1103 static void intel_sdvo_mode_set(struct intel_encoder *intel_encoder)
1104 {
1105         struct drm_device *dev = intel_encoder->base.dev;
1106         struct drm_i915_private *dev_priv = dev->dev_private;
1107         struct drm_crtc *crtc = intel_encoder->base.crtc;
1108         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
1109         struct drm_display_mode *adjusted_mode =
1110                 &intel_crtc->config.adjusted_mode;
1111         struct drm_display_mode *mode = &intel_crtc->config.requested_mode;
1112         struct intel_sdvo *intel_sdvo = to_intel_sdvo(&intel_encoder->base);
1113         u32 sdvox;
1114         struct intel_sdvo_in_out_map in_out;
1115         struct intel_sdvo_dtd input_dtd, output_dtd;
1116         int rate;
1117
1118         if (!mode)
1119                 return;
1120
1121         /* First, set the input mapping for the first input to our controlled
1122          * output. This is only correct if we're a single-input device, in
1123          * which case the first input is the output from the appropriate SDVO
1124          * channel on the motherboard.  In a two-input device, the first input
1125          * will be SDVOB and the second SDVOC.
1126          */
1127         in_out.in0 = intel_sdvo->attached_output;
1128         in_out.in1 = 0;
1129
1130         intel_sdvo_set_value(intel_sdvo,
1131                              SDVO_CMD_SET_IN_OUT_MAP,
1132                              &in_out, sizeof(in_out));
1133
1134         /* Set the output timings to the screen */
1135         if (!intel_sdvo_set_target_output(intel_sdvo,
1136                                           intel_sdvo->attached_output))
1137                 return;
1138
1139         /* lvds has a special fixed output timing. */
1140         if (intel_sdvo->is_lvds)
1141                 intel_sdvo_get_dtd_from_mode(&output_dtd,
1142                                              intel_sdvo->sdvo_lvds_fixed_mode);
1143         else
1144                 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1145         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1146                 DRM_INFO("Setting output timings on %s failed\n",
1147                          SDVO_NAME(intel_sdvo));
1148
1149         /* Set the input timing to the screen. Assume always input 0. */
1150         if (!intel_sdvo_set_target_input(intel_sdvo))
1151                 return;
1152
1153         if (intel_sdvo->has_hdmi_monitor) {
1154                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1155                 intel_sdvo_set_colorimetry(intel_sdvo,
1156                                            SDVO_COLORIMETRY_RGB256);
1157                 intel_sdvo_set_avi_infoframe(intel_sdvo, adjusted_mode);
1158         } else
1159                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
1160
1161         if (intel_sdvo->is_tv &&
1162             !intel_sdvo_set_tv_format(intel_sdvo))
1163                 return;
1164
1165         /* We have tried to get input timing in mode_fixup, and filled into
1166          * adjusted_mode.
1167          */
1168         intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1169         if (intel_sdvo->is_tv || intel_sdvo->is_lvds)
1170                 input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags;
1171         if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd))
1172                 DRM_INFO("Setting input timings on %s failed\n",
1173                          SDVO_NAME(intel_sdvo));
1174
1175         switch (intel_crtc->config.pixel_multiplier) {
1176         default:
1177         case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1178         case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1179         case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1180         }
1181         if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1182                 return;
1183
1184         /* Set the SDVO control regs. */
1185         if (INTEL_INFO(dev)->gen >= 4) {
1186                 /* The real mode polarity is set by the SDVO commands, using
1187                  * struct intel_sdvo_dtd. */
1188                 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
1189                 if (!HAS_PCH_SPLIT(dev) && intel_sdvo->is_hdmi)
1190                         sdvox |= intel_sdvo->color_range;
1191                 if (INTEL_INFO(dev)->gen < 5)
1192                         sdvox |= SDVO_BORDER_ENABLE;
1193         } else {
1194                 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1195                 switch (intel_sdvo->sdvo_reg) {
1196                 case GEN3_SDVOB:
1197                         sdvox &= SDVOB_PRESERVE_MASK;
1198                         break;
1199                 case GEN3_SDVOC:
1200                         sdvox &= SDVOC_PRESERVE_MASK;
1201                         break;
1202                 }
1203                 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1204         }
1205
1206         if (INTEL_PCH_TYPE(dev) >= PCH_CPT)
1207                 sdvox |= SDVO_PIPE_SEL_CPT(intel_crtc->pipe);
1208         else
1209                 sdvox |= SDVO_PIPE_SEL(intel_crtc->pipe);
1210
1211         if (intel_sdvo->has_hdmi_audio)
1212                 sdvox |= SDVO_AUDIO_ENABLE;
1213
1214         if (INTEL_INFO(dev)->gen >= 4) {
1215                 /* done in crtc_mode_set as the dpll_md reg must be written early */
1216         } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1217                 /* done in crtc_mode_set as it lives inside the dpll register */
1218         } else {
1219                 sdvox |= (intel_crtc->config.pixel_multiplier - 1)
1220                         << SDVO_PORT_MULTIPLY_SHIFT;
1221         }
1222
1223         if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1224             INTEL_INFO(dev)->gen < 5)
1225                 sdvox |= SDVO_STALL_SELECT;
1226         intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1227 }
1228
1229 static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector)
1230 {
1231         struct intel_sdvo_connector *intel_sdvo_connector =
1232                 to_intel_sdvo_connector(&connector->base);
1233         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(&connector->base);
1234         u16 active_outputs;
1235
1236         intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1237
1238         if (active_outputs & intel_sdvo_connector->output_flag)
1239                 return true;
1240         else
1241                 return false;
1242 }
1243
1244 static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder,
1245                                     enum pipe *pipe)
1246 {
1247         struct drm_device *dev = encoder->base.dev;
1248         struct drm_i915_private *dev_priv = dev->dev_private;
1249         struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1250         u16 active_outputs;
1251         u32 tmp;
1252
1253         tmp = I915_READ(intel_sdvo->sdvo_reg);
1254         intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1255
1256         if (!(tmp & SDVO_ENABLE) && (active_outputs == 0))
1257                 return false;
1258
1259         if (HAS_PCH_CPT(dev))
1260                 *pipe = PORT_TO_PIPE_CPT(tmp);
1261         else
1262                 *pipe = PORT_TO_PIPE(tmp);
1263
1264         return true;
1265 }
1266
1267 static void intel_disable_sdvo(struct intel_encoder *encoder)
1268 {
1269         struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
1270         struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1271         u32 temp;
1272
1273         intel_sdvo_set_active_outputs(intel_sdvo, 0);
1274         if (0)
1275                 intel_sdvo_set_encoder_power_state(intel_sdvo,
1276                                                    DRM_MODE_DPMS_OFF);
1277
1278         temp = I915_READ(intel_sdvo->sdvo_reg);
1279         if ((temp & SDVO_ENABLE) != 0) {
1280                 /* HW workaround for IBX, we need to move the port to
1281                  * transcoder A before disabling it. */
1282                 if (HAS_PCH_IBX(encoder->base.dev)) {
1283                         struct drm_crtc *crtc = encoder->base.crtc;
1284                         int pipe = crtc ? to_intel_crtc(crtc)->pipe : -1;
1285
1286                         if (temp & SDVO_PIPE_B_SELECT) {
1287                                 temp &= ~SDVO_PIPE_B_SELECT;
1288                                 I915_WRITE(intel_sdvo->sdvo_reg, temp);
1289                                 POSTING_READ(intel_sdvo->sdvo_reg);
1290
1291                                 /* Again we need to write this twice. */
1292                                 I915_WRITE(intel_sdvo->sdvo_reg, temp);
1293                                 POSTING_READ(intel_sdvo->sdvo_reg);
1294
1295                                 /* Transcoder selection bits only update
1296                                  * effectively on vblank. */
1297                                 if (crtc)
1298                                         intel_wait_for_vblank(encoder->base.dev, pipe);
1299                                 else
1300                                         msleep(50);
1301                         }
1302                 }
1303
1304                 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
1305         }
1306 }
1307
1308 static void intel_enable_sdvo(struct intel_encoder *encoder)
1309 {
1310         struct drm_device *dev = encoder->base.dev;
1311         struct drm_i915_private *dev_priv = dev->dev_private;
1312         struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1313         struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
1314         u32 temp;
1315         bool input1, input2;
1316         int i;
1317         u8 status;
1318
1319         temp = I915_READ(intel_sdvo->sdvo_reg);
1320         if ((temp & SDVO_ENABLE) == 0) {
1321                 /* HW workaround for IBX, we need to move the port
1322                  * to transcoder A before disabling it, so restore it here. */
1323                 if (HAS_PCH_IBX(dev))
1324                         temp |= SDVO_PIPE_SEL(intel_crtc->pipe);
1325
1326                 intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
1327         }
1328         for (i = 0; i < 2; i++)
1329                 intel_wait_for_vblank(dev, intel_crtc->pipe);
1330
1331         status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1332         /* Warn if the device reported failure to sync.
1333          * A lot of SDVO devices fail to notify of sync, but it's
1334          * a given it the status is a success, we succeeded.
1335          */
1336         if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
1337                 DRM_DEBUG_KMS("First %s output reported failure to "
1338                                 "sync\n", SDVO_NAME(intel_sdvo));
1339         }
1340
1341         if (0)
1342                 intel_sdvo_set_encoder_power_state(intel_sdvo,
1343                                                    DRM_MODE_DPMS_ON);
1344         intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1345 }
1346
1347 static void intel_sdvo_dpms(struct drm_connector *connector, int mode)
1348 {
1349         struct drm_crtc *crtc;
1350         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1351
1352         /* dvo supports only 2 dpms states. */
1353         if (mode != DRM_MODE_DPMS_ON)
1354                 mode = DRM_MODE_DPMS_OFF;
1355
1356         if (mode == connector->dpms)
1357                 return;
1358
1359         connector->dpms = mode;
1360
1361         /* Only need to change hw state when actually enabled */
1362         crtc = intel_sdvo->base.base.crtc;
1363         if (!crtc) {
1364                 intel_sdvo->base.connectors_active = false;
1365                 return;
1366         }
1367
1368         if (mode != DRM_MODE_DPMS_ON) {
1369                 intel_sdvo_set_active_outputs(intel_sdvo, 0);
1370                 if (0)
1371                         intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1372
1373                 intel_sdvo->base.connectors_active = false;
1374
1375                 intel_crtc_update_dpms(crtc);
1376         } else {
1377                 intel_sdvo->base.connectors_active = true;
1378
1379                 intel_crtc_update_dpms(crtc);
1380
1381                 if (0)
1382                         intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1383                 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1384         }
1385
1386         intel_modeset_check_state(connector->dev);
1387 }
1388
1389 static int intel_sdvo_mode_valid(struct drm_connector *connector,
1390                                  struct drm_display_mode *mode)
1391 {
1392         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1393
1394         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1395                 return MODE_NO_DBLESCAN;
1396
1397         if (intel_sdvo->pixel_clock_min > mode->clock)
1398                 return MODE_CLOCK_LOW;
1399
1400         if (intel_sdvo->pixel_clock_max < mode->clock)
1401                 return MODE_CLOCK_HIGH;
1402
1403         if (intel_sdvo->is_lvds) {
1404                 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
1405                         return MODE_PANEL;
1406
1407                 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
1408                         return MODE_PANEL;
1409         }
1410
1411         return MODE_OK;
1412 }
1413
1414 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1415 {
1416         BUILD_BUG_ON(sizeof(*caps) != 8);
1417         if (!intel_sdvo_get_value(intel_sdvo,
1418                                   SDVO_CMD_GET_DEVICE_CAPS,
1419                                   caps, sizeof(*caps)))
1420                 return false;
1421
1422         DRM_DEBUG_KMS("SDVO capabilities:\n"
1423                       "  vendor_id: %d\n"
1424                       "  device_id: %d\n"
1425                       "  device_rev_id: %d\n"
1426                       "  sdvo_version_major: %d\n"
1427                       "  sdvo_version_minor: %d\n"
1428                       "  sdvo_inputs_mask: %d\n"
1429                       "  smooth_scaling: %d\n"
1430                       "  sharp_scaling: %d\n"
1431                       "  up_scaling: %d\n"
1432                       "  down_scaling: %d\n"
1433                       "  stall_support: %d\n"
1434                       "  output_flags: %d\n",
1435                       caps->vendor_id,
1436                       caps->device_id,
1437                       caps->device_rev_id,
1438                       caps->sdvo_version_major,
1439                       caps->sdvo_version_minor,
1440                       caps->sdvo_inputs_mask,
1441                       caps->smooth_scaling,
1442                       caps->sharp_scaling,
1443                       caps->up_scaling,
1444                       caps->down_scaling,
1445                       caps->stall_support,
1446                       caps->output_flags);
1447
1448         return true;
1449 }
1450
1451 static uint16_t intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo)
1452 {
1453         struct drm_device *dev = intel_sdvo->base.base.dev;
1454         uint16_t hotplug;
1455
1456         /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
1457          * on the line. */
1458         if (IS_I945G(dev) || IS_I945GM(dev))
1459                 return 0;
1460
1461         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1462                                         &hotplug, sizeof(hotplug)))
1463                 return 0;
1464
1465         return hotplug;
1466 }
1467
1468 static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
1469 {
1470         struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1471
1472         intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG,
1473                         &intel_sdvo->hotplug_active, 2);
1474 }
1475
1476 static bool
1477 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
1478 {
1479         /* Is there more than one type of output? */
1480         return hweight16(intel_sdvo->caps.output_flags) > 1;
1481 }
1482
1483 static struct edid *
1484 intel_sdvo_get_edid(struct drm_connector *connector)
1485 {
1486         struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1487         return drm_get_edid(connector, &sdvo->ddc);
1488 }
1489
1490 /* Mac mini hack -- use the same DDC as the analog connector */
1491 static struct edid *
1492 intel_sdvo_get_analog_edid(struct drm_connector *connector)
1493 {
1494         struct drm_i915_private *dev_priv = connector->dev->dev_private;
1495
1496         return drm_get_edid(connector,
1497                             intel_gmbus_get_adapter(dev_priv,
1498                                                     dev_priv->crt_ddc_pin));
1499 }
1500
1501 static enum drm_connector_status
1502 intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
1503 {
1504         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1505         enum drm_connector_status status;
1506         struct edid *edid;
1507
1508         edid = intel_sdvo_get_edid(connector);
1509
1510         if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
1511                 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
1512
1513                 /*
1514                  * Don't use the 1 as the argument of DDC bus switch to get
1515                  * the EDID. It is used for SDVO SPD ROM.
1516                  */
1517                 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1518                         intel_sdvo->ddc_bus = ddc;
1519                         edid = intel_sdvo_get_edid(connector);
1520                         if (edid)
1521                                 break;
1522                 }
1523                 /*
1524                  * If we found the EDID on the other bus,
1525                  * assume that is the correct DDC bus.
1526                  */
1527                 if (edid == NULL)
1528                         intel_sdvo->ddc_bus = saved_ddc;
1529         }
1530
1531         /*
1532          * When there is no edid and no monitor is connected with VGA
1533          * port, try to use the CRT ddc to read the EDID for DVI-connector.
1534          */
1535         if (edid == NULL)
1536                 edid = intel_sdvo_get_analog_edid(connector);
1537
1538         status = connector_status_unknown;
1539         if (edid != NULL) {
1540                 /* DDC bus is shared, match EDID to connector type */
1541                 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1542                         status = connector_status_connected;
1543                         if (intel_sdvo->is_hdmi) {
1544                                 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1545                                 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1546                                 intel_sdvo->rgb_quant_range_selectable =
1547                                         drm_rgb_quant_range_selectable(edid);
1548                         }
1549                 } else
1550                         status = connector_status_disconnected;
1551                 kfree(edid);
1552         }
1553
1554         if (status == connector_status_connected) {
1555                 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1556                 if (intel_sdvo_connector->force_audio != HDMI_AUDIO_AUTO)
1557                         intel_sdvo->has_hdmi_audio = (intel_sdvo_connector->force_audio == HDMI_AUDIO_ON);
1558         }
1559
1560         return status;
1561 }
1562
1563 static bool
1564 intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
1565                                   struct edid *edid)
1566 {
1567         bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1568         bool connector_is_digital = !!IS_DIGITAL(sdvo);
1569
1570         DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
1571                       connector_is_digital, monitor_is_digital);
1572         return connector_is_digital == monitor_is_digital;
1573 }
1574
1575 static enum drm_connector_status
1576 intel_sdvo_detect(struct drm_connector *connector, bool force)
1577 {
1578         uint16_t response;
1579         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1580         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1581         enum drm_connector_status ret;
1582
1583         if (!intel_sdvo_get_value(intel_sdvo,
1584                                   SDVO_CMD_GET_ATTACHED_DISPLAYS,
1585                                   &response, 2))
1586                 return connector_status_unknown;
1587
1588         DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1589                       response & 0xff, response >> 8,
1590                       intel_sdvo_connector->output_flag);
1591
1592         if (response == 0)
1593                 return connector_status_disconnected;
1594
1595         intel_sdvo->attached_output = response;
1596
1597         intel_sdvo->has_hdmi_monitor = false;
1598         intel_sdvo->has_hdmi_audio = false;
1599         intel_sdvo->rgb_quant_range_selectable = false;
1600
1601         if ((intel_sdvo_connector->output_flag & response) == 0)
1602                 ret = connector_status_disconnected;
1603         else if (IS_TMDS(intel_sdvo_connector))
1604                 ret = intel_sdvo_tmds_sink_detect(connector);
1605         else {
1606                 struct edid *edid;
1607
1608                 /* if we have an edid check it matches the connection */
1609                 edid = intel_sdvo_get_edid(connector);
1610                 if (edid == NULL)
1611                         edid = intel_sdvo_get_analog_edid(connector);
1612                 if (edid != NULL) {
1613                         if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
1614                                                               edid))
1615                                 ret = connector_status_connected;
1616                         else
1617                                 ret = connector_status_disconnected;
1618
1619                         kfree(edid);
1620                 } else
1621                         ret = connector_status_connected;
1622         }
1623
1624         /* May update encoder flag for like clock for SDVO TV, etc.*/
1625         if (ret == connector_status_connected) {
1626                 intel_sdvo->is_tv = false;
1627                 intel_sdvo->is_lvds = false;
1628                 intel_sdvo->base.needs_tv_clock = false;
1629
1630                 if (response & SDVO_TV_MASK) {
1631                         intel_sdvo->is_tv = true;
1632                         intel_sdvo->base.needs_tv_clock = true;
1633                 }
1634                 if (response & SDVO_LVDS_MASK)
1635                         intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
1636         }
1637
1638         return ret;
1639 }
1640
1641 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1642 {
1643         struct edid *edid;
1644
1645         /* set the bus switch and get the modes */
1646         edid = intel_sdvo_get_edid(connector);
1647
1648         /*
1649          * Mac mini hack.  On this device, the DVI-I connector shares one DDC
1650          * link between analog and digital outputs. So, if the regular SDVO
1651          * DDC fails, check to see if the analog output is disconnected, in
1652          * which case we'll look there for the digital DDC data.
1653          */
1654         if (edid == NULL)
1655                 edid = intel_sdvo_get_analog_edid(connector);
1656
1657         if (edid != NULL) {
1658                 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
1659                                                       edid)) {
1660                         drm_mode_connector_update_edid_property(connector, edid);
1661                         drm_add_edid_modes(connector, edid);
1662                 }
1663
1664                 kfree(edid);
1665         }
1666 }
1667
1668 /*
1669  * Set of SDVO TV modes.
1670  * Note!  This is in reply order (see loop in get_tv_modes).
1671  * XXX: all 60Hz refresh?
1672  */
1673 static const struct drm_display_mode sdvo_tv_modes[] = {
1674         { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1675                    416, 0, 200, 201, 232, 233, 0,
1676                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1677         { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1678                    416, 0, 240, 241, 272, 273, 0,
1679                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1680         { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1681                    496, 0, 300, 301, 332, 333, 0,
1682                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1683         { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1684                    736, 0, 350, 351, 382, 383, 0,
1685                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1686         { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1687                    736, 0, 400, 401, 432, 433, 0,
1688                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1689         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1690                    736, 0, 480, 481, 512, 513, 0,
1691                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1692         { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1693                    800, 0, 480, 481, 512, 513, 0,
1694                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1695         { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1696                    800, 0, 576, 577, 608, 609, 0,
1697                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1698         { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1699                    816, 0, 350, 351, 382, 383, 0,
1700                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1701         { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1702                    816, 0, 400, 401, 432, 433, 0,
1703                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1704         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1705                    816, 0, 480, 481, 512, 513, 0,
1706                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1707         { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1708                    816, 0, 540, 541, 572, 573, 0,
1709                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1710         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1711                    816, 0, 576, 577, 608, 609, 0,
1712                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1713         { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1714                    864, 0, 576, 577, 608, 609, 0,
1715                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1716         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1717                    896, 0, 600, 601, 632, 633, 0,
1718                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1719         { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1720                    928, 0, 624, 625, 656, 657, 0,
1721                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1722         { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1723                    1016, 0, 766, 767, 798, 799, 0,
1724                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1725         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1726                    1120, 0, 768, 769, 800, 801, 0,
1727                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1728         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1729                    1376, 0, 1024, 1025, 1056, 1057, 0,
1730                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1731 };
1732
1733 static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1734 {
1735         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1736         struct intel_sdvo_sdtv_resolution_request tv_res;
1737         uint32_t reply = 0, format_map = 0;
1738         int i;
1739
1740         /* Read the list of supported input resolutions for the selected TV
1741          * format.
1742          */
1743         format_map = 1 << intel_sdvo->tv_format_index;
1744         memcpy(&tv_res, &format_map,
1745                min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
1746
1747         if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1748                 return;
1749
1750         BUILD_BUG_ON(sizeof(tv_res) != 3);
1751         if (!intel_sdvo_write_cmd(intel_sdvo,
1752                                   SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
1753                                   &tv_res, sizeof(tv_res)))
1754                 return;
1755         if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
1756                 return;
1757
1758         for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
1759                 if (reply & (1 << i)) {
1760                         struct drm_display_mode *nmode;
1761                         nmode = drm_mode_duplicate(connector->dev,
1762                                                    &sdvo_tv_modes[i]);
1763                         if (nmode)
1764                                 drm_mode_probed_add(connector, nmode);
1765                 }
1766 }
1767
1768 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1769 {
1770         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1771         struct drm_i915_private *dev_priv = connector->dev->dev_private;
1772         struct drm_display_mode *newmode;
1773
1774         /*
1775          * Attempt to get the mode list from DDC.
1776          * Assume that the preferred modes are
1777          * arranged in priority order.
1778          */
1779         intel_ddc_get_modes(connector, &intel_sdvo->ddc);
1780         if (list_empty(&connector->probed_modes) == false)
1781                 goto end;
1782
1783         /* Fetch modes from VBT */
1784         if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
1785                 newmode = drm_mode_duplicate(connector->dev,
1786                                              dev_priv->sdvo_lvds_vbt_mode);
1787                 if (newmode != NULL) {
1788                         /* Guarantee the mode is preferred */
1789                         newmode->type = (DRM_MODE_TYPE_PREFERRED |
1790                                          DRM_MODE_TYPE_DRIVER);
1791                         drm_mode_probed_add(connector, newmode);
1792                 }
1793         }
1794
1795 end:
1796         list_for_each_entry(newmode, &connector->probed_modes, head) {
1797                 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
1798                         intel_sdvo->sdvo_lvds_fixed_mode =
1799                                 drm_mode_duplicate(connector->dev, newmode);
1800
1801                         intel_sdvo->is_lvds = true;
1802                         break;
1803                 }
1804         }
1805
1806 }
1807
1808 static int intel_sdvo_get_modes(struct drm_connector *connector)
1809 {
1810         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1811
1812         if (IS_TV(intel_sdvo_connector))
1813                 intel_sdvo_get_tv_modes(connector);
1814         else if (IS_LVDS(intel_sdvo_connector))
1815                 intel_sdvo_get_lvds_modes(connector);
1816         else
1817                 intel_sdvo_get_ddc_modes(connector);
1818
1819         return !list_empty(&connector->probed_modes);
1820 }
1821
1822 static void
1823 intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
1824 {
1825         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1826         struct drm_device *dev = connector->dev;
1827
1828         if (intel_sdvo_connector->left)
1829                 drm_property_destroy(dev, intel_sdvo_connector->left);
1830         if (intel_sdvo_connector->right)
1831                 drm_property_destroy(dev, intel_sdvo_connector->right);
1832         if (intel_sdvo_connector->top)
1833                 drm_property_destroy(dev, intel_sdvo_connector->top);
1834         if (intel_sdvo_connector->bottom)
1835                 drm_property_destroy(dev, intel_sdvo_connector->bottom);
1836         if (intel_sdvo_connector->hpos)
1837                 drm_property_destroy(dev, intel_sdvo_connector->hpos);
1838         if (intel_sdvo_connector->vpos)
1839                 drm_property_destroy(dev, intel_sdvo_connector->vpos);
1840         if (intel_sdvo_connector->saturation)
1841                 drm_property_destroy(dev, intel_sdvo_connector->saturation);
1842         if (intel_sdvo_connector->contrast)
1843                 drm_property_destroy(dev, intel_sdvo_connector->contrast);
1844         if (intel_sdvo_connector->hue)
1845                 drm_property_destroy(dev, intel_sdvo_connector->hue);
1846         if (intel_sdvo_connector->sharpness)
1847                 drm_property_destroy(dev, intel_sdvo_connector->sharpness);
1848         if (intel_sdvo_connector->flicker_filter)
1849                 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
1850         if (intel_sdvo_connector->flicker_filter_2d)
1851                 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
1852         if (intel_sdvo_connector->flicker_filter_adaptive)
1853                 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
1854         if (intel_sdvo_connector->tv_luma_filter)
1855                 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
1856         if (intel_sdvo_connector->tv_chroma_filter)
1857                 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
1858         if (intel_sdvo_connector->dot_crawl)
1859                 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
1860         if (intel_sdvo_connector->brightness)
1861                 drm_property_destroy(dev, intel_sdvo_connector->brightness);
1862 }
1863
1864 static void intel_sdvo_destroy(struct drm_connector *connector)
1865 {
1866         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1867
1868         if (intel_sdvo_connector->tv_format)
1869                 drm_property_destroy(connector->dev,
1870                                      intel_sdvo_connector->tv_format);
1871
1872         intel_sdvo_destroy_enhance_property(connector);
1873         drm_sysfs_connector_remove(connector);
1874         drm_connector_cleanup(connector);
1875         kfree(intel_sdvo_connector);
1876 }
1877
1878 static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
1879 {
1880         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1881         struct edid *edid;
1882         bool has_audio = false;
1883
1884         if (!intel_sdvo->is_hdmi)
1885                 return false;
1886
1887         edid = intel_sdvo_get_edid(connector);
1888         if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
1889                 has_audio = drm_detect_monitor_audio(edid);
1890         kfree(edid);
1891
1892         return has_audio;
1893 }
1894
1895 static int
1896 intel_sdvo_set_property(struct drm_connector *connector,
1897                         struct drm_property *property,
1898                         uint64_t val)
1899 {
1900         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1901         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1902         struct drm_i915_private *dev_priv = connector->dev->dev_private;
1903         uint16_t temp_value;
1904         uint8_t cmd;
1905         int ret;
1906
1907         ret = drm_object_property_set_value(&connector->base, property, val);
1908         if (ret)
1909                 return ret;
1910
1911         if (property == dev_priv->force_audio_property) {
1912                 int i = val;
1913                 bool has_audio;
1914
1915                 if (i == intel_sdvo_connector->force_audio)
1916                         return 0;
1917
1918                 intel_sdvo_connector->force_audio = i;
1919
1920                 if (i == HDMI_AUDIO_AUTO)
1921                         has_audio = intel_sdvo_detect_hdmi_audio(connector);
1922                 else
1923                         has_audio = (i == HDMI_AUDIO_ON);
1924
1925                 if (has_audio == intel_sdvo->has_hdmi_audio)
1926                         return 0;
1927
1928                 intel_sdvo->has_hdmi_audio = has_audio;
1929                 goto done;
1930         }
1931
1932         if (property == dev_priv->broadcast_rgb_property) {
1933                 bool old_auto = intel_sdvo->color_range_auto;
1934                 uint32_t old_range = intel_sdvo->color_range;
1935
1936                 switch (val) {
1937                 case INTEL_BROADCAST_RGB_AUTO:
1938                         intel_sdvo->color_range_auto = true;
1939                         break;
1940                 case INTEL_BROADCAST_RGB_FULL:
1941                         intel_sdvo->color_range_auto = false;
1942                         intel_sdvo->color_range = 0;
1943                         break;
1944                 case INTEL_BROADCAST_RGB_LIMITED:
1945                         intel_sdvo->color_range_auto = false;
1946                         /* FIXME: this bit is only valid when using TMDS
1947                          * encoding and 8 bit per color mode. */
1948                         intel_sdvo->color_range = HDMI_COLOR_RANGE_16_235;
1949                         break;
1950                 default:
1951                         return -EINVAL;
1952                 }
1953
1954                 if (old_auto == intel_sdvo->color_range_auto &&
1955                     old_range == intel_sdvo->color_range)
1956                         return 0;
1957
1958                 goto done;
1959         }
1960
1961 #define CHECK_PROPERTY(name, NAME) \
1962         if (intel_sdvo_connector->name == property) { \
1963                 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
1964                 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1965                 cmd = SDVO_CMD_SET_##NAME; \
1966                 intel_sdvo_connector->cur_##name = temp_value; \
1967                 goto set_value; \
1968         }
1969
1970         if (property == intel_sdvo_connector->tv_format) {
1971                 if (val >= TV_FORMAT_NUM)
1972                         return -EINVAL;
1973
1974                 if (intel_sdvo->tv_format_index ==
1975                     intel_sdvo_connector->tv_format_supported[val])
1976                         return 0;
1977
1978                 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
1979                 goto done;
1980         } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
1981                 temp_value = val;
1982                 if (intel_sdvo_connector->left == property) {
1983                         drm_object_property_set_value(&connector->base,
1984                                                          intel_sdvo_connector->right, val);
1985                         if (intel_sdvo_connector->left_margin == temp_value)
1986                                 return 0;
1987
1988                         intel_sdvo_connector->left_margin = temp_value;
1989                         intel_sdvo_connector->right_margin = temp_value;
1990                         temp_value = intel_sdvo_connector->max_hscan -
1991                                 intel_sdvo_connector->left_margin;
1992                         cmd = SDVO_CMD_SET_OVERSCAN_H;
1993                         goto set_value;
1994                 } else if (intel_sdvo_connector->right == property) {
1995                         drm_object_property_set_value(&connector->base,
1996                                                          intel_sdvo_connector->left, val);
1997                         if (intel_sdvo_connector->right_margin == temp_value)
1998                                 return 0;
1999
2000                         intel_sdvo_connector->left_margin = temp_value;
2001                         intel_sdvo_connector->right_margin = temp_value;
2002                         temp_value = intel_sdvo_connector->max_hscan -
2003                                 intel_sdvo_connector->left_margin;
2004                         cmd = SDVO_CMD_SET_OVERSCAN_H;
2005                         goto set_value;
2006                 } else if (intel_sdvo_connector->top == property) {
2007                         drm_object_property_set_value(&connector->base,
2008                                                          intel_sdvo_connector->bottom, val);
2009                         if (intel_sdvo_connector->top_margin == temp_value)
2010                                 return 0;
2011
2012                         intel_sdvo_connector->top_margin = temp_value;
2013                         intel_sdvo_connector->bottom_margin = temp_value;
2014                         temp_value = intel_sdvo_connector->max_vscan -
2015                                 intel_sdvo_connector->top_margin;
2016                         cmd = SDVO_CMD_SET_OVERSCAN_V;
2017                         goto set_value;
2018                 } else if (intel_sdvo_connector->bottom == property) {
2019                         drm_object_property_set_value(&connector->base,
2020                                                          intel_sdvo_connector->top, val);
2021                         if (intel_sdvo_connector->bottom_margin == temp_value)
2022                                 return 0;
2023
2024                         intel_sdvo_connector->top_margin = temp_value;
2025                         intel_sdvo_connector->bottom_margin = temp_value;
2026                         temp_value = intel_sdvo_connector->max_vscan -
2027                                 intel_sdvo_connector->top_margin;
2028                         cmd = SDVO_CMD_SET_OVERSCAN_V;
2029                         goto set_value;
2030                 }
2031                 CHECK_PROPERTY(hpos, HPOS)
2032                 CHECK_PROPERTY(vpos, VPOS)
2033                 CHECK_PROPERTY(saturation, SATURATION)
2034                 CHECK_PROPERTY(contrast, CONTRAST)
2035                 CHECK_PROPERTY(hue, HUE)
2036                 CHECK_PROPERTY(brightness, BRIGHTNESS)
2037                 CHECK_PROPERTY(sharpness, SHARPNESS)
2038                 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
2039                 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
2040                 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
2041                 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
2042                 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
2043                 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
2044         }
2045
2046         return -EINVAL; /* unknown property */
2047
2048 set_value:
2049         if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
2050                 return -EIO;
2051
2052
2053 done:
2054         if (intel_sdvo->base.base.crtc)
2055                 intel_crtc_restore_mode(intel_sdvo->base.base.crtc);
2056
2057         return 0;
2058 #undef CHECK_PROPERTY
2059 }
2060
2061 static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
2062         .dpms = intel_sdvo_dpms,
2063         .detect = intel_sdvo_detect,
2064         .fill_modes = drm_helper_probe_single_connector_modes,
2065         .set_property = intel_sdvo_set_property,
2066         .destroy = intel_sdvo_destroy,
2067 };
2068
2069 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
2070         .get_modes = intel_sdvo_get_modes,
2071         .mode_valid = intel_sdvo_mode_valid,
2072         .best_encoder = intel_best_encoder,
2073 };
2074
2075 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
2076 {
2077         struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
2078
2079         if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
2080                 drm_mode_destroy(encoder->dev,
2081                                  intel_sdvo->sdvo_lvds_fixed_mode);
2082
2083         i2c_del_adapter(&intel_sdvo->ddc);
2084         intel_encoder_destroy(encoder);
2085 }
2086
2087 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
2088         .destroy = intel_sdvo_enc_destroy,
2089 };
2090
2091 static void
2092 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
2093 {
2094         uint16_t mask = 0;
2095         unsigned int num_bits;
2096
2097         /* Make a mask of outputs less than or equal to our own priority in the
2098          * list.
2099          */
2100         switch (sdvo->controlled_output) {
2101         case SDVO_OUTPUT_LVDS1:
2102                 mask |= SDVO_OUTPUT_LVDS1;
2103         case SDVO_OUTPUT_LVDS0:
2104                 mask |= SDVO_OUTPUT_LVDS0;
2105         case SDVO_OUTPUT_TMDS1:
2106                 mask |= SDVO_OUTPUT_TMDS1;
2107         case SDVO_OUTPUT_TMDS0:
2108                 mask |= SDVO_OUTPUT_TMDS0;
2109         case SDVO_OUTPUT_RGB1:
2110                 mask |= SDVO_OUTPUT_RGB1;
2111         case SDVO_OUTPUT_RGB0:
2112                 mask |= SDVO_OUTPUT_RGB0;
2113                 break;
2114         }
2115
2116         /* Count bits to find what number we are in the priority list. */
2117         mask &= sdvo->caps.output_flags;
2118         num_bits = hweight16(mask);
2119         /* If more than 3 outputs, default to DDC bus 3 for now. */
2120         if (num_bits > 3)
2121                 num_bits = 3;
2122
2123         /* Corresponds to SDVO_CONTROL_BUS_DDCx */
2124         sdvo->ddc_bus = 1 << num_bits;
2125 }
2126
2127 /**
2128  * Choose the appropriate DDC bus for control bus switch command for this
2129  * SDVO output based on the controlled output.
2130  *
2131  * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
2132  * outputs, then LVDS outputs.
2133  */
2134 static void
2135 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
2136                           struct intel_sdvo *sdvo, u32 reg)
2137 {
2138         struct sdvo_device_mapping *mapping;
2139
2140         if (sdvo->is_sdvob)
2141                 mapping = &(dev_priv->sdvo_mappings[0]);
2142         else
2143                 mapping = &(dev_priv->sdvo_mappings[1]);
2144
2145         if (mapping->initialized)
2146                 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
2147         else
2148                 intel_sdvo_guess_ddc_bus(sdvo);
2149 }
2150
2151 static void
2152 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
2153                           struct intel_sdvo *sdvo, u32 reg)
2154 {
2155         struct sdvo_device_mapping *mapping;
2156         u8 pin;
2157
2158         if (sdvo->is_sdvob)
2159                 mapping = &dev_priv->sdvo_mappings[0];
2160         else
2161                 mapping = &dev_priv->sdvo_mappings[1];
2162
2163         if (mapping->initialized && intel_gmbus_is_port_valid(mapping->i2c_pin))
2164                 pin = mapping->i2c_pin;
2165         else
2166                 pin = GMBUS_PORT_DPB;
2167
2168         sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
2169
2170         /* With gmbus we should be able to drive sdvo i2c at 2MHz, but somehow
2171          * our code totally fails once we start using gmbus. Hence fall back to
2172          * bit banging for now. */
2173         intel_gmbus_force_bit(sdvo->i2c, true);
2174 }
2175
2176 /* undo any changes intel_sdvo_select_i2c_bus() did to sdvo->i2c */
2177 static void
2178 intel_sdvo_unselect_i2c_bus(struct intel_sdvo *sdvo)
2179 {
2180         intel_gmbus_force_bit(sdvo->i2c, false);
2181 }
2182
2183 static bool
2184 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
2185 {
2186         return intel_sdvo_check_supp_encode(intel_sdvo);
2187 }
2188
2189 static u8
2190 intel_sdvo_get_slave_addr(struct drm_device *dev, struct intel_sdvo *sdvo)
2191 {
2192         struct drm_i915_private *dev_priv = dev->dev_private;
2193         struct sdvo_device_mapping *my_mapping, *other_mapping;
2194
2195         if (sdvo->is_sdvob) {
2196                 my_mapping = &dev_priv->sdvo_mappings[0];
2197                 other_mapping = &dev_priv->sdvo_mappings[1];
2198         } else {
2199                 my_mapping = &dev_priv->sdvo_mappings[1];
2200                 other_mapping = &dev_priv->sdvo_mappings[0];
2201         }
2202
2203         /* If the BIOS described our SDVO device, take advantage of it. */
2204         if (my_mapping->slave_addr)
2205                 return my_mapping->slave_addr;
2206
2207         /* If the BIOS only described a different SDVO device, use the
2208          * address that it isn't using.
2209          */
2210         if (other_mapping->slave_addr) {
2211                 if (other_mapping->slave_addr == 0x70)
2212                         return 0x72;
2213                 else
2214                         return 0x70;
2215         }
2216
2217         /* No SDVO device info is found for another DVO port,
2218          * so use mapping assumption we had before BIOS parsing.
2219          */
2220         if (sdvo->is_sdvob)
2221                 return 0x70;
2222         else
2223                 return 0x72;
2224 }
2225
2226 static void
2227 intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2228                           struct intel_sdvo *encoder)
2229 {
2230         drm_connector_init(encoder->base.base.dev,
2231                            &connector->base.base,
2232                            &intel_sdvo_connector_funcs,
2233                            connector->base.base.connector_type);
2234
2235         drm_connector_helper_add(&connector->base.base,
2236                                  &intel_sdvo_connector_helper_funcs);
2237
2238         connector->base.base.interlace_allowed = 1;
2239         connector->base.base.doublescan_allowed = 0;
2240         connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
2241         connector->base.get_hw_state = intel_sdvo_connector_get_hw_state;
2242
2243         intel_connector_attach_encoder(&connector->base, &encoder->base);
2244         drm_sysfs_connector_add(&connector->base.base);
2245 }
2246
2247 static void
2248 intel_sdvo_add_hdmi_properties(struct intel_sdvo *intel_sdvo,
2249                                struct intel_sdvo_connector *connector)
2250 {
2251         struct drm_device *dev = connector->base.base.dev;
2252
2253         intel_attach_force_audio_property(&connector->base.base);
2254         if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev)) {
2255                 intel_attach_broadcast_rgb_property(&connector->base.base);
2256                 intel_sdvo->color_range_auto = true;
2257         }
2258 }
2259
2260 static bool
2261 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
2262 {
2263         struct drm_encoder *encoder = &intel_sdvo->base.base;
2264         struct drm_connector *connector;
2265         struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
2266         struct intel_connector *intel_connector;
2267         struct intel_sdvo_connector *intel_sdvo_connector;
2268
2269         intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2270         if (!intel_sdvo_connector)
2271                 return false;
2272
2273         if (device == 0) {
2274                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2275                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2276         } else if (device == 1) {
2277                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2278                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2279         }
2280
2281         intel_connector = &intel_sdvo_connector->base;
2282         connector = &intel_connector->base;
2283         if (intel_sdvo_get_hotplug_support(intel_sdvo) &
2284                 intel_sdvo_connector->output_flag) {
2285                 intel_sdvo->hotplug_active |= intel_sdvo_connector->output_flag;
2286                 /* Some SDVO devices have one-shot hotplug interrupts.
2287                  * Ensure that they get re-enabled when an interrupt happens.
2288                  */
2289                 intel_encoder->hot_plug = intel_sdvo_enable_hotplug;
2290                 intel_sdvo_enable_hotplug(intel_encoder);
2291         } else {
2292                 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2293         }
2294         encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2295         connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2296
2297         if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
2298                 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2299                 intel_sdvo->is_hdmi = true;
2300         }
2301
2302         intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2303         if (intel_sdvo->is_hdmi)
2304                 intel_sdvo_add_hdmi_properties(intel_sdvo, intel_sdvo_connector);
2305
2306         return true;
2307 }
2308
2309 static bool
2310 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
2311 {
2312         struct drm_encoder *encoder = &intel_sdvo->base.base;
2313         struct drm_connector *connector;
2314         struct intel_connector *intel_connector;
2315         struct intel_sdvo_connector *intel_sdvo_connector;
2316
2317         intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2318         if (!intel_sdvo_connector)
2319                 return false;
2320
2321         intel_connector = &intel_sdvo_connector->base;
2322         connector = &intel_connector->base;
2323         encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2324         connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2325
2326         intel_sdvo->controlled_output |= type;
2327         intel_sdvo_connector->output_flag = type;
2328
2329         intel_sdvo->is_tv = true;
2330         intel_sdvo->base.needs_tv_clock = true;
2331
2332         intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2333
2334         if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2335                 goto err;
2336
2337         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2338                 goto err;
2339
2340         return true;
2341
2342 err:
2343         intel_sdvo_destroy(connector);
2344         return false;
2345 }
2346
2347 static bool
2348 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
2349 {
2350         struct drm_encoder *encoder = &intel_sdvo->base.base;
2351         struct drm_connector *connector;
2352         struct intel_connector *intel_connector;
2353         struct intel_sdvo_connector *intel_sdvo_connector;
2354
2355         intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2356         if (!intel_sdvo_connector)
2357                 return false;
2358
2359         intel_connector = &intel_sdvo_connector->base;
2360         connector = &intel_connector->base;
2361         intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2362         encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2363         connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2364
2365         if (device == 0) {
2366                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2367                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2368         } else if (device == 1) {
2369                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2370                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2371         }
2372
2373         intel_sdvo_connector_init(intel_sdvo_connector,
2374                                   intel_sdvo);
2375         return true;
2376 }
2377
2378 static bool
2379 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2380 {
2381         struct drm_encoder *encoder = &intel_sdvo->base.base;
2382         struct drm_connector *connector;
2383         struct intel_connector *intel_connector;
2384         struct intel_sdvo_connector *intel_sdvo_connector;
2385
2386         intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2387         if (!intel_sdvo_connector)
2388                 return false;
2389
2390         intel_connector = &intel_sdvo_connector->base;
2391         connector = &intel_connector->base;
2392         encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2393         connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2394
2395         if (device == 0) {
2396                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2397                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2398         } else if (device == 1) {
2399                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2400                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2401         }
2402
2403         intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2404         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2405                 goto err;
2406
2407         return true;
2408
2409 err:
2410         intel_sdvo_destroy(connector);
2411         return false;
2412 }
2413
2414 static bool
2415 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
2416 {
2417         intel_sdvo->is_tv = false;
2418         intel_sdvo->base.needs_tv_clock = false;
2419         intel_sdvo->is_lvds = false;
2420
2421         /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2422
2423         if (flags & SDVO_OUTPUT_TMDS0)
2424                 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
2425                         return false;
2426
2427         if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2428                 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
2429                         return false;
2430
2431         /* TV has no XXX1 function block */
2432         if (flags & SDVO_OUTPUT_SVID0)
2433                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
2434                         return false;
2435
2436         if (flags & SDVO_OUTPUT_CVBS0)
2437                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
2438                         return false;
2439
2440         if (flags & SDVO_OUTPUT_YPRPB0)
2441                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0))
2442                         return false;
2443
2444         if (flags & SDVO_OUTPUT_RGB0)
2445                 if (!intel_sdvo_analog_init(intel_sdvo, 0))
2446                         return false;
2447
2448         if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2449                 if (!intel_sdvo_analog_init(intel_sdvo, 1))
2450                         return false;
2451
2452         if (flags & SDVO_OUTPUT_LVDS0)
2453                 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
2454                         return false;
2455
2456         if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2457                 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
2458                         return false;
2459
2460         if ((flags & SDVO_OUTPUT_MASK) == 0) {
2461                 unsigned char bytes[2];
2462
2463                 intel_sdvo->controlled_output = 0;
2464                 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
2465                 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2466                               SDVO_NAME(intel_sdvo),
2467                               bytes[0], bytes[1]);
2468                 return false;
2469         }
2470         intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
2471
2472         return true;
2473 }
2474
2475 static void intel_sdvo_output_cleanup(struct intel_sdvo *intel_sdvo)
2476 {
2477         struct drm_device *dev = intel_sdvo->base.base.dev;
2478         struct drm_connector *connector, *tmp;
2479
2480         list_for_each_entry_safe(connector, tmp,
2481                                  &dev->mode_config.connector_list, head) {
2482                 if (intel_attached_encoder(connector) == &intel_sdvo->base)
2483                         intel_sdvo_destroy(connector);
2484         }
2485 }
2486
2487 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2488                                           struct intel_sdvo_connector *intel_sdvo_connector,
2489                                           int type)
2490 {
2491         struct drm_device *dev = intel_sdvo->base.base.dev;
2492         struct intel_sdvo_tv_format format;
2493         uint32_t format_map, i;
2494
2495         if (!intel_sdvo_set_target_output(intel_sdvo, type))
2496                 return false;
2497
2498         BUILD_BUG_ON(sizeof(format) != 6);
2499         if (!intel_sdvo_get_value(intel_sdvo,
2500                                   SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2501                                   &format, sizeof(format)))
2502                 return false;
2503
2504         memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2505
2506         if (format_map == 0)
2507                 return false;
2508
2509         intel_sdvo_connector->format_supported_num = 0;
2510         for (i = 0 ; i < TV_FORMAT_NUM; i++)
2511                 if (format_map & (1 << i))
2512                         intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
2513
2514
2515         intel_sdvo_connector->tv_format =
2516                         drm_property_create(dev, DRM_MODE_PROP_ENUM,
2517                                             "mode", intel_sdvo_connector->format_supported_num);
2518         if (!intel_sdvo_connector->tv_format)
2519                 return false;
2520
2521         for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2522                 drm_property_add_enum(
2523                                 intel_sdvo_connector->tv_format, i,
2524                                 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
2525
2526         intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
2527         drm_object_attach_property(&intel_sdvo_connector->base.base.base,
2528                                       intel_sdvo_connector->tv_format, 0);
2529         return true;
2530
2531 }
2532
2533 #define ENHANCEMENT(name, NAME) do { \
2534         if (enhancements.name) { \
2535                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2536                     !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2537                         return false; \
2538                 intel_sdvo_connector->max_##name = data_value[0]; \
2539                 intel_sdvo_connector->cur_##name = response; \
2540                 intel_sdvo_connector->name = \
2541                         drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
2542                 if (!intel_sdvo_connector->name) return false; \
2543                 drm_object_attach_property(&connector->base, \
2544                                               intel_sdvo_connector->name, \
2545                                               intel_sdvo_connector->cur_##name); \
2546                 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2547                               data_value[0], data_value[1], response); \
2548         } \
2549 } while (0)
2550
2551 static bool
2552 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2553                                       struct intel_sdvo_connector *intel_sdvo_connector,
2554                                       struct intel_sdvo_enhancements_reply enhancements)
2555 {
2556         struct drm_device *dev = intel_sdvo->base.base.dev;
2557         struct drm_connector *connector = &intel_sdvo_connector->base.base;
2558         uint16_t response, data_value[2];
2559
2560         /* when horizontal overscan is supported, Add the left/right  property */
2561         if (enhancements.overscan_h) {
2562                 if (!intel_sdvo_get_value(intel_sdvo,
2563                                           SDVO_CMD_GET_MAX_OVERSCAN_H,
2564                                           &data_value, 4))
2565                         return false;
2566
2567                 if (!intel_sdvo_get_value(intel_sdvo,
2568                                           SDVO_CMD_GET_OVERSCAN_H,
2569                                           &response, 2))
2570                         return false;
2571
2572                 intel_sdvo_connector->max_hscan = data_value[0];
2573                 intel_sdvo_connector->left_margin = data_value[0] - response;
2574                 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2575                 intel_sdvo_connector->left =
2576                         drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
2577                 if (!intel_sdvo_connector->left)
2578                         return false;
2579
2580                 drm_object_attach_property(&connector->base,
2581                                               intel_sdvo_connector->left,
2582                                               intel_sdvo_connector->left_margin);
2583
2584                 intel_sdvo_connector->right =
2585                         drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
2586                 if (!intel_sdvo_connector->right)
2587                         return false;
2588
2589                 drm_object_attach_property(&connector->base,
2590                                               intel_sdvo_connector->right,
2591                                               intel_sdvo_connector->right_margin);
2592                 DRM_DEBUG_KMS("h_overscan: max %d, "
2593                               "default %d, current %d\n",
2594                               data_value[0], data_value[1], response);
2595         }
2596
2597         if (enhancements.overscan_v) {
2598                 if (!intel_sdvo_get_value(intel_sdvo,
2599                                           SDVO_CMD_GET_MAX_OVERSCAN_V,
2600                                           &data_value, 4))
2601                         return false;
2602
2603                 if (!intel_sdvo_get_value(intel_sdvo,
2604                                           SDVO_CMD_GET_OVERSCAN_V,
2605                                           &response, 2))
2606                         return false;
2607
2608                 intel_sdvo_connector->max_vscan = data_value[0];
2609                 intel_sdvo_connector->top_margin = data_value[0] - response;
2610                 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2611                 intel_sdvo_connector->top =
2612                         drm_property_create_range(dev, 0,
2613                                             "top_margin", 0, data_value[0]);
2614                 if (!intel_sdvo_connector->top)
2615                         return false;
2616
2617                 drm_object_attach_property(&connector->base,
2618                                               intel_sdvo_connector->top,
2619                                               intel_sdvo_connector->top_margin);
2620
2621                 intel_sdvo_connector->bottom =
2622                         drm_property_create_range(dev, 0,
2623                                             "bottom_margin", 0, data_value[0]);
2624                 if (!intel_sdvo_connector->bottom)
2625                         return false;
2626
2627                 drm_object_attach_property(&connector->base,
2628                                               intel_sdvo_connector->bottom,
2629                                               intel_sdvo_connector->bottom_margin);
2630                 DRM_DEBUG_KMS("v_overscan: max %d, "
2631                               "default %d, current %d\n",
2632                               data_value[0], data_value[1], response);
2633         }
2634
2635         ENHANCEMENT(hpos, HPOS);
2636         ENHANCEMENT(vpos, VPOS);
2637         ENHANCEMENT(saturation, SATURATION);
2638         ENHANCEMENT(contrast, CONTRAST);
2639         ENHANCEMENT(hue, HUE);
2640         ENHANCEMENT(sharpness, SHARPNESS);
2641         ENHANCEMENT(brightness, BRIGHTNESS);
2642         ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2643         ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2644         ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2645         ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2646         ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2647
2648         if (enhancements.dot_crawl) {
2649                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2650                         return false;
2651
2652                 intel_sdvo_connector->max_dot_crawl = 1;
2653                 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2654                 intel_sdvo_connector->dot_crawl =
2655                         drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
2656                 if (!intel_sdvo_connector->dot_crawl)
2657                         return false;
2658
2659                 drm_object_attach_property(&connector->base,
2660                                               intel_sdvo_connector->dot_crawl,
2661                                               intel_sdvo_connector->cur_dot_crawl);
2662                 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2663         }
2664
2665         return true;
2666 }
2667
2668 static bool
2669 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2670                                         struct intel_sdvo_connector *intel_sdvo_connector,
2671                                         struct intel_sdvo_enhancements_reply enhancements)
2672 {
2673         struct drm_device *dev = intel_sdvo->base.base.dev;
2674         struct drm_connector *connector = &intel_sdvo_connector->base.base;
2675         uint16_t response, data_value[2];
2676
2677         ENHANCEMENT(brightness, BRIGHTNESS);
2678
2679         return true;
2680 }
2681 #undef ENHANCEMENT
2682
2683 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2684                                                struct intel_sdvo_connector *intel_sdvo_connector)
2685 {
2686         union {
2687                 struct intel_sdvo_enhancements_reply reply;
2688                 uint16_t response;
2689         } enhancements;
2690
2691         BUILD_BUG_ON(sizeof(enhancements) != 2);
2692
2693         enhancements.response = 0;
2694         intel_sdvo_get_value(intel_sdvo,
2695                              SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2696                              &enhancements, sizeof(enhancements));
2697         if (enhancements.response == 0) {
2698                 DRM_DEBUG_KMS("No enhancement is supported\n");
2699                 return true;
2700         }
2701
2702         if (IS_TV(intel_sdvo_connector))
2703                 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2704         else if (IS_LVDS(intel_sdvo_connector))
2705                 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2706         else
2707                 return true;
2708 }
2709
2710 static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2711                                      struct i2c_msg *msgs,
2712                                      int num)
2713 {
2714         struct intel_sdvo *sdvo = adapter->algo_data;
2715
2716         if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2717                 return -EIO;
2718
2719         return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2720 }
2721
2722 static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2723 {
2724         struct intel_sdvo *sdvo = adapter->algo_data;
2725         return sdvo->i2c->algo->functionality(sdvo->i2c);
2726 }
2727
2728 static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
2729         .master_xfer    = intel_sdvo_ddc_proxy_xfer,
2730         .functionality  = intel_sdvo_ddc_proxy_func
2731 };
2732
2733 static bool
2734 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
2735                           struct drm_device *dev)
2736 {
2737         sdvo->ddc.owner = THIS_MODULE;
2738         sdvo->ddc.class = I2C_CLASS_DDC;
2739         snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2740         sdvo->ddc.dev.parent = &dev->pdev->dev;
2741         sdvo->ddc.algo_data = sdvo;
2742         sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
2743
2744         return i2c_add_adapter(&sdvo->ddc) == 0;
2745 }
2746
2747 bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob)
2748 {
2749         struct drm_i915_private *dev_priv = dev->dev_private;
2750         struct intel_encoder *intel_encoder;
2751         struct intel_sdvo *intel_sdvo;
2752         u32 hotplug_mask;
2753         int i;
2754         intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
2755         if (!intel_sdvo)
2756                 return false;
2757
2758         intel_sdvo->sdvo_reg = sdvo_reg;
2759         intel_sdvo->is_sdvob = is_sdvob;
2760         intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, intel_sdvo) >> 1;
2761         intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
2762         if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev))
2763                 goto err_i2c_bus;
2764
2765         /* encoder type will be decided later */
2766         intel_encoder = &intel_sdvo->base;
2767         intel_encoder->type = INTEL_OUTPUT_SDVO;
2768         drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
2769
2770         /* Read the regs to test if we can talk to the device */
2771         for (i = 0; i < 0x40; i++) {
2772                 u8 byte;
2773
2774                 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
2775                         DRM_DEBUG_KMS("No SDVO device found on %s\n",
2776                                       SDVO_NAME(intel_sdvo));
2777                         goto err;
2778                 }
2779         }
2780
2781         hotplug_mask = 0;
2782         if (IS_G4X(dev)) {
2783                 hotplug_mask = intel_sdvo->is_sdvob ?
2784                         SDVOB_HOTPLUG_INT_STATUS_G4X : SDVOC_HOTPLUG_INT_STATUS_G4X;
2785         } else if (IS_GEN4(dev)) {
2786                 hotplug_mask = intel_sdvo->is_sdvob ?
2787                         SDVOB_HOTPLUG_INT_STATUS_I965 : SDVOC_HOTPLUG_INT_STATUS_I965;
2788         } else {
2789                 hotplug_mask = intel_sdvo->is_sdvob ?
2790                         SDVOB_HOTPLUG_INT_STATUS_I915 : SDVOC_HOTPLUG_INT_STATUS_I915;
2791         }
2792
2793         intel_encoder->compute_config = intel_sdvo_compute_config;
2794         intel_encoder->disable = intel_disable_sdvo;
2795         intel_encoder->mode_set = intel_sdvo_mode_set;
2796         intel_encoder->enable = intel_enable_sdvo;
2797         intel_encoder->get_hw_state = intel_sdvo_get_hw_state;
2798
2799         /* In default case sdvo lvds is false */
2800         if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
2801                 goto err;
2802
2803         if (intel_sdvo_output_setup(intel_sdvo,
2804                                     intel_sdvo->caps.output_flags) != true) {
2805                 DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
2806                               SDVO_NAME(intel_sdvo));
2807                 /* Output_setup can leave behind connectors! */
2808                 goto err_output;
2809         }
2810
2811         /* Only enable the hotplug irq if we need it, to work around noisy
2812          * hotplug lines.
2813          */
2814         if (intel_sdvo->hotplug_active) {
2815                 intel_encoder->hpd_pin =
2816                         intel_sdvo->is_sdvob ?  HPD_SDVO_B : HPD_SDVO_C;
2817         }
2818
2819         /*
2820          * Cloning SDVO with anything is often impossible, since the SDVO
2821          * encoder can request a special input timing mode. And even if that's
2822          * not the case we have evidence that cloning a plain unscaled mode with
2823          * VGA doesn't really work. Furthermore the cloning flags are way too
2824          * simplistic anyway to express such constraints, so just give up on
2825          * cloning for SDVO encoders.
2826          */
2827         intel_sdvo->base.cloneable = false;
2828
2829         intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
2830
2831         /* Set the input timing to the screen. Assume always input 0. */
2832         if (!intel_sdvo_set_target_input(intel_sdvo))
2833                 goto err_output;
2834
2835         if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2836                                                     &intel_sdvo->pixel_clock_min,
2837                                                     &intel_sdvo->pixel_clock_max))
2838                 goto err_output;
2839
2840         DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
2841                         "clock range %dMHz - %dMHz, "
2842                         "input 1: %c, input 2: %c, "
2843                         "output 1: %c, output 2: %c\n",
2844                         SDVO_NAME(intel_sdvo),
2845                         intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
2846                         intel_sdvo->caps.device_rev_id,
2847                         intel_sdvo->pixel_clock_min / 1000,
2848                         intel_sdvo->pixel_clock_max / 1000,
2849                         (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2850                         (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
2851                         /* check currently supported outputs */
2852                         intel_sdvo->caps.output_flags &
2853                         (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
2854                         intel_sdvo->caps.output_flags &
2855                         (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
2856         return true;
2857
2858 err_output:
2859         intel_sdvo_output_cleanup(intel_sdvo);
2860
2861 err:
2862         drm_encoder_cleanup(&intel_encoder->base);
2863         i2c_del_adapter(&intel_sdvo->ddc);
2864 err_i2c_bus:
2865         intel_sdvo_unselect_i2c_bus(intel_sdvo);
2866         kfree(intel_sdvo);
2867
2868         return false;
2869 }