X-Git-Url: https://rtime.felk.cvut.cz/gitweb/l4.git/blobdiff_plain/c06638d2e57a3230381daf1ccce3cf0dfd0eaa92..c02c23b58bcb65fea74d86d33bcc1b094ef97902:/kernel/fiasco/src/kern/ia32/32/cpu-32.cpp diff --git a/kernel/fiasco/src/kern/ia32/32/cpu-32.cpp b/kernel/fiasco/src/kern/ia32/32/cpu-32.cpp index 3225660ae..42fad3744 100644 --- a/kernel/fiasco/src/kern/ia32/32/cpu-32.cpp +++ b/kernel/fiasco/src/kern/ia32/32/cpu-32.cpp @@ -1,5 +1,6 @@ IMPLEMENTATION [ia32,ux]: +#include "mem_layout.h" #include "tss.h" PUBLIC static inline @@ -99,7 +100,7 @@ Cpu::tsc_to_s_and_ns(Unsigned64 tsc, Unsigned32 *s, Unsigned32 *ns) const PUBLIC static inline Unsigned64 -Cpu::rdtsc (void) +Cpu::rdtsc() { Unsigned64 tsc; asm volatile ("rdtsc" : "=A" (tsc)); @@ -113,7 +114,7 @@ Cpu::get_flags() PUBLIC static inline void -Cpu::set_flags (Unsigned32 efl) +Cpu::set_flags(Unsigned32 efl) { asm volatile ("pushl %0 ; popfl" : : "rm" (efl) : "memory"); } IMPLEMENT inline NEEDS["tss.h"] @@ -127,7 +128,7 @@ IMPLEMENTATION[ia32]: PUBLIC static inline void -Cpu:: set_cs () +Cpu:: set_cs() { asm volatile ("ljmp %0,$1f ; 1:" : : "i"(Gdt::gdt_code_kernel | Gdt::Selector_kernel)); @@ -138,13 +139,13 @@ extern "C" Address dbf_stack_top; PUBLIC FIASCO_INIT_CPU void -Cpu::init_tss_dbf (Address tss_dbf_mem, Address kdir) +Cpu::init_tss_dbf(Address tss_dbf_mem, Address kdir) { tss_dbf = reinterpret_cast(tss_dbf_mem); - gdt->set_entry_byte (Gdt::gdt_tss_dbf/8, tss_dbf_mem, sizeof(Tss)-1, - Gdt_entry::Access_kernel | Gdt_entry::Access_tss | - Gdt_entry::Accessed, 0); + gdt->set_entry_byte(Gdt::gdt_tss_dbf/8, tss_dbf_mem, sizeof(Tss)-1, + Gdt_entry::Access_kernel | Gdt_entry::Access_tss | + Gdt_entry::Accessed, 0); tss_dbf->_cs = Gdt::gdt_code_kernel; tss_dbf->_ss = Gdt::gdt_data_kernel; @@ -163,12 +164,12 @@ Cpu::init_tss_dbf (Address tss_dbf_mem, Address kdir) PUBLIC FIASCO_INIT_CPU void -Cpu::init_tss (Address tss_mem, size_t tss_size) +Cpu::init_tss(Address tss_mem, size_t tss_size) { tss = reinterpret_cast(tss_mem); - gdt->set_entry_byte (Gdt::gdt_tss/8, tss_mem, tss_size, - Gdt_entry::Access_kernel | Gdt_entry::Access_tss, 0); + gdt->set_entry_byte(Gdt::gdt_tss/8, tss_mem, tss_size, + Gdt_entry::Access_kernel | Gdt_entry::Access_tss, 0); tss->set_ss0(Gdt::gdt_data_kernel); tss->_io_bit_map_offset = Mem_layout::Io_bitmap - tss_mem; @@ -177,7 +178,7 @@ Cpu::init_tss (Address tss_mem, size_t tss_size) PUBLIC FIASCO_INIT_CPU void -Cpu::init_gdt (Address gdt_mem, Address user_max) +Cpu::init_gdt(Address gdt_mem, Address user_max) { gdt = reinterpret_cast(gdt_mem); @@ -185,22 +186,22 @@ Cpu::init_gdt (Address gdt_mem, Address user_max) // cache line, respectively; pre-set all "accessed" flags so that // the CPU doesn't need to do this later - gdt->set_entry_4k (Gdt::gdt_code_kernel/8, 0, 0xffffffff, - Gdt_entry::Access_kernel | - Gdt_entry::Access_code_read | - Gdt_entry::Accessed, Gdt_entry::Size_32); - gdt->set_entry_4k (Gdt::gdt_data_kernel/8, 0, 0xffffffff, - Gdt_entry::Access_kernel | - Gdt_entry::Access_data_write | - Gdt_entry::Accessed, Gdt_entry::Size_32); - gdt->set_entry_4k (Gdt::gdt_code_user/8, 0, user_max, - Gdt_entry::Access_user | - Gdt_entry::Access_code_read | - Gdt_entry::Accessed, Gdt_entry::Size_32); - gdt->set_entry_4k (Gdt::gdt_data_user/8, 0, user_max, - Gdt_entry::Access_user | - Gdt_entry::Access_data_write | - Gdt_entry::Accessed, Gdt_entry::Size_32); + gdt->set_entry_4k(Gdt::gdt_code_kernel/8, 0, 0xffffffff, + Gdt_entry::Access_kernel | + Gdt_entry::Access_code_read | + Gdt_entry::Accessed, Gdt_entry::Size_32); + gdt->set_entry_4k(Gdt::gdt_data_kernel/8, 0, 0xffffffff, + Gdt_entry::Access_kernel | + Gdt_entry::Access_data_write | + Gdt_entry::Accessed, Gdt_entry::Size_32); + gdt->set_entry_4k(Gdt::gdt_code_user/8, 0, user_max, + Gdt_entry::Access_user | + Gdt_entry::Access_code_read | + Gdt_entry::Accessed, Gdt_entry::Size_32); + gdt->set_entry_4k(Gdt::gdt_data_user/8, 0, user_max, + Gdt_entry::Access_user | + Gdt_entry::Access_data_write | + Gdt_entry::Accessed, Gdt_entry::Size_32); }