#include <stdint.h>
#include "tests/sys_mman.h"
+#include "tests/malloc.h" // memalign16
+
+#define STATIC_ASSERT(e) sizeof(struct { int:-!(e); })
/* Something of the same size as void*, so can be safely be coerced
- to/from a pointer type. Also same size as the host's gp registers. */
+ * to/from a pointer type. Also same size as the host's gp registers.
+ * According to the AltiVec section of the GCC manual, the syntax does
+ * not allow the use of a typedef name as a type specifier in conjunction
+ * with the vector keyword, so typedefs uint[32|64]_t are #undef'ed here
+ * and redefined using #define.
+ */
+#undef uint32_t
+#undef uint64_t
+#define uint32_t unsigned int
+#define uint64_t unsigned long long int
+
#ifndef __powerpc64__
typedef uint32_t HWord_t;
#else
typedef uint64_t HWord_t;
-#endif // #ifndef __powerpc64__
+#endif /* __powerpc64__ */
+enum {
+ compile_time_test1 = STATIC_ASSERT(sizeof(uint32_t) == 4),
+ compile_time_test2 = STATIC_ASSERT(sizeof(uint64_t) == 8),
+};
#define ALLCR "cr0","cr1","cr2","cr3","cr4","cr5","cr6","cr7"
/* XXXX these must all be callee-save regs! */
-register double f14 __asm__ ("f14");
-register double f15 __asm__ ("f15");
-register double f16 __asm__ ("f16");
-register double f17 __asm__ ("f17");
+register double f14 __asm__ ("fr14");
+register double f15 __asm__ ("fr15");
+register double f16 __asm__ ("fr16");
+register double f17 __asm__ ("fr17");
register HWord_t r14 __asm__ ("r14");
register HWord_t r15 __asm__ ("r15");
register HWord_t r16 __asm__ ("r16");
register HWord_t r17 __asm__ ("r17");
-#include "config.h"
-#if defined (HAVE_ALTIVEC_H)
+#include "config.h" // HAS_ALTIVEC
+#if defined (HAS_ALTIVEC)
# include <altivec.h>
#endif
#include <assert.h>
#ifndef __powerpc64__
printf("%s %08x, %08x, %08x => %08x (%08x %08x)\n",
#else
- printf("%s %016lx, %016lx, %016lx => %016lx (%08x %08x)\n",
+ printf("%s %016llx, %016llx, %016llx => %016llx (%08x %08x)\n",
#endif
name, iargs[i], iargs[j], iargs[k], res, flags, xer);
}
printf("%s %08x, %08x => %08x (%08x %08x)\n",
#else
if (zap_hi32) res &= 0xFFFFFFFFULL;
- printf("%s %016lx, %016lx => %016lx (%08x %08x)\n",
+ printf("%s %016llx, %016llx => %016llx (%08x %08x)\n",
#endif
name, iargs[i], iargs[j], res, flags, xer);
}
#ifndef __powerpc64__
printf("%s %08x => %08x (%08x %08x)\n",
#else
- printf("%s %016lx => %016lx (%08x %08x)\n",
+ printf("%s %016llx => %016llx (%08x %08x)\n",
#endif
name, iargs[i], res, flags, xer);
}
#ifndef __powerpc64__
printf("%s %08x, %08x => %08x (%08x %08x)\n",
#else
- printf("%s %016lx, %08x => %016lx (%08x %08x)\n",
+ printf("%s %016llx, %08x => %016llx (%08x %08x)\n",
#endif
name, iargs[i], ii16[j], res, flags, xer);
}
#ifndef __powerpc64__
printf("%s %08x, %2d, %2d, %2d => %08x (%08x %08x)\n",
#else
- printf("%s %016lx, %2d, %2d, %2d => %016lx (%08x %08x)\n",
+ printf("%s %016llx, %2d, %2d, %2d => %016llx (%08x %08x)\n",
#endif
name, iargs[i], j, k, l, res, flags, xer);
}
#ifndef __powerpc64__
printf("%s %08x, %08x, %2d, %2d => %08x (%08x %08x)\n",
#else
- printf("%s %016lx, %016lx, %2d, %2d => %016lx (%08x %08x)\n",
+ printf("%s %016llx, %016llx, %2d, %2d => %016llx (%08x %08x)\n",
#endif
name, iargs[i], iargs[j], k, l, res, flags, xer);
}
#ifndef __powerpc64__
printf("%s %08x, %2d => %08x (%08x %08x)\n",
#else
- printf("%s %016lx, %2d => %016lx (%08x %08x)\n",
+ printf("%s %016llx, %2d => %016llx (%08x %08x)\n",
#endif
name, iargs[i], j, res, flags, xer);
}
#ifndef __powerpc64__
printf("%s %d, %d (%08x) => (%08x %08x)\n",
#else
- printf("%s %d, %d (%016lx) => (%08x %08x)\n",
+ printf("%s %d, %d (%016llx) => (%08x %08x)\n",
#endif
name, j, k, iargs[i], flags, xer);
}
#ifndef __powerpc64__
printf("%s (%08x) => %08x (%08x %08x)\n",
#else
- printf("%s (%016lx) => %016lx (%08x %08x)\n",
+ printf("%s (%016llx) => %016llx (%08x %08x)\n",
#endif
name, iargs[i], res, flags, xer);
}
#ifndef __powerpc64__
printf("%s 1 (%08x) -> mtxer -> mfxer => %08x\n",
#else
- printf("%s 1 (%08x) -> mtxer -> mfxer => %016lx\n",
+ printf("%s 1 (%08x) -> mtxer -> mfxer => %016llx\n",
#endif
name, j, res);
}
#ifndef __powerpc64__
printf("%s 8 (%08x) -> mtlr -> mflr => %08x\n",
#else
- printf("%s 8 (%08x) -> mtlr -> mflr => %016lx\n",
+ printf("%s 8 (%08x) -> mtlr -> mflr => %016llx\n",
#endif
name, j, res);
}
#ifndef __powerpc64__
printf("%s 9 (%08x) -> mtctr -> mfctr => %08x\n",
#else
- printf("%s 9 (%08x) -> mtctr -> mfctr => %016lx\n",
+ printf("%s 9 (%08x) -> mtctr -> mfctr => %016llx\n",
#endif
name, j, res);
}
#ifndef __powerpc64__
printf("%s %3d, %08x => (%08x %08x)\n",
#else
- printf("%s %3d, %016lx => (%08x %08x)\n",
+ printf("%s %3d, %016llx => (%08x %08x)\n",
#endif
name, j, iargs[i], flags, xer);
}
GET_CR_XER(flags,xer);
res = r17;
- printf("%s %016lx, %016lx, %2d => %016lx (%08x %08x)\n",
+ printf("%s %016llx, %016llx, %2d => %016llx (%08x %08x)\n",
name, iargs[i], iargs[j], k, res, flags, xer);
}
if (verbose) printf("\n");
GET_CR_XER(flags,xer);
res = r17;
- printf("%s %016lx, %2d, %2d => %016lx (%08x %08x)\n",
+ printf("%s %016llx, %2d, %2d => %016llx (%08x %08x)\n",
name, iargs[i], j, k, res, flags, xer);
}
if (verbose) printf("\n");
GET_CR_XER(flags,xer);
res = r17;
- printf("%s %016lx, %2d => %016lx (%08x %08x)\n",
+ printf("%s %016llx, %2d => %016llx (%08x %08x)\n",
name, iargs[i], j, res, flags, xer);
}
if (verbose) printf("\n");
#ifndef __powerpc64__
printf("%s %2d, (%08x) => %08x, %2d (%08x %08x)\n",
#else
- printf("%s %3d, (%016lx) => %016lx, %3ld (%08x %08x)\n",
+ printf("%s %3d, (%016llx) => %016llx, %3lld (%08x %08x)\n",
#endif
name, offs, iargs[i], res, r14-base, flags, xer);
}
#ifndef __powerpc64__
printf("%s %2d, (%08x) => %08x, %2d (%08x %08x)\n",
#else
- printf("%s %3d, (%016lx) => %016lx, %3ld (%08x %08x)\n",
+ printf("%s %3d, (%016llx) => %016llx, %3lld (%08x %08x)\n",
#endif
name, offs, iargs[nb_iargs-1+i], res, r14-base, flags, xer);
}
#ifndef __powerpc64__
printf("%s %d (%08x) => %08x, %d (%08x %08x)\n",
#else
- printf("%s %3d, (%016lx) => %016lx, %2ld (%08x %08x)\n",
+ printf("%s %3d, (%016llx) => %016llx, %2lld (%08x %08x)\n",
#endif
name, offs, iargs[i], res, r14-base, flags, xer);
}
#ifndef __powerpc64__
printf("%s %08x, %2d => %08x, %2d (%08x %08x)\n",
#else
- printf("%s %016lx, %3d => %016lx, %3ld (%08x %08x)\n",
+ printf("%s %016llx, %3d => %016llx, %3lld (%08x %08x)\n",
#endif
name, iargs[i], offs, iargs_priv[i], r15-base, flags, xer);
}
#ifndef __powerpc64__
printf("%s %08x, %2d => %08x, %2d (%08x %08x)\n",
#else
- printf("%s %016lx, %3d => %016lx, %3ld (%08x %08x)\n",
+ printf("%s %016llx, %3d => %016llx, %3lld (%08x %08x)\n",
#endif
name, iargs[nb_iargs-1+i], offs, iargs_priv[nb_iargs-1+i],
r15-base, flags, xer);
#ifndef __powerpc64__
printf("%s %08x, %d => %08x, %d (%08x %08x)\n",
#else
- printf("%s %016lx, %3d => %016lx, %2ld (%08x %08x)\n",
+ printf("%s %016llx, %3d => %016llx, %2lld (%08x %08x)\n",
#endif
name, iargs[i], offs, iargs_priv[i], r15-base, flags, xer);
}
#ifndef __powerpc64__
printf("%s %016llx, %016llx, %016llx => %016llx",
#else
- printf("%s %016lx, %016lx, %016lx => %016lx",
+ printf("%s %016llx, %016llx, %016llx => %016llx",
#endif
name, u0, u1, u2, ur);
#if defined TEST_FLOAT_FLAGS
#ifndef __powerpc64__
printf("%s %016llx, %016llx => %016llx",
#else
- printf("%s %016lx, %016lx => %016lx",
+ printf("%s %016llx, %016llx => %016llx",
#endif
name, u0, u1, ur);
#if defined TEST_FLOAT_FLAGS
#ifndef __powerpc64__
printf("%s %016llx => %016llx",
#else
- printf("%s %016lx => %016lx",
+ printf("%s %016llx => %016llx",
#endif
name, u0, ur);
#if defined TEST_FLOAT_FLAGS
#ifndef __powerpc64__
printf("%s %016llx, %4d => %016llx, %4d",
#else
- printf("%s %016lx, %4d => %016lx, %4ld",
+ printf("%s %016llx, %4d => %016llx, %4lld",
#endif
name, double_to_bits(src), offs,
double_to_bits(res), r14-base);
#ifndef __powerpc64__
printf("%s %016llx, %4d => %016llx, %4d",
#else
- printf("%s %016lx, %4ld => %016lx, %4ld",
+ printf("%s %016llx, %4lld => %016llx, %4lld",
#endif
name, double_to_bits(src), r15/*offs*/,
double_to_bits(res), r14-base);
#ifndef __powerpc64__
printf("%s %016llx, %4d => %016llx, %4d",
#else
- printf("%s %016lx, %4d => %016lx, %4ld",
+ printf("%s %016llx, %4d => %016llx, %4lld",
#endif
name, double_to_bits(src), offs,
double_to_bits(*p_dst), r15-base);
#ifndef __powerpc64__
printf("%s %016llx, %4d => %016llx, %4d",
#else
- printf("%s %016lx, %4ld => %016lx, %4ld",
+ printf("%s %016llx, %4lld => %016llx, %4lld",
#endif
name, double_to_bits(src), r16/*offs*/,
double_to_bits(*p_dst), r15-base);
#ifndef __powerpc64__
printf("%s %016llx (%014e), %4d => %016llx (%014e), %08x (%08x %08x)\n",
#else
- printf("%s %016lx (%014e), %4d => %016lx (%014e), %08x (%08x %08x)\n",
+ printf("%s %016llx (%014e), %4d => %016llx (%014e), %08x (%08x %08x)\n",
#endif
name, double_to_bits(src), src, offs,
double_to_bits(*p_dst), *p_dst, r15, flags, xer);
#ifndef __powerpc64__
printf("%s %016llx (%014e), %4d => %08x (%f), %08x (%08x %08x)\n",
#else
- printf("%s %016lx (%014e), %4d => %08x (%f), %08x (%08x %08x)\n",
+ printf("%s %016llx (%014e), %4d => %08x (%f), %08x (%08x %08x)\n",
#endif
name, double_to_bits(src), src, offs,
(uint32_t)(double_to_bits(*p_dst) >> 32),
volatile vector unsigned int v2 =
// (vector unsigned int){ 0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF };
(vector unsigned int){ 0x01010101,0x01010101,0x01010101,0x01010101 };
- //__asm__ __volatile__ ("vcmpequw. 31,%0,%1" : : "vr" (v1), "vr" (v2)); // sets CR[6]
- //__asm__ __volatile__ ("vpkswss 31,%0,%1" : : "vr" (v1), "vr" (v2)); // sets VSCR[SAT]
- __asm__ __volatile__ ("vsubsbs 31,%0,%1" : : "vr" (v1), "vr" (v2)); // sets VSCR[SAT]
+ //__asm__ __volatile__ ("vcmpequw. 31,%0,%1" : : "v" (v1), "v" (v2)); // sets CR[6]
+ //__asm__ __volatile__ ("vpkswss 31,%0,%1" : : "v" (v1), "v" (v2)); // sets VSCR[SAT]
+ __asm__ __volatile__ ("vsubsbs 31,%0,%1" : : "v" (v1), "v" (v2)); // sets VSCR[SAT]
*/
//#define DEFAULT_VSCR 0x00010000
// reset VSCR and CR
vscr = (vector unsigned int){ 0,0,0,DEFAULT_VSCR };
flags = 0;
- __asm__ __volatile__ ("mtvscr %0" : : "vr" (vscr) );
+ __asm__ __volatile__ ("mtvscr %0" : : "v" (vscr) );
__asm__ __volatile__ ("mtcr %0" : : "r" (flags));
// load input -> r14
- __asm__ __volatile__ ("vor 14,%0,%0" : : "vr" (vec_in));
+ __asm__ __volatile__ ("vor 14,%0,%0" : : "v" (vec_in));
// do stuff
(*func)();
/* Restore flags */
__asm__ __volatile__ ("mtcr %0" : : "r" (tmpcr));
- __asm__ __volatile__ ("mtvscr %0" : : "vr" (tmpvscr));
+ __asm__ __volatile__ ("mtvscr %0" : : "v" (tmpvscr));
src = (unsigned int*)&vec_in;
dst = (unsigned int*)&vec_out;
// reset VSCR and CR
vscr = (vector unsigned int){ 0,0,0,DEFAULT_VSCR };
flags = 0;
- __asm__ __volatile__ ("mtvscr %0" : : "vr" (vscr) );
+ __asm__ __volatile__ ("mtvscr %0" : : "v" (vscr) );
__asm__ __volatile__ ("mtcr %0" : : "r" (flags));
// load inputs -> r14,r15
- __asm__ __volatile__ ("vor 14,%0,%0" : : "vr" (vec_in1));
- __asm__ __volatile__ ("vor 15,%0,%0" : : "vr" (vec_in2));
+ __asm__ __volatile__ ("vor 14,%0,%0" : : "v" (vec_in1));
+ __asm__ __volatile__ ("vor 15,%0,%0" : : "v" (vec_in2));
// do stuff
(*func)();
/* Restore flags */
__asm__ __volatile__ ("mtcr %0" : : "r" (tmpcr));
- __asm__ __volatile__ ("mtvscr %0" : : "vr" (tmpvscr));
+ __asm__ __volatile__ ("mtvscr %0" : : "v" (tmpvscr));
src1 = (unsigned int*)&vec_in1;
src2 = (unsigned int*)&vec_in2;
// reset VSCR and CR
vscr = (vector unsigned int){ 0,0,0,DEFAULT_VSCR };
flags = 0;
- __asm__ __volatile__ ("mtvscr %0" : : "vr" (vscr) );
+ __asm__ __volatile__ ("mtvscr %0" : : "v" (vscr) );
__asm__ __volatile__ ("mtcr %0" : : "r" (flags));
// load inputs -> r14,r15,r16
- __asm__ __volatile__ ("vor 14,%0,%0" : : "vr" (vec_in1));
- __asm__ __volatile__ ("vor 15,%0,%0" : : "vr" (vec_in2));
- __asm__ __volatile__ ("vor 16,%0,%0" : : "vr" (vec_in3));
+ __asm__ __volatile__ ("vor 14,%0,%0" : : "v" (vec_in1));
+ __asm__ __volatile__ ("vor 15,%0,%0" : : "v" (vec_in2));
+ __asm__ __volatile__ ("vor 16,%0,%0" : : "v" (vec_in3));
// do stuff
(*func)();
/* Restore flags */
__asm__ __volatile__ ("mtcr %0" : : "r" (tmpcr));
- __asm__ __volatile__ ("mtvscr %0" : : "vr" (tmpvscr));
+ __asm__ __volatile__ ("mtvscr %0" : : "v" (tmpvscr));
src1 = (unsigned int*)&vec_in1;
src2 = (unsigned int*)&vec_in2;
// reset VSCR and CR
vscr = (vector unsigned int){ 0,0,0,DEFAULT_VSCR };
flags = 0;
- __asm__ __volatile__ ("mtvscr %0" : : "vr" (vscr) );
+ __asm__ __volatile__ ("mtvscr %0" : : "v" (vscr) );
__asm__ __volatile__ ("mtcr %0" : : "r" (flags));
// load inputs -> r14,r15
- __asm__ __volatile__ ("vor 14,%0,%0" : : "vr" (vec_in1));
- __asm__ __volatile__ ("vor 15,%0,%0" : : "vr" (vec_shft));
+ __asm__ __volatile__ ("vor 14,%0,%0" : : "v" (vec_in1));
+ __asm__ __volatile__ ("vor 15,%0,%0" : : "v" (vec_shft));
// do stuff
(*func)();
/* Restore flags */
__asm__ __volatile__ ("mtcr %0" : : "r" (tmpcr));
- __asm__ __volatile__ ("mtvscr %0" : : "vr" (tmpvscr));
+ __asm__ __volatile__ ("mtvscr %0" : : "v" (tmpvscr));
src1 = (unsigned int*)&vec_in1;
src2 = (unsigned int*)&vec_shft;
// reset VSCR and CR
vscr = (vector unsigned int){ 0,0,0,DEFAULT_VSCR };
flags = 0;
- __asm__ __volatile__ ("mtvscr %0" : : "vr" (vscr) );
+ __asm__ __volatile__ ("mtvscr %0" : : "v" (vscr) );
__asm__ __volatile__ ("mtcr %0" : : "r" (flags));
// load input -> r14
- __asm__ __volatile__ ("vor 14,%0,%0" : : "vr" (vec_in1));
+ __asm__ __volatile__ ("vor 14,%0,%0" : : "v" (vec_in1));
// do stuff
(*func)();
/* Restore flags */
__asm__ __volatile__ ("mtcr %0" : : "r" (tmpcr));
- __asm__ __volatile__ ("mtvscr %0" : : "vr" (tmpvscr));
+ __asm__ __volatile__ ("mtvscr %0" : : "v" (tmpvscr));
src1 = (unsigned int*)&vec_in1;
dst = (unsigned int*)&vec_out;
// reset VSCR and CR
vscr = (vector unsigned int){ 0,0,0,DEFAULT_VSCR };
flags = 0;
- __asm__ __volatile__ ("mtvscr %0" : : "vr" (vscr) );
+ __asm__ __volatile__ ("mtvscr %0" : : "v" (vscr) );
__asm__ __volatile__ ("mtcr %0" : : "r" (flags));
// do stuff
/* Restore flags */
__asm__ __volatile__ ("mtcr %0" : : "r" (tmpcr));
- __asm__ __volatile__ ("mtvscr %0" : : "vr" (tmpvscr));
+ __asm__ __volatile__ ("mtvscr %0" : : "v" (tmpvscr));
dst = (unsigned int*)&vec_out;
// reset VSCR and CR
vscr = (vector unsigned int){ 0,0,0,DEFAULT_VSCR };
flags = 0;
- __asm__ __volatile__ ("mtvscr %0" : : "vr" (vscr) );
+ __asm__ __volatile__ ("mtvscr %0" : : "v" (vscr) );
__asm__ __volatile__ ("mtcr %0" : : "r" (flags));
// load inputs -> r14,r15
- __asm__ __volatile__ ("vor 14,%0,%0" : : "vr" (vec_in1));
- __asm__ __volatile__ ("vor 15,%0,%0" : : "vr" (vec_in2));
+ __asm__ __volatile__ ("vor 14,%0,%0" : : "v" (vec_in1));
+ __asm__ __volatile__ ("vor 15,%0,%0" : : "v" (vec_in2));
// do stuff
(*func)();
/* Restore flags */
__asm__ __volatile__ ("mtcr %0" : : "r" (tmpcr));
- __asm__ __volatile__ ("mtvscr %0" : : "vr" (tmpvscr));
+ __asm__ __volatile__ ("mtvscr %0" : : "v" (tmpvscr));
src1 = (unsigned int*)&vec_in1;
src2 = (unsigned int*)&vec_in2;
// reset VSCR and CR
vscr = (vector unsigned int){ 0,0,0,DEFAULT_VSCR };
flags = 0;
- __asm__ __volatile__ ("mtvscr %0" : : "vr" (vscr) );
+ __asm__ __volatile__ ("mtvscr %0" : : "v" (vscr) );
__asm__ __volatile__ ("mtcr %0" : : "r" (flags));
// do stuff
/* Restore flags */
__asm__ __volatile__ ("mtcr %0" : : "r" (tmpcr));
- __asm__ __volatile__ ("mtvscr %0" : : "vr" (tmpvscr));
+ __asm__ __volatile__ ("mtvscr %0" : : "v" (tmpvscr));
dst = (unsigned int*)&vec_out;
// reset VSCR and CR
vscr = (vector unsigned int){ 0,0,0,DEFAULT_VSCR };
flags = 0;
- __asm__ __volatile__ ("mtvscr %0" : : "vr" (vscr) );
+ __asm__ __volatile__ ("mtvscr %0" : : "v" (vscr) );
__asm__ __volatile__ ("mtcr %0" : : "r" (flags));
// do stuff
/* Restore flags */
__asm__ __volatile__ ("mtcr %0" : : "r" (tmpcr));
- __asm__ __volatile__ ("mtvscr %0" : : "vr" (tmpvscr));
+ __asm__ __volatile__ ("mtvscr %0" : : "v" (tmpvscr));
vec_in = (vector unsigned int)viargs[i];
src = (unsigned int*)&vec_in;
// reset VSCR and CR
vscr = (vector unsigned int){ 0,0,0,DEFAULT_VSCR };
flags = 0;
- __asm__ __volatile__ ("mtvscr %0" : : "vr" (vscr) );
+ __asm__ __volatile__ ("mtvscr %0" : : "v" (vscr) );
__asm__ __volatile__ ("mtcr %0" : : "r" (flags));
// load inputs -> r14
- __asm__ __volatile__ ("vor 14,%0,%0" : : "vr" (vec_in));
+ __asm__ __volatile__ ("vor 14,%0,%0" : : "v" (vec_in));
// do stuff
(*func)();
/* Restore flags */
__asm__ __volatile__ ("mtcr %0" : : "r" (tmpcr));
- __asm__ __volatile__ ("mtvscr %0" : : "vr" (tmpvscr));
+ __asm__ __volatile__ ("mtvscr %0" : : "v" (tmpvscr));
vec_out = (vector unsigned int)viargs_priv[i];
src = (unsigned int*)&vec_in;
// reset VSCR and CR
vscr = (vector unsigned int){ 0,0,0,DEFAULT_VSCR };
flags = 0;
- __asm__ __volatile__ ("mtvscr %0" : : "vr" (vscr) );
+ __asm__ __volatile__ ("mtvscr %0" : : "v" (vscr) );
__asm__ __volatile__ ("mtcr %0" : : "r" (flags));
// load input -> r14
- __asm__ __volatile__ ("vor 14,%0,%0" : : "vr" (vec_in));
+ __asm__ __volatile__ ("vor 14,%0,%0" : : "v" (vec_in));
// do stuff
(*func)();
/* Restore flags */
__asm__ __volatile__ ("mtcr %0" : : "r" (tmpcr));
- __asm__ __volatile__ ("mtvscr %0" : : "vr" (tmpvscr));
+ __asm__ __volatile__ ("mtvscr %0" : : "v" (tmpvscr));
src = (unsigned int*)&vec_in;
dst = (unsigned int*)&vec_out;
// reset VSCR and CR
vscr = (vector unsigned int){ 0,0,0,DEFAULT_VSCR };
flags = 0;
- __asm__ __volatile__ ("mtvscr %0" : : "vr" (vscr) );
+ __asm__ __volatile__ ("mtvscr %0" : : "v" (vscr) );
__asm__ __volatile__ ("mtcr %0" : : "r" (flags));
// load inputs -> r14,r15
- __asm__ __volatile__ ("vor 14,%0,%0" : : "vr" (vec_in1));
- __asm__ __volatile__ ("vor 15,%0,%0" : : "vr" (vec_in2));
+ __asm__ __volatile__ ("vor 14,%0,%0" : : "v" (vec_in1));
+ __asm__ __volatile__ ("vor 15,%0,%0" : : "v" (vec_in2));
// do stuff
(*func)();
/* Restore flags */
__asm__ __volatile__ ("mtcr %0" : : "r" (tmpcr));
- __asm__ __volatile__ ("mtvscr %0" : : "vr" (tmpvscr));
+ __asm__ __volatile__ ("mtvscr %0" : : "v" (tmpvscr));
src1 = (unsigned int*)&vec_in1;
src2 = (unsigned int*)&vec_in2;
// reset VSCR and CR
vscr = (vector unsigned int){ 0,0,0,DEFAULT_VSCR };
flags = 0;
- __asm__ __volatile__ ("mtvscr %0" : : "vr" (vscr) );
+ __asm__ __volatile__ ("mtvscr %0" : : "v" (vscr) );
__asm__ __volatile__ ("mtcr %0" : : "r" (flags));
// load inputs -> r14,r15,r16
- __asm__ __volatile__ ("vor 14,%0,%0" : : "vr" (vec_in1));
- __asm__ __volatile__ ("vor 15,%0,%0" : : "vr" (vec_in2));
- __asm__ __volatile__ ("vor 16,%0,%0" : : "vr" (vec_in3));
+ __asm__ __volatile__ ("vor 14,%0,%0" : : "v" (vec_in1));
+ __asm__ __volatile__ ("vor 15,%0,%0" : : "v" (vec_in2));
+ __asm__ __volatile__ ("vor 16,%0,%0" : : "v" (vec_in3));
// do stuff
(*func)();
/* Restore flags */
__asm__ __volatile__ ("mtcr %0" : : "r" (tmpcr));
- __asm__ __volatile__ ("mtvscr %0" : : "vr" (tmpvscr));
+ __asm__ __volatile__ ("mtvscr %0" : : "v" (tmpvscr));
src1 = (unsigned int*)&vec_in1;
src2 = (unsigned int*)&vec_in2;
// reset VSCR and CR
vscr = (vector unsigned int){ 0,0,0,DEFAULT_VSCR };
flags = 0;
- __asm__ __volatile__ ("mtvscr %0" : : "vr" (vscr) );
+ __asm__ __volatile__ ("mtvscr %0" : : "v" (vscr) );
__asm__ __volatile__ ("mtcr %0" : : "r" (flags));
// load input -> r14
- __asm__ __volatile__ ("vor 14,%0,%0" : : "vr" (vec_in));
+ __asm__ __volatile__ ("vor 14,%0,%0" : : "v" (vec_in));
// do stuff
(*func)();
/* Restore flags */
__asm__ __volatile__ ("mtcr %0" : : "r" (tmpcr));
- __asm__ __volatile__ ("mtvscr %0" : : "vr" (tmpvscr));
+ __asm__ __volatile__ ("mtvscr %0" : : "v" (tmpvscr));
src = (unsigned int*)&vec_in;
dst = (unsigned int*)&vec_out;