]> rtime.felk.cvut.cz Git - l4.git/blobdiff - kernel/fiasco/src/kern/arm/bsp/realview/mem_layout-arm-realview.cpp
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[l4.git] / kernel / fiasco / src / kern / arm / bsp / realview / mem_layout-arm-realview.cpp
index 93fac475110ec75ee927979f6e4d87aeedbe75c5..d33d22446311de27d523d873758513bc680686f4 100644 (file)
@@ -1,38 +1,40 @@
-INTERFACE [arm && realview]: //---------------------------------------------
+INTERFACE [arm && realview]: // -------------------------------------------
 
 #include "globalconfig.h"
 
 EXTENSION class Mem_layout
 {
 public:
-  enum Virt_layout_realview {
-    Devices0_map_base      = Registers_map_start,
-      System_regs_map_base = Devices0_map_base,
-      System_ctrl_map_base = Devices0_map_base + 0x00001000,
-      Uart0_map_base       = Devices0_map_base + 0x00009000,
-      Uart1_map_base       = Devices0_map_base + 0x0000a000,
-      Uart2_map_base       = Devices0_map_base + 0x0000b000,
-      Uart3_map_base       = Devices0_map_base + 0x0000c000,
-      Timer0_map_base      = Devices0_map_base + 0x00011000,
-      Timer1_map_base      = Devices0_map_base + 0x00011020,
-      Timer2_map_base      = Devices0_map_base + 0x00012000,
-      Timer3_map_base      = Devices0_map_base + 0x00012020,
-      Uart_base            = Uart0_map_base,
-
-    Devices1_map_base      = Registers_map_start + 0x00100000,
-    Devices2_map_base      = Registers_map_start + 0x00200000,
+  enum Phys_layout_realview_all : Address {
+    Sdram_phys_base      = CONFIG_PF_REALVIEW_RAM_PHYS_BASE,
+    Flush_area_phys_base = 0xe0000000,
   };
+};
 
-  enum Phys_layout_realview {
-    Devices0_phys_base   = 0x10000000,
-    System_regs_phys_base= Devices0_phys_base,
-    System_ctrl_phys_base= Devices0_phys_base + 0x00001000,
-    Uart0_phys_base      = Devices0_phys_base + 0x00009000,
-    Timer0_1_phys_base   = Devices0_phys_base + 0x00011000,
-    Timer2_3_phys_base   = Devices0_phys_base + 0x00012000,
-    Sdram_phys_base      = CONFIG_PF_REALVIEW_RAM_PHYS_BASE,
+// ------------------------------------------------------------------------
+INTERFACE [arm && realview && (realview_eb || realview_pb11mp || realview_pbx || realview_vexpress)]:
 
-    Flush_area_phys_base = 0xe0000000,
+#include "globalconfig.h"
+
+EXTENSION class Mem_layout
+{
+public:
+  enum Virt_layout_realview : Address {
+    System_regs_map_base = Devices0_map_base,
+    System_ctrl_map_base = Devices0_map_base + 0x00001000,
+    Uart0_map_base       = Devices0_map_base + 0x00009000,
+    Uart1_map_base       = Devices0_map_base + 0x0000a000,
+    Uart2_map_base       = Devices0_map_base + 0x0000b000,
+    Uart3_map_base       = Devices0_map_base + 0x0000c000,
+    Timer0_map_base      = Devices0_map_base + 0x00011000,
+    Timer1_map_base      = Devices0_map_base + 0x00011020,
+    Timer2_map_base      = Devices0_map_base + 0x00012000,
+    Timer3_map_base      = Devices0_map_base + 0x00012020,
+    Uart_base            = Uart0_map_base,
+  };
+
+  enum Phys_layout_realview : Address {
+    Devices0_phys_base   = 0x10000000,
   };
 };
 
@@ -42,14 +44,14 @@ INTERFACE [arm && realview && realview_eb && !(mpcore || armca9)]:
 EXTENSION class Mem_layout
 {
 public:
-  enum Virt_layout_realview_single {
+  enum Virt_layout_realview_single : Address {
     Gic_cpu_map_base    = Devices0_map_base  + 0x00040000,
-    Gic_dist_map_base   = Gic_cpu_map_base + 0x00001000,
+    Gic_dist_map_base   = Gic_cpu_map_base   + 0x00001000,
   };
 
-  enum Phys_layout_realview_single {
-    Gic_cpu_phys_base   = Devices0_phys_base  + 0x00040000,
-    Gic_dist_phys_base  = Gic_cpu_phys_base + 0x00001000,
+  enum Phys_layout_realview_single : Address {
+    Devices1_phys_base   = Invalid_address,
+    Devices2_phys_base   = Invalid_address,
   };
 };
 
@@ -59,30 +61,26 @@ INTERFACE [arm && realview && realview_eb && (mpcore || armca9)]:
 EXTENSION class Mem_layout
 {
 public:
-  enum Virt_layout_realview_mp {
+  enum Virt_layout_realview_mp : Address {
     Mp_scu_map_base      = Devices1_map_base,
     Gic_cpu_map_base     = Devices1_map_base + 0x00000100,
     Gic_dist_map_base    = Devices1_map_base + 0x00001000,
-    L220_map_base        = Devices1_map_base + 0x00002000,
+    L2cxx0_map_base      = Devices1_map_base + 0x00002000,
 
     Gic1_cpu_map_base    = Devices0_map_base + 0x00040000,
     Gic1_dist_map_base   = Devices0_map_base + 0x00041000,
+
+    Gic2_cpu_map_base    = Devices0_map_base + 0x00050000,
+    Gic2_dist_map_base   = Devices0_map_base + 0x00051000,
+    Gic3_cpu_map_base    = Devices0_map_base + 0x00060000,
+    Gic3_dist_map_base   = Devices0_map_base + 0x00061000,
+    Gic4_cpu_map_base    = Devices0_map_base + 0x00070000,
+    Gic4_dist_map_base   = Devices0_map_base + 0x00071000,
   };
 
-  enum Phys_layout_realview_mp {
-    Mp_scu_phys_base     = 0x1f000000,
-    Gic_cpu_phys_base    = Mp_scu_phys_base  + 0x00000100,
-    Gic_dist_phys_base   = Mp_scu_phys_base  + 0x00001000,
-    L220_phys_base       = Mp_scu_phys_base  + 0x00002000,
-
-    Gic1_cpu_phys_base   = Devices0_phys_base + 0x00040000,
-    Gic1_dist_phys_base  = Devices0_phys_base + 0x00041000,
-    Gic2_cpu_phys_base   = Devices0_phys_base + 0x00050000,
-    Gic2_dist_phys_base  = Devices0_phys_base + 0x00051000,
-    Gic3_cpu_phys_base   = Devices0_phys_base + 0x00060000,
-    Gic3_dist_phys_base  = Devices0_phys_base + 0x00061000,
-    Gic4_cpu_phys_base   = Devices0_phys_base + 0x00070000,
-    Gic4_dist_phys_base  = Devices0_phys_base + 0x00071000,
+  enum Phys_layout_realview_mp : Address {
+    Devices1_phys_base   = 0x10100000,
+    Devices2_phys_base   = Invalid_address,
   };
 };
 
@@ -92,28 +90,19 @@ INTERFACE [arm && realview && realview_pb11mp]:
 EXTENSION class Mem_layout
 {
 public:
-  enum Virt_layout_realview_pb11mp {
+  enum Virt_layout_realview_pb11mp : Address {
     Mp_scu_map_base      = Devices1_map_base,
     Gic_cpu_map_base     = Devices1_map_base + 0x00000100,
     Gic_dist_map_base    = Devices1_map_base + 0x00001000,
-    L220_map_base        = Devices1_map_base + 0x00002000,
+    L2cxx0_map_base      = Devices1_map_base + 0x00002000,
 
     Gic1_cpu_map_base    = Devices2_map_base,
     Gic1_dist_map_base   = Devices2_map_base + 0x00001000,
   };
 
-  enum Phys_layout_realview_pb11mp {
+  enum Phys_layout_realview_pb11mp : Address {
     Devices1_phys_base   = 0x1f000000,
-    Mp_scu_phys_base     = 0x1f000000,
-    Gic_cpu_phys_base    = Mp_scu_phys_base + 0x00000100,
-    Gic_dist_phys_base   = Mp_scu_phys_base + 0x00001000,
-    L220_phys_base       = Mp_scu_phys_base + 0x00002000,
-
     Devices2_phys_base   = 0x1e000000,
-    Gic0_cpu_phys_base   = 0x1e000000,
-    Gic0_dist_phys_base  = Gic0_cpu_phys_base + 0x00001000,
-    Gic1_cpu_phys_base   = 0x1e010000,
-    Gic1_dist_phys_base  = Gic1_cpu_phys_base + 0x00001000,
   };
 };
 
@@ -123,11 +112,11 @@ INTERFACE [arm && realview && realview_pbx]:
 EXTENSION class Mem_layout
 {
 public:
-  enum Virt_layout_realview_pbx {
+  enum Virt_layout_realview_pbx : Address {
     Mp_scu_map_base      = Devices1_map_base,
     Gic_cpu_map_base     = Devices1_map_base + 0x00000100,
     Gic_dist_map_base    = Devices1_map_base + 0x00001000,
-    L220_map_base        = Devices1_map_base + 0x00002000,
+    L2cxx0_map_base      = Devices1_map_base + 0x00002000,
 
     Gic2_cpu_map_base    = Devices2_map_base + 0x00020000,
     Gic2_dist_map_base   = Devices2_map_base + 0x00021000,
@@ -135,17 +124,27 @@ public:
     Gic3_dist_map_base   = Devices2_map_base + 0x00031000,
   };
 
-  enum Phys_layout_realview_pbx {
+  enum Phys_layout_realview_pbx : Address {
     Devices1_phys_base   = 0x1f000000,
-    Mp_scu_phys_base     = 0x1f000000,
-    Gic_cpu_phys_base    = Mp_scu_phys_base + 0x00000100,
-    Gic_dist_phys_base   = Mp_scu_phys_base + 0x00001000,
-    L220_phys_base       = Mp_scu_phys_base + 0x00002000,
-
     Devices2_phys_base   = 0x1e000000,
-    Gic2_cpu_phys_base   = 0x1e020000,
-    Gic2_dist_phys_base  = Gic2_cpu_phys_base + 0x00001000,
-    Gic3_cpu_phys_base   = 0x1e030000,
-    Gic3_dist_phys_base  = Gic3_cpu_phys_base + 0x00001000,
+  };
+};
+
+// ------------------------------------------------------------------------
+INTERFACE [arm && realview && realview_vexpress]:
+
+EXTENSION class Mem_layout
+{
+public:
+  enum Virt_layout_realview_vexpress : Address {
+    Mp_scu_map_base      = Devices1_map_base,
+    Gic_cpu_map_base     = Devices1_map_base + 0x00000100,
+    Gic_dist_map_base    = Devices1_map_base + 0x00001000,
+    L2cxx0_map_base      = Devices1_map_base + 0x00002000,
+  };
+
+  enum Phys_layout_realview_vexpress : Address {
+    Devices1_phys_base   = 0x1e000000,
+    Devices2_phys_base   = Invalid_address,
   };
 };