update

[l4.git] / kernel / fiasco / src / kern / ia32 / 64 / entry.S

diff --git a/kernel/fiasco/src/kern/ia32/64/entry.S b/kernel/fiasco/src/kern/ia32/64/entry.S
index d4ead08972320b5fdf3c9204d4f97178f40b2b84..570931f847338d81a06a137e585d3f9ac4fbf754 100644 (file)
--- a/kernel/fiasco/src/kern/ia32/64/entry.S
+++ b/kernel/fiasco/src/kern/ia32/64/entry.S
@@ -152,8 +152,8 @@ entry_vec0e_page_fault:
        cld
        SAVE_SCRATCH
 
-/* We must reset the cancel flag here atomically 
-   if we are entering fresh from user mode and an IPC might occur. 
+/* We must reset the cancel flag here atomically
+   if we are entering fresh from user mode and an IPC might occur.
    NOTE: We cannot test the user-mode bit in the error code because
    it will flag "kernel" in case an I/O-bitmap page is not mapped
    during an I/O access. */
@@ -357,7 +357,7 @@ entry_sys_ipc_c:
        RESET_THREAD_CANCEL_AT %rbx
 
 
-       call    ipc_short_cut_wrapper
+       call    sys_ipc_wrapper
 in_sc_ipc1:
        RESTORE_STATE
        pop     %rax
@@ -434,6 +434,7 @@ leave_by_vcpu_upcall:
        call    thread_restore_exc_state
 
        ESP_TO_TCB_AT %rcx
+       mov OFS__THREAD__USER_VCPU(%rcx), %rdi
        mov OFS__THREAD__VCPU_STATE(%rcx), %rcx
        add $(VAL__SIZEOF_TRAP_STATE - 40), %rcx
        mov SCRATCH_REGISTER_SIZE(%rsp),  %rdx
@@ -445,24 +446,24 @@ leave_by_vcpu_upcall:
        mov 32 + SCRATCH_REGISTER_SIZE(%rsp), %rdx
        mov %rdx, 32(%rcx)                          /* SS */
 
-       mov 0(%rsp), %rdx   /* R11 */
+       mov (0*8)(%rsp), %rdx   /* r11 */
        mov %rdx, -(14*8)(%rcx)
-       mov 8(%rsp), %rdx   /* R10 */
+       mov (1*8)(%rsp), %rdx   /* r10 */
        mov %rdx, -(13*8)(%rcx)
        mov (2*8)(%rsp), %rdx
-       mov %rdx, -(12*8)(%rcx)
+       mov %rdx, -(12*8)(%rcx) /* r9 */
        mov (3*8)(%rsp), %rdx
-       mov %rdx, -(11*8)(%rcx)
+       mov %rdx, -(11*8)(%rcx) /* r8 */
        mov (4*8)(%rsp), %rdx
-       mov %rdx, -(5*8)(%rcx)
+       mov %rdx, -(5*8)(%rcx)  /* rdx */
        mov (5*8)(%rsp), %rdx
-       mov %rdx, -(4*8)(%rcx)
+       mov %rdx, -(4*8)(%rcx)  /* rcx */
        mov (6*8)(%rsp), %rdx
-       mov %rdx, -(3*8)(%rcx)
+       mov %rdx, -(3*8)(%rcx)  /* rax */
        mov (7*8)(%rsp), %rdx
-       mov %rdx, -(9*8)(%rcx)
+       mov %rdx, -(9*8)(%rcx)  /* rsi */
        mov (8*8)(%rsp), %rdx
-       mov %rdx, -(10*8)(%rcx)
+       mov %rdx, -(10*8)(%rcx) /* rdi */
 
        lea SCRATCH_REGISTER_SIZE(%rsp), %rdx
        lea -(5*8)(%rcx), %rsp
@@ -470,6 +471,11 @@ leave_by_vcpu_upcall:
        push %rbx
        sub $8, %rsp
        push %rbp
+       sub $(6*8), %rsp
+       push %r12
+       push %r13
+       push %r14
+       push %r15
 
        /*add SCRATCH_REGISTER_SIZE, %esp*/
 #if 0
@@ -489,6 +495,7 @@ leave_by_vcpu_upcall:
        mov %rax, 24(%rsp)
        mov -VAL__SIZEOF_TRAP_STATE + 40 + OFS__VCPU_STATE__ENTRY_IP(%rcx), %rax
        mov %rax, 0(%rsp)
+       movq $EFLAGS_IF, 16(%rsp)
        iretq
 
        .p2align