ldrne lr, [sp, #RF(SVC_LR, -RF_SIZE)] @ load old kernel lr
rfedb sp
#else
- msr spsr, lr @ Load SPSR from kernel_lr
+ msr spsr_cfsx, lr @ Load SPSR from kernel_lr
ldr lr, [sp, #RF(PC, -RF_SIZE)] @ copy PC on psr field for
str lr, [sp, #RF(PSR, -RF_SIZE)] @ final ldmdb and proper ksp
ldrne lr, [sp, #RF(SVC_LR, -RF_SIZE)] @ load old kernel lr
/* Return */
ldr lr, [sp, #RF(PSR,0)]
- msr spsr, lr
+ msr spsr_cfsx, lr
@ ldmia sp, {sp,lr}^ @ done lazy
add sp, sp, #RF_SIZE
ldr lr, [sp, #RF(PC, -RF_SIZE)]
.word sys_kdb_ke
.word sys_kdb_ke
/*SYSCALL(ipc)*/
- .word ipc_short_cut_wrapper
- .word sys_arm_cache_op
+ .word sys_ipc_wrapper
+ .word sys_arm_mem_op
SYSCALL(invoke_debug)
.word sys_kdb_ke
.word sys_kdb_ke
/* restore original IP */
CONTEXT_OF r1, sp
- ldr r2, [r1, #(OFS__THREAD__VCPU_STATE)]
- add r2, r2, #(VAL__SIZEOF_TRAP_STATE - RF_SIZE)
+ /* access_vcpu() for the local case */
+ ldr r2, [r1, #(OFS__THREAD__LOCAL_ID)]
+ add r2, r2, #(OFS__THREAD__UTCB_SIZE + VAL__SIZEOF_TRAP_STATE - RF_SIZE)
ldr r0, [r1, #(OFS__THREAD__EXCEPTION_IP)]
str r0, [r2, #RF(PC, 0)]
str r0, [sp, #RF(PC, 0)]
- b __iret
+ b __iret
kernel_prefetch_abort_label: .string "Kernel prefetch abort"
#ifdef CONFIG_ARM_TZ
+.macro ISB_OP reg
+#ifdef CONFIG_ARM_V7
+ isb
+#else
+ mcr p15, 0, lr, c7, c5, 4 @ cp15isb
+#endif
+.endm
+
/**********************************************************************
* Secure and Nonsecure switching stuff
*
// switch to non-secure world
mov r1, #1
mcr p15, 0, r1, c1, c1, 0
- isb
+ ISB_OP r1
mrc p15, 0, r1, c2, c0, 0 @ read CP15_TTB0
stmia r0!, {r1}
// switch to secure world
mov r1, #0
mcr p15, 0, r1, c1, c1, 0
- isb
+ ISB_OP r1
mrc p15, 0, r1, c5, c0, 0 @ read CP15_DFSR
stmia r0!, {r1}
// switch to non-secure world
mov r1, #1
mcr p15, 0, r1, c1, c1, 0
- isb
+ ISB_OP r1
ldmia r0!, {r1}
mcr p15, 0, r1, c2, c0, 0 @ write CP15_TTB0
// switch to secure world
mov r1, #0
mcr p15, 0, r1, c1, c1, 0
- isb
+ ISB_OP r1
xxx
#endif
.macro SWITCH_TO_NONSECURE_MODE
mov lr, #0xf
mcr p15, 0, lr, c1, c1, 0
- isb
+ ISB_OP lr
.endm
.macro SWITCH_TO_SECURE_MODE
mov lr, #0x0
mcr p15, 0, lr, c1, c1, 0
- isb
+ ISB_OP lr
.endm