]> rtime.felk.cvut.cz Git - l4.git/blobdiff - l4/pkg/udis86/lib/contrib/docs/x86/optable.xml
Update
[l4.git] / l4 / pkg / udis86 / lib / contrib / docs / x86 / optable.xml
index 69aed8bc002d2cea6d81dc4b4c52f0647ea33e6c..60b2ec16467976cd84b76c50b1a6449f4b543fcf 100644 (file)
@@ -2,37 +2,73 @@
 <?xml-stylesheet href="optable.xsl" type="text/xsl"?>
 <x86optable>
 
+  <!--
+      The most important elements of each instruction definition are the
+      pfx (prefix), opc (opcode), and opr (operand) elements.  Each is a
+      CDATA element consisting of blank-separated words.  Upper and lower
+      case are equivalent.
+
+      pfx describes the prefixes that can precede the main opcode without
+      turning it into a different instruction.  These may be:
+      aso - accepts address size override
+      oso - accepts operand size override
+      rexw, rexr, rexx, rexb - uses the indicated REX bit
+      seg - accepts a segment override
+
+      opc words may be actual byte values (two hex digits), or may be one of
+      the following:
+      /sse=66,f3,f2 - required prefix (always first, and always
+        followed by 0f)
+      /3dnow=00-ff - this is a 3DNow opcode (only in a definition of the
+        form 0f 0f 3dnow=<byte>)
+      /a=16,32,64 - has this address size
+      /m=16,32,64,!64 - applicable only when the CPU is in this mode
+      /o=16,32,64 - has this operand size
+      /mod=11,!11 - has ModR/M with 11 or not-11 in the Mod field
+      /reg=0-7 - has ModR/M with this value in the reg field
+      /rm=0-7 - has ModR/M with this value in the R/M field (only with
+        /mod=11)
+      /x87=00-3f - X87 opcode with this value in the low 6 bits of the
+        following "ModR/M" byte (only with /mod=11 and no other modifiers)
+
+      opr words follow the Intel documentation somewhat, and specify the
+      location and the size of the operand.  The OperandDict table in
+      ud_itab.py maps these words to named OP_ and SZ_ constants for the
+      location and size respectively.  These constants are defined in
+      decode.h, q.v. for details.
+
+      The mode element affects instruction semantics but not decoding:
+          inv64 - invalid in 64-bit mode
+      def64 - default operand size is 64 bits in 64-bit mode
+  -->
+
     <instruction>
         <mnemonic>aaa</mnemonic>
         <def>
-            <opc>37</opc>
-            <mode>inv64</mode>
+            <opc>37 /m=!64</opc>
         </def>
     </instruction>
 
     <instruction>
         <mnemonic>aad</mnemonic>
         <def>
-            <opc>d5</opc>
+            <opc>d5 /m=!64</opc>
             <opr>Ib</opr>
-            <mode>inv64</mode>
         </def>
     </instruction>
 
     <instruction>
         <mnemonic>aam</mnemonic>
         <def>
-            <opc>d4</opc>
+            <opc>d4 /m=!64</opc>
             <opr>Ib</opr>
-            <mode>inv64</mode>
         </def>
     </instruction>
 
     <instruction>
         <mnemonic>aas</mnemonic>
         <def>
-            <opc>3f</opc>
-            <mode>inv64</mode>
+            <opc>3f /m=!64</opc>
         </def>
     </instruction>
 
         <def>
             <pfx>oso rexw</pfx>
             <opc>15</opc>
-            <opr>rAX Iz</opr>
-            <syn>sext</syn>
+            <opr>rAX sIz</opr>
         </def>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
         </def>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>82 /reg=2</opc>
+            <opc>82 /reg=2 /m=!64</opc>
             <opr>Eb Ib</opr>
             <mode>inv64</mode>
         </def>
         <def>
             <pfx>aso oso rexw rexr rexx rexb</pfx>
             <opc>81 /reg=2</opc>
-            <opr>Ev Iz</opr>
-            <syn>sext</syn>
+            <opr>Ev sIz</opr>
         </def>
         <def>
             <pfx>aso oso rexw rexr rexx rexb</pfx>
             <opc>83 /reg=2</opc>
-            <opr>Ev Ib</opr>
-            <syn>sext</syn>
+            <opr>Ev sIb</opr>
         </def>
     </instruction>
 
         <def>
             <pfx>oso rexw</pfx>
             <opc>05</opc>
-            <opr>rAX Iz</opr>
-            <syn>sext</syn>
+            <opr>rAX sIz</opr>
         </def>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
         </def>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>82 /reg=0</opc>
+            <opc>82 /reg=0 /m=!64</opc>
             <opr>Eb Ib</opr>
             <mode>inv64</mode>
         </def>
         <def>
             <pfx>aso oso rexw rexr rexx rexb</pfx>
             <opc>81 /reg=0</opc>
-            <opr>Ev Iz</opr>
-            <syn>sext</syn>
+            <opr>Ev sIz</opr>
         </def>
         <def>
             <pfx>aso oso rexw rexr rexx rexb</pfx>
             <opc>83 /reg=0</opc>
-            <opr>Ev Ib</opr>
-            <syn>sext</syn>
+            <opr>Ev sIb</opr>
         </def>
     </instruction>
 
     <instruction>
         <mnemonic>addpd</mnemonic>
+        <class>sse2</class>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f 58</opc>
+            <opc>/sse=66 0f 58</opc>
             <opr>V W</opr>
         </def>
     </instruction>
 
     <instruction>
         <mnemonic>addps</mnemonic>
+        <class>sse</class>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
             <opc>0f 58</opc>
 
     <instruction>
         <mnemonic>addsd</mnemonic>
+        <class>sse2</class>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>ssef2 0f 58</opc>
+            <opc>/sse=f2 0f 58</opc>
             <opr>V W</opr>
         </def>
     </instruction>
 
     <instruction>
         <mnemonic>addss</mnemonic>
+        <class>sse</class>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>ssef3 0f 58</opc>
-            <opr>V W</opr>
-        </def>
-    </instruction>
-
-    <instruction>
-        <mnemonic>addsubpd</mnemonic>
-        <def>
-            <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f d0</opc>
-            <opr>V W</opr>
-        </def>
-    </instruction>
-
-    <instruction>
-        <mnemonic>addsubps</mnemonic>
-        <def>
-            <pfx>aso rexr rexx rexb</pfx>
-            <opc>ssef2 0f d0</opc>
+            <opc>/sse=f3 0f 58</opc>
             <opr>V W</opr>
         </def>
     </instruction>
 
-    <instruction>
+     <instruction>
         <mnemonic>and</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
         <def>
             <pfx>oso rexw</pfx>
             <opc>25</opc>
-            <opr>rAX Iz</opr>
-            <syn>sext</syn>
+            <opr>rAX sIz</opr>
         </def>
         <def>
             <pfx>aso rexw rexr rexx rexb</pfx>
         </def>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>82 /reg=4</opc>
+            <opc>82 /reg=4 /m=!64</opc>
             <opr>Eb Ib</opr>
             <mode>inv64</mode>
         </def>
         <def>
             <pfx>aso oso rexw rexr rexx rexb</pfx>
             <opc>81 /reg=4</opc>
-            <opr>Ev Iz</opr>
-            <syn>sext</syn>
+            <opr>Ev sIz</opr>
         </def>
         <def>
             <pfx>aso oso rexw rexr rexx rexb</pfx>
             <opc>83 /reg=4</opc>
-            <opr>Ev Ib</opr>
-            <syn>sext</syn>
+            <opr>Ev sIb</opr>
         </def>
     </instruction>
 
         <mnemonic>andpd</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f 54</opc>
+            <opc>/sse=66 0f 54</opc>
             <opr>V W</opr>
         </def>
     </instruction>
         <mnemonic>andnpd</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f 55</opc>
+            <opc>/sse=66 0f 55</opc>
             <opr>V W</opr>
         </def>
     </instruction>
         <mnemonic>arpl</mnemonic>
         <def>
             <pfx>aso</pfx>
-            <opc>63 /m=16</opc>
-            <opr>Ew Gw</opr>
-            <mode>inv64</mode>
-        </def>
-        <def>
-            <pfx>aso</pfx>
-            <opc>63 /m=32</opc>
+            <opc>63 /m=!64</opc>
             <opr>Ew Gw</opr>
-            <mode>inv64</mode>
         </def>
     </instruction>
 
         <def>
             <pfx>aso oso rexw rexx rexr rexb</pfx>
             <opc>63 /m=64</opc>
-            <opr>Gv Ed</opr>
+            <opr>Gq Ed</opr>
         </def>
     </instruction>
 
         <mnemonic>bound</mnemonic>
         <def>
             <pfx>aso oso</pfx>
-            <opc>62</opc>
+            <opc>62 /m=!64</opc>
             <opr>Gv M</opr>
-            <mode>inv64</mode>
         </def>
     </instruction>
 
         <def>
             <pfx>oso rexw rexb</pfx>
             <opc>0f c8</opc>
-            <opr>rAXr8</opr>
+            <opr>R0y</opr>
         </def>
         <def>
             <pfx>oso rexw rexb</pfx>
             <opc>0f c9</opc>
-            <opr>rCXr9</opr>
+            <opr>R1y</opr>
         </def>
         <def>
             <pfx>oso rexw rexb</pfx>
             <opc>0f ca</opc>
-            <opr>rDXr10</opr>
+            <opr>R2y</opr>
         </def>
         <def>
             <pfx>oso rexw rexb</pfx>
             <opc>0f cb</opc>
-            <opr>rBXr11</opr>
+            <opr>R3y</opr>
         </def>
         <def>
             <pfx>oso rexw rexb</pfx>
             <opc>0f cc</opc>
-            <opr>rSPr12</opr>
+            <opr>R4y</opr>
         </def>
         <def>
             <pfx>oso rexw rexb</pfx>
             <opc>0f cd</opc>
-            <opr>rBPr13</opr>
+            <opr>R5y</opr>
         </def>
         <def>
             <pfx>oso rexw rexb</pfx>
             <opc>0f ce</opc>
-            <opr>rSIr14</opr>
+            <opr>R6y</opr>
         </def>
         <def>
             <pfx>oso rexw rexb</pfx>
             <opc>0f cf</opc>
-            <opr>rDIr15</opr>
+            <opr>R7y</opr>
         </def>
     </instruction>
 
         <mnemonic>call</mnemonic>
         <def>
             <pfx>aso oso rexw rexr rexx rexb</pfx>
-            <opc>ff /reg=2</opc>
+            <opc>ff /reg=2 /m=!64</opc>
             <opr>Ev</opr>
+        </def>
+        <def>
+            <pfx>aso oso rexw rexr rexx rexb</pfx>
+            <opc>ff /reg=2 /m=64</opc>
+            <opr>Eq</opr>
             <mode>def64</mode>
         </def>
         <def>
             <pfx>aso oso rexw rexr rexx rexb</pfx>
             <opc>ff /reg=3</opc>
-            <opr>Ep</opr>
+            <opr>Fv</opr>
         </def>
         <def>
             <pfx>oso</pfx>
         </def>
         <def>
             <pfx>oso</pfx>
-            <opc>9a</opc>
-            <opr>Ap</opr>
-            <mode>inv64</mode>
+            <opc>9a /m=!64</opc>
+            <opr>Av</opr>
         </def>
     </instruction>
 
         <def>
             <pfx>oso rexw</pfx>
             <opc>3d</opc>
-            <opr>rAX Iz</opr>
+            <opr>rAX sIz</opr>
         </def>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
         </def>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>82 /reg=7</opc>
+            <opc>82 /reg=7 /m=!64</opc>
             <opr>Eb Ib</opr>
             <mode>inv64</mode>
         </def>
         <def>
             <pfx>aso oso rexw rexr rexx rexb</pfx>
             <opc>81 /reg=7</opc>
-            <opr>Ev Iz</opr>
+            <opr>Ev sIz</opr>
         </def>
         <def>
             <pfx>aso oso rexw rexr rexx rexb</pfx>
             <opc>83 /reg=7</opc>
-            <opr>Ev Ib</opr>
+            <opr>Ev sIb</opr>
         </def>
     </instruction>
 
         <mnemonic>cmppd</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f c2</opc>
+            <opc>/sse=66 0f c2</opc>
             <opr>V W Ib</opr>
         </def>
     </instruction>
     <instruction>
         <mnemonic>cmpsb</mnemonic>
         <def>
+            <pfx>repz seg</pfx>
             <opc>a6</opc>
         </def>
     </instruction>
     <instruction>
         <mnemonic>cmpsw</mnemonic>
         <def>
-            <pfx>oso rexw</pfx>
+            <pfx>repz oso rexw seg</pfx>
             <opc>a7 /o=16</opc>
         </def>
     </instruction>
     <instruction>
         <mnemonic>cmpsd</mnemonic>
         <def>
-            <pfx>oso rexw</pfx>
+            <pfx>repz oso rexw seg</pfx>
             <opc>a7 /o=32</opc>
         </def>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>ssef2 0f c2</opc>
+            <opc>/sse=f2 0f c2</opc>
             <opr>V W Ib</opr>
         </def>
     </instruction>
     <instruction>
         <mnemonic>cmpsq</mnemonic>
         <def>
-            <pfx>oso rexw</pfx>
+            <pfx>repz oso rexw seg</pfx>
             <opc>a7 /o=64</opc>
         </def>
     </instruction>
         <mnemonic>cmpss</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>ssef3 0f c2</opc>
+            <opc>/sse=f3 0f c2</opc>
             <opr>V W Ib</opr>
         </def>
     </instruction>
         <mnemonic>cmpxchg8b</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>0f c7 /reg=1</opc>
+            <opc>0f c7 /reg=1 /o=16</opc>
+            <opr>M</opr>
+        </def>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>0f c7 /reg=1 /o=32</opc>
+            <opr>M</opr>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>cmpxchg16b</mnemonic>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>0f c7 /reg=1 /o=64</opc>
             <opr>M</opr>
         </def>
     </instruction>
         <mnemonic>comisd</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f 2f</opc>
+            <opc>/sse=66 0f 2f</opc>
             <opr>V W</opr>
         </def>
     </instruction>
         <mnemonic>cvtdq2pd</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>ssef3 0f e6</opc>
+            <opc>/sse=f3 0f e6</opc>
             <opr>V W</opr>
         </def>
     </instruction>
         <mnemonic>cvtpd2dq</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>ssef2 0f e6</opc>
+            <opc>/sse=f2 0f e6</opc>
             <opr>V W</opr>
         </def>
     </instruction>
         <mnemonic>cvtpd2pi</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f 2d</opc>
+            <opc>/sse=66 0f 2d</opc>
             <opr>P W</opr>
         </def>
     </instruction>
         <mnemonic>cvtpd2ps</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f 5a</opc>
+            <opc>/sse=66 0f 5a</opc>
             <opr>V W</opr>
         </def>
     </instruction>
         <mnemonic>cvtpi2pd</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f 2a</opc>
+            <opc>/sse=66 0f 2a</opc>
             <opr>V Q</opr>
         </def>
     </instruction>
         <mnemonic>cvtps2dq</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f 5b</opc>
+            <opc>/sse=66 0f 5b</opc>
             <opr>V W</opr>
         </def>
     </instruction>
     <instruction>
         <mnemonic>cvtsd2si</mnemonic>
         <def>
-            <pfx>aso rexr rexx rexb</pfx>
-            <opc>ssef2 0f 2d</opc>
-            <opr>Gvw W</opr>
+            <pfx>aso rexw rexr rexx rexb</pfx>
+            <opc>/sse=f2 0f 2d</opc>
+            <opr>Gy W</opr>
         </def>
     </instruction>
 
         <mnemonic>cvtsd2ss</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>ssef2 0f 5a</opc>
+            <opc>/sse=f2 0f 5a</opc>
             <opr>V W</opr>
         </def>
     </instruction>
     <instruction>
         <mnemonic>cvtsi2ss</mnemonic>
         <def>
-            <pfx>aso rexr rexx rexb</pfx>
-            <opc>ssef3 0f 2a</opc>
-            <opr>V Ex</opr>
+            <pfx>aso rexw rexr rexx rexb</pfx>
+            <opc>/sse=f3 0f 2a</opc>
+            <opr>V Ey</opr>
         </def>
     </instruction>
 
     <instruction>
         <mnemonic>cvtss2si</mnemonic>
         <def>
-            <pfx>aso rexr rexx rexb</pfx>
-            <opc>ssef3 0f 2d</opc>
-            <opr>Gvw W</opr>
+            <pfx>aso rexw rexr rexx rexb</pfx>
+            <opc>/sse=f3 0f 2d</opc>
+            <opr>Gy W</opr>
         </def>
     </instruction>
 
         <mnemonic>cvtss2sd</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>ssef3 0f 5a</opc>
+            <opc>/sse=f3 0f 5a</opc>
             <opr>V W</opr>
         </def>
     </instruction>
         <mnemonic>cvttpd2pi</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f 2c</opc>
+            <opc>/sse=66 0f 2c</opc>
             <opr>P W</opr>
         </def>
     </instruction>
         <mnemonic>cvttpd2dq</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f e6</opc>
+            <opc>/sse=66 0f e6</opc>
             <opr>V W</opr>
         </def>
     </instruction>
         <mnemonic>cvttps2dq</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>ssef3 0f 5b</opc>
+            <opc>/sse=f3 0f 5b</opc>
             <opr>V W</opr>
         </def>
     </instruction>
     <instruction>
         <mnemonic>cvttsd2si</mnemonic>
         <def>
-            <pfx>aso rexr rexx rexb</pfx>
-            <opc>ssef2 0f 2c</opc>
-            <opr>Gvw W</opr>
+            <pfx>aso rexw rexr rexx rexb</pfx>
+            <opc>/sse=f2 0f 2c</opc>
+            <opr>Gy W</opr>
         </def>
     </instruction>
 
         <mnemonic>cvtsi2sd</mnemonic>
         <def>
             <pfx>aso rexw rexr rexx rexb</pfx>
-            <opc>ssef2 0f 2a</opc>
-            <opr>V Ex</opr>
+            <opc>/sse=f2 0f 2a</opc>
+            <opr>V Ey</opr>
         </def>
     </instruction>
 
     <instruction>
         <mnemonic>cvttss2si</mnemonic>
         <def>
-            <pfx>aso rexr rexx rexb</pfx>
-            <opc>ssef3 0f 2c</opc>
-            <opr>Gvw W</opr>
+            <pfx>aso rexw rexr rexx rexb</pfx>
+            <opc>/sse=f3 0f 2c</opc>
+            <opr>Gy W</opr>
         </def>
     </instruction>
 
     <instruction>
         <mnemonic>daa</mnemonic>
         <def>
-            <opc>27</opc>
+            <opc>27 /m=!64</opc>
             <mode>inv64</mode>
         </def>
     </instruction>
     <instruction>
         <mnemonic>das</mnemonic>
         <def>
-            <opc>2f</opc>
+            <opc>2f /m=!64</opc>
             <mode>inv64</mode>
         </def>
     </instruction>
         <def>
             <pfx>oso</pfx>
             <opc>48</opc>
-            <opr>eAX</opr>
+            <opr>R0z</opr>
         </def>
         <def>
             <pfx>oso</pfx>
             <opc>49</opc>
-            <opr>eCX</opr>
+            <opr>R1z</opr>
         </def>
         <def>
             <pfx>oso</pfx>
             <opc>4a</opc>
-            <opr>eDX</opr>
+            <opr>R2z</opr>
         </def>
         <def>
             <pfx>oso</pfx>
             <opc>4b</opc>
-            <opr>eBX</opr>
+            <opr>R3z</opr>
         </def>
         <def>
             <pfx>oso</pfx>
             <opc>4c</opc>
-            <opr>eSP</opr>
+            <opr>R4z</opr>
         </def>
         <def>
             <pfx>oso</pfx>
             <opc>4d</opc>
-            <opr>eBP</opr>
+            <opr>R5z</opr>
         </def>
         <def>
             <pfx>oso</pfx>
             <opc>4e</opc>
-            <opr>eSI</opr>
+            <opr>R6z</opr>
         </def>
         <def>
             <pfx>oso</pfx>
             <opc>4f</opc>
-            <opr>eDI</opr>
+            <opr>R7z</opr>
         </def>
         <def>
             <pfx>aso rexw rexr rexx rexb</pfx>
         <mnemonic>divpd</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f 5e</opc>
+            <opc>/sse=66 0f 5e</opc>
             <opr>V W</opr>
         </def>
     </instruction>
         <mnemonic>divsd</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>ssef2 0f 5e</opc>
+            <opc>/sse=f2 0f 5e</opc>
             <opr>V W</opr>
         </def>
     </instruction>
         <mnemonic>divss</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>ssef3 0f 5e</opc>
+            <opc>/sse=f3 0f 5e</opc>
             <opr>V W</opr>
         </def>
     </instruction>
         <def>
             <opc>c8</opc>
             <opr>Iw Ib</opr>
-            <mode>def64 depM</mode>
+            <mode>def64</mode>
         </def>
     </instruction>
 
     </instruction>
 
     <instruction>
-        <mnemonic>fncstp</mnemonic>
+        <mnemonic>fincstp</mnemonic>
         <class>X87</class>
         <def>
             <opc>d9 /mod=11 /x87=37</opc>
     </instruction>
 
     <instruction>
-        <mnemonic>fldlpi</mnemonic>
+        <mnemonic>fldpi</mnemonic>
         <class>X87</class>
         <def>
             <opc>d9 /mod=11 /x87=2b</opc>
         <mnemonic>fxrstor</mnemonic>
         <def>
             <pfx>aso rexw rexr rexx rexb</pfx>
-            <opc>0f ae /reg=1</opc>
+            <opc>0f ae /mod=!11 /reg=1</opc>
             <opr>M</opr>
         </def>
     </instruction>
         <mnemonic>fxsave</mnemonic>
         <def>
             <pfx>aso rexw rexr rexx rexb</pfx>
-            <opc>0f ae /reg=0</opc>
+            <opc>0f ae /mod=!11 /reg=0</opc>
             <opr>M</opr>
         </def>
     </instruction>
 
     <instruction>
-        <mnemonic>fpxtract</mnemonic>
+        <mnemonic>fxtract</mnemonic>
         <class>X87</class>
         <def>
             <opc>d9 /mod=11 /x87=34</opc>
         </def>
     </instruction>
 
-    <instruction>
-        <mnemonic>haddpd</mnemonic>
-        <def>
-            <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f 7c</opc>
-            <opr>V W</opr>
-        </def>
-    </instruction>
-
-    <instruction>
-        <mnemonic>haddps</mnemonic>
-        <def>
-            <pfx>aso rexr rexx rexb</pfx>
-            <opc>ssef2 0f 7c</opc>
-            <opr>V W</opr>
-        </def>
-    </instruction>
-
-    <instruction>
+     <instruction>
         <mnemonic>hlt</mnemonic>
         <def>
             <opc>f4</opc>
         </def>
     </instruction>
 
-    <instruction>
-        <mnemonic>hsubpd</mnemonic>
-        <def>
-            <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f 7d</opc>
-            <opr>V W</opr>
-        </def>
-    </instruction>
-
-    <instruction>
-        <mnemonic>hsubps</mnemonic>
-        <def>
-            <pfx>aso rexr rexx rexb</pfx>
-            <opc>ssef2 0f 7d</opc>
-            <opr>V W</opr>
-        </def>
-    </instruction>
-
     <instruction>
         <mnemonic>idiv</mnemonic>
         <def>
             <pfx>aso oso rexw rexr rexx rexb</pfx>
             <opc>69</opc>
             <opr>Gv Ev Iz</opr>
-            <syn>sext</syn>
         </def>
         <def>
             <pfx>aso oso rexw rexr rexx rexb</pfx>
             <opc>6b</opc>
-            <opr>Gv Ev Ib</opr>
-            <syn>sext</syn>
+            <opr>Gv Ev sIb</opr>
         </def>
     </instruction>
 
         <def>
             <pfx>oso</pfx>
             <opc>40</opc>
-            <opr>eAX</opr>
+            <opr>R0z</opr>
         </def>
         <def>
             <pfx>oso</pfx>
             <opc>41</opc>
-            <opr>eCX</opr>
+            <opr>R1z</opr>
         </def>
         <def>
             <pfx>oso</pfx>
             <opc>42</opc>
-            <opr>eDX</opr>
+            <opr>R2z</opr>
         </def>
         <def>
             <pfx>oso</pfx>
             <opc>43</opc>
-            <opr>eBX</opr>
+            <opr>R3z</opr>
         </def>
         <def>
             <pfx>oso</pfx>
             <opc>44</opc>
-            <opr>eSP</opr>
+            <opr>R4z</opr>
         </def>
         <def>
             <pfx>oso</pfx>
             <opc>45</opc>
-            <opr>eBP</opr>
+            <opr>R5z</opr>
         </def>
         <def>
             <pfx>oso</pfx>
             <opc>46</opc>
-            <opr>eSI</opr>
+            <opr>R6z</opr>
         </def>
         <def>
             <pfx>oso</pfx>
             <opc>47</opc>
-            <opr>eDI</opr>
+            <opr>R7z</opr>
         </def>
         <def>
             <pfx>aso oso rexw rexr rexx rexb</pfx>
     <instruction>
         <mnemonic>insb</mnemonic>
         <def>
+            <pfx>rep seg</pfx>
             <opc>6c</opc>
         </def>
     </instruction>
     <instruction>
         <mnemonic>insw</mnemonic>
         <def>
-            <pfx>oso</pfx>
+            <pfx>rep oso seg</pfx>
             <opc>6d /o=16</opc>
         </def>
     </instruction>
     <instruction>
         <mnemonic>insd</mnemonic>
         <def>
-            <pfx>oso</pfx>
+            <pfx>rep oso seg</pfx>
             <opc>6d /o=32</opc>
         </def>
     </instruction>
     <instruction>
         <mnemonic>into</mnemonic>
         <def>
-            <opc>ce</opc>
+            <opc>ce /m=!64</opc>
             <mode>inv64</mode>
         </def>
     </instruction>
         <mnemonic>invept</mnemonic>
         <vendor>intel</vendor>
         <def>
-            <opc>sse66 0f 38 80 /m=32</opc>
+            <opc>/sse=66 0f 38 80 /m=32</opc>
             <opr>Gd Mo</opr>
         </def>
         <def>
-            <opc>sse66 0f 38 80 /m=64</opc>
+            <opc>/sse=66 0f 38 80 /m=64</opc>
             <opr>Gq Mo</opr>
         </def>
     </instruction>
         <mnemonic>invvpid</mnemonic>
         <vendor>intel</vendor>
         <def>
-            <opc>sse66 0f 38 81 /m=32</opc>
+            <opc>/sse=66 0f 38 81 /m=32</opc>
             <opr>Gd Mo</opr>
         </def>
         <def>
-            <opc>sse66 0f 38 81 /m=64</opc>
+            <opc>/sse=66 0f 38 81 /m=64</opc>
             <opr>Gq Mo</opr>
         </def>
     </instruction>
             <pfx>oso</pfx>
             <opc>0f 80</opc>
             <opr>Jz</opr>
-            <mode>def64 depM</mode>
+            <mode>def64</mode>
         </def>
     </instruction>
 
             <pfx>oso</pfx>
             <opc>0f 81</opc>
             <opr>Jz</opr>
-            <mode>def64 depM</mode>
+            <mode>def64</mode>
         </def>
     </instruction>
 
             <pfx>oso</pfx>
             <opc>0f 82</opc>
             <opr>Jz</opr>
-            <mode>def64 depM</mode>
+            <mode>def64</mode>
         </def>
     </instruction>
 
             <pfx>oso</pfx>
             <opc>0f 83</opc>
             <opr>Jz</opr>
-            <mode>def64 depM</mode>
+            <mode>def64</mode>
         </def>
     </instruction>
 
             <pfx>oso</pfx>
             <opc>0f 84</opc>
             <opr>Jz</opr>
-            <mode>def64 depM</mode>
+            <mode>def64</mode>
         </def>
     </instruction>
 
             <pfx>oso</pfx>
             <opc>0f 85</opc>
             <opr>Jz</opr>
-            <mode>def64 depM</mode>
+            <mode>def64</mode>
         </def>
     </instruction>
 
             <pfx>oso</pfx>
             <opc>0f 86</opc>
             <opr>Jz</opr>
-            <mode>def64 depM</mode>
+            <mode>def64</mode>
         </def>
     </instruction>
 
             <pfx>oso</pfx>
             <opc>0f 87</opc>
             <opr>Jz</opr>
-            <mode>def64 depM</mode>
+            <mode>def64</mode>
         </def>
     </instruction>
 
             <pfx>oso</pfx>
             <opc>0f 88</opc>
             <opr>Jz</opr>
-            <mode>def64 depM</mode>
+            <mode>def64</mode>
         </def>
     </instruction>
 
             <pfx>oso</pfx>
             <opc>0f 89</opc>
             <opr>Jz</opr>
-            <mode>def64 depM</mode>
+            <mode>def64</mode>
         </def>
     </instruction>
 
             <pfx>oso</pfx>
             <opc>0f 8a</opc>
             <opr>Jz</opr>
-            <mode>def64 depM</mode>
+            <mode>def64</mode>
         </def>
     </instruction>
 
             <pfx>oso</pfx>
             <opc>0f 8b</opc>
             <opr>Jz</opr>
-            <mode>def64 depM</mode>
+            <mode>def64</mode>
         </def>
     </instruction>
 
             <pfx>oso</pfx>
             <opc>0f 8c</opc>
             <opr>Jz</opr>
-            <mode>def64 depM</mode>
+            <mode>def64</mode>
         </def>
     </instruction>
 
             <pfx>oso</pfx>
             <opc>0f 8d</opc>
             <opr>Jz</opr>
-            <mode>def64 depM</mode>
+            <mode>def64</mode>
         </def>
     </instruction>
 
             <pfx>oso</pfx>
             <opc>0f 8e</opc>
             <opr>Jz</opr>
-            <mode>def64 depM</mode>
+            <mode>def64</mode>
         </def>
     </instruction>
 
             <pfx>oso</pfx>
             <opc>0f 8f</opc>
             <opr>Jz</opr>
-            <mode>def64 depM</mode>
+            <mode>def64</mode>
         </def>
     </instruction>
 
             <pfx>aso oso rexw rexr rexx rexb</pfx>
             <opc>ff /reg=4</opc>
             <opr>Ev</opr>
-            <mode>def64 depM</mode>
+            <mode>def64</mode>
         </def>
         <def>
             <pfx>aso oso rexw rexr rexx rexb</pfx>
             <opc>ff /reg=5</opc>
-            <opr>Ep</opr>
+            <opr>Fv</opr>
         </def>
         <def>
             <pfx>oso</pfx>
             <opc>e9</opc>
             <opr>Jz</opr>
-            <mode>def64 depM</mode>
-            <syn>cast</syn>
+            <mode>def64</mode>
         </def>
         <def>
-            <opc>ea</opc>
-            <opr>Ap</opr>
-            <mode>inv64</mode>
+            <pfx>oso</pfx>
+            <opc>ea /m=!64</opc>
+            <opr>Av</opr>
         </def>
         <def>
             <opc>eb</opc>
             <opr>Jb</opr>
+            <mode>def64</mode>
         </def>
     </instruction>
 
         <mnemonic>lddqu</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>ssef2 0f f0</opc>
+            <opc>/sse=f2 0f f0</opc>
             <opr>V M</opr>
         </def>
     </instruction>
         <mnemonic>ldmxcsr</mnemonic>
         <def>
             <pfx>aso rexw rexr rexx rexb</pfx>
-            <opc>0f ae /reg=2</opc>
+            <opc>0f ae /reg=2 /mod=!11</opc>
             <opr>Md</opr>
         </def>
     </instruction>
         <mnemonic>lds</mnemonic>
         <def>
             <pfx>aso oso</pfx>
-            <opc>c5</opc>
+            <opc>c5 /m=!64</opc>
             <opr>Gv M</opr>
-            <mode>inv64</mode>
         </def>
     </instruction>
 
         <mnemonic>les</mnemonic>
         <def>
             <pfx>aso oso</pfx>
-            <opc>c4</opc>
+            <opc>c4 /m=!64</opc>
             <opr>Gv M</opr>
-            <mode>inv64</mode>
         </def>
     </instruction>
 
         <def>
             <pfx>aso oso rexw rexr rexx rexb</pfx>
             <opc>0f b2</opc>
-            <opr>Gz M</opr>
+            <opr>Gv M</opr>
         </def>
     </instruction>
 
             <opc>0f 01 /reg=6 /mod=!11</opc>
             <opr>Ew</opr>
         </def>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>0f 01 /reg=6 /mod=11</opc>
+            <opr>Ew</opr>
+        </def>
     </instruction>
 
     <instruction>
     <instruction>
         <mnemonic>lodsb</mnemonic>
         <def>
-            <pfx>seg</pfx>
+            <pfx>rep seg</pfx>
             <opc>ac</opc>
         </def>
     </instruction>
     <instruction>
         <mnemonic>lodsw</mnemonic>
         <def>
-            <pfx>seg oso rexw</pfx>
+            <pfx>rep seg oso rexw</pfx>
             <opc>ad /o=16</opc>
         </def>
     </instruction>
     <instruction>
         <mnemonic>lodsd</mnemonic>
         <def>
-            <pfx>seg oso rexw</pfx>
+            <pfx>rep seg oso rexw</pfx>
             <opc>ad /o=32</opc>
         </def>
     </instruction>
     <instruction>
         <mnemonic>lodsq</mnemonic>
         <def>
-            <pfx>seg oso rexw</pfx>
+            <pfx>rep seg oso rexw</pfx>
             <opc>ad /o=64</opc>
         </def>
     </instruction>
 
     <instruction>
-        <mnemonic>loopnz</mnemonic>
+        <mnemonic>loopne</mnemonic>
         <def>
             <opc>e0</opc>
             <opr>Jb</opr>
         <mnemonic>maskmovq</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>0f f7</opc>
-            <opr>P Q</opr>
+            <opc>0f f7 /mod=11</opc>
+            <opr>P N</opr>
         </def>
     </instruction>
 
         <mnemonic>maxpd</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f 5f</opc>
+            <opc>/sse=66 0f 5f</opc>
             <opr>V W</opr>
         </def>
     </instruction>
         <mnemonic>maxsd</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>ssef2 0f 5f</opc>
+            <opc>/sse=f2 0f 5f</opc>
             <opr>V W</opr>
         </def>
     </instruction>
         <mnemonic>maxss</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>ssef3 0f 5f</opc>
+            <opc>/sse=f3 0f 5f</opc>
             <opr>V W</opr>
         </def>
     </instruction>
         <mnemonic>minpd</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f 5d</opc>
+            <opc>/sse=66 0f 5d</opc>
             <opr>V W</opr>
         </def>
     </instruction>
         <mnemonic>minsd</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>ssef2 0f 5d</opc>
+            <opc>/sse=f2 0f 5d</opc>
             <opr>V W</opr>
         </def>
     </instruction>
         <mnemonic>minss</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>ssef3 0f 5d</opc>
+            <opc>/sse=f3 0f 5d</opc>
             <opr>V W</opr>
         </def>
     </instruction>
         <def>
             <pfx>aso oso rexw rexr rexx rexb</pfx>
             <opc>c7 /reg=0</opc>
-            <opr>Ev Iz</opr>
+            <opr>Ev sIz</opr>
         </def>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
             <opr>Gv Ev</opr>
         </def>
         <def>
-            <pfx>aso oso rexr rexx rexb</pfx>
+            <pfx>aso oso rexw rexr rexx rexb</pfx>
             <opc>8c</opc>
-            <opr>Ev S</opr>
+            <opr>MwRv S</opr>
         </def>
         <def>
-            <pfx>aso oso rexr rexx rexb</pfx>
+            <pfx>aso oso rexw rexr rexx rexb</pfx>
             <opc>8e</opc>
-            <opr>S Ev</opr>
+            <opr>S MwRv</opr>
         </def>
         <def>
             <opc>a0</opc>
         <def>
             <pfx>rexb</pfx>
             <opc>b0</opc>
-            <opr>ALr8b Ib</opr>
+            <opr>R0b Ib</opr>
         </def>
         <def>
             <pfx>rexb</pfx>
             <opc>b1</opc>
-            <opr>CLr9b Ib</opr>
+            <opr>R1b Ib</opr>
         </def>
         <def>
             <pfx>rexb</pfx>
             <opc>b2</opc>
-            <opr>DLr10b Ib</opr>
+            <opr>R2b Ib</opr>
         </def>
         <def>
             <pfx>rexb</pfx>
             <opc>b3</opc>
-            <opr>BLr11b Ib</opr>
+            <opr>R3b Ib</opr>
         </def>
         <def>
             <pfx>rexb</pfx>
             <opc>b4</opc>
-            <opr>AHr12b Ib</opr>
+            <opr>R4b Ib</opr>
         </def>
         <def>
             <pfx>rexb</pfx>
             <opc>b5</opc>
-            <opr>CHr13b Ib</opr>
+            <opr>R5b Ib</opr>
         </def>
         <def>
             <pfx>rexb</pfx>
             <opc>b6</opc>
-            <opr>DHr14b Ib</opr>
+            <opr>R6b Ib</opr>
         </def>
         <def>
             <pfx>rexb</pfx>
             <opc>b7</opc>
-            <opr>BHr15b Ib</opr>
+            <opr>R7b Ib</opr>
         </def>
         <def>
             <pfx>oso rexw rexb</pfx>
             <opc>b8</opc>
-            <opr>rAXr8 Iv</opr>
+            <opr>R0v Iv</opr>
         </def>
         <def>
             <pfx>oso rexw rexb</pfx>
             <opc>b9</opc>
-            <opr>rCXr9 Iv</opr>
+            <opr>R1v Iv</opr>
         </def>
         <def>
             <pfx>oso rexw rexb</pfx>
             <opc>ba</opc>
-            <opr>rDXr10 Iv</opr>
+            <opr>R2v Iv</opr>
         </def>
         <def>
             <pfx>oso rexw rexb</pfx>
             <opc>bb</opc>
-            <opr>rBXr11 Iv</opr>
+            <opr>R3v Iv</opr>
         </def>
         <def>
             <pfx>oso rexw rexb</pfx>
             <opc>bc</opc>
-            <opr>rSPr12 Iv</opr>
+            <opr>R4v Iv</opr>
         </def>
         <def>
             <pfx>oso rexw rexb</pfx>
             <opc>bd</opc>
-            <opr>rBPr13 Iv</opr>
+            <opr>R5v Iv</opr>
         </def>
         <def>
             <pfx>oso rexw rexb</pfx>
             <opc>be</opc>
-            <opr>rSIr14 Iv</opr>
+            <opr>R6v Iv</opr>
         </def>
         <def>
             <pfx>oso rexw rexb</pfx>
             <opc>bf</opc>
-            <opr>rDIr15 Iv</opr>
+            <opr>R7v Iv</opr>
         </def>
         <def>
-            <pfx>rexr</pfx>
+            <pfx>rexr rexw rexb</pfx>
             <opc>0f 20</opc>
             <opr>R C</opr>
         </def>
         <def>
-            <pfx>rexr</pfx>
+            <pfx>rexr rexw rexb</pfx>
             <opc>0f 21</opc>
             <opr>R D</opr>
         </def>
         <def>
-            <pfx>rexr</pfx>
+            <pfx>rexr rexw rexb</pfx>
             <opc>0f 22</opc>
             <opr>C R</opr>
         </def>
         <def>
-            <pfx>rexr</pfx>
+            <pfx>rexr rexw rexb</pfx>
             <opc>0f 23</opc>
             <opr>D R</opr>
         </def>
         <mnemonic>movapd</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f 28</opc>
+            <opc>/sse=66 0f 28</opc>
             <opr>V W</opr>
         </def>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f 29</opc>
+            <opc>/sse=66 0f 29</opc>
             <opr>W V</opr>
         </def>
     </instruction>
         <mnemonic>movd</mnemonic>
         <def>
             <pfx>aso rexw rexr rexx rexb</pfx>
-            <opc>sse66 0f 6e</opc>
-            <opr>V Ex</opr>
+            <opc>/sse=66 0f 6e</opc>
+            <opr>V Ey</opr>
         </def>
         <def>
-            <pfx>aso rexr rexx rexb</pfx>
+            <pfx>aso rexw rexr rexx rexb</pfx>
             <opc>0f 6e</opc>
-            <opr>P Ex</opr>
+            <opr>P Ey</opr>
         </def>
         <def>
             <pfx>aso rexw rexr rexx rexb</pfx>
-            <opc>sse66 0f 7e</opc>
-            <opr>Ex V</opr>
+            <opc>/sse=66 0f 7e</opc>
+            <opr>Ey V</opr>
         </def>
         <def>
-            <pfx>aso rexr rexx rexb</pfx>
+            <pfx>aso rexw rexr rexx rexb</pfx>
             <opc>0f 7e</opc>
-            <opr>Ex P</opr>
-        </def>
-    </instruction>
-
-    <instruction>
-        <mnemonic>movddup</mnemonic>
-        <def>
-            <pfx>aso rexr rexx rexb</pfx>
-            <opc>ssef2 0f 12</opc>
-            <opr>V W</opr>
-        </def>
-    </instruction>
-
-    <instruction>
-        <mnemonic>movdqa</mnemonic>
-        <def>
-            <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f 7f</opc>
-            <opr>W V</opr>
-        </def>
-        <def>
-            <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f 6f</opc>
-            <opr>V W</opr>
-        </def>
-    </instruction>
-
-    <instruction>
-        <mnemonic>movdqu</mnemonic>
-        <def>
-            <pfx>aso rexr rexx rexb</pfx>
-            <opc>ssef3 0f 6f</opc>
-            <opr>V W</opr>
-        </def>
-        <def>
-            <pfx>aso rexr rexx rexb</pfx>
-            <opc>ssef3 0f 7f</opc>
-            <opr>W V</opr>
-        </def>
-    </instruction>
-
-    <instruction>
-        <mnemonic>movdq2q</mnemonic>
-        <def>
-            <pfx>aso rexb</pfx>
-            <opc>ssef2 0f d6</opc>
-            <opr>P VR</opr>
+            <opr>Ey P</opr>
         </def>
     </instruction>
 
         <mnemonic>movhpd</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f 16</opc>
+            <opc>/sse=66 0f 16 /mod=!11</opc>
             <opr>V M</opr>
         </def>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f 17</opc>
+            <opc>/sse=66 0f 17</opc>
             <opr>M V</opr>
         </def>
     </instruction>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
             <opc>0f 16 /mod=11</opc>
-            <opr>V VR</opr>
+            <opr>V U</opr>
         </def>
     </instruction>
 
         <mnemonic>movlpd</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f 12</opc>
+            <opc>/sse=66 0f 12 /mod=!11</opc>
             <opr>V M</opr>
         </def>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f 13</opc>
+            <opc>/sse=66 0f 13</opc>
             <opr>M V</opr>
         </def>
     </instruction>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
             <opc>0f 12 /mod=11</opc>
-            <opr>V M</opr>
+            <opr>V U</opr>
         </def>
     </instruction>
 
         <mnemonic>movmskpd</mnemonic>
         <def>
             <pfx>oso rexr rexb</pfx>
-            <opc>sse66 0f 50</opc>
-            <opr>Gd VR</opr>
+            <opc>/sse=66 0f 50</opc>
+            <opr>Gd U</opr>
         </def>
     </instruction>
 
         <def>
             <pfx>oso rexr rexb</pfx>
             <opc>0f 50</opc>
-            <opr>Gd VR</opr>
+            <opr>Gd U</opr>
         </def>
     </instruction>
 
         <mnemonic>movntdq</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f e7</opc>
+            <opc>/sse=66 0f e7</opc>
             <opr>M V</opr>
         </def>
     </instruction>
         <def>
             <pfx>aso rexw rexr rexx rexb</pfx>
             <opc>0f c3</opc>
-            <opr>M Gvw</opr>
+            <opr>M Gy</opr>
         </def>
     </instruction>
 
         <mnemonic>movntpd</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f 2b</opc>
+            <opc>/sse=66 0f 2b</opc>
             <opr>M V</opr>
         </def>
     </instruction>
     <instruction>
         <mnemonic>movntq</mnemonic>
         <def>
+            <pfx>aso rexr rexx rexb</pfx>
             <opc>0f e7</opc>
             <opr>M P</opr>
         </def>
         </def>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f d6</opc>
+            <opc>/sse=66 0f d6</opc>
             <opr>W V</opr>
         </def>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>ssef3 0f 7e</opc>
+            <opc>/sse=f3 0f 7e</opc>
             <opr>V W</opr>
         </def>
         <def>
         </def>
     </instruction>
 
-    <instruction>
-        <mnemonic>movq2dq</mnemonic>
-        <def>
-            <pfx>aso</pfx>
-            <opc>ssef3 0f d6</opc>
-            <opr>V PR</opr>
-        </def>
-    </instruction>
-
     <instruction>
         <mnemonic>movsb</mnemonic>
         <def>
-            <pfx>seg</pfx>
+            <pfx>rep seg</pfx>
             <opc>a4</opc>
         </def>
     </instruction>
     <instruction>
         <mnemonic>movsw</mnemonic>
         <def>
-            <pfx>seg oso rexw</pfx>
+            <pfx>rep seg oso rexw</pfx>
             <opc>a5 /o=16</opc>
         </def>
     </instruction>
     <instruction>
         <mnemonic>movsd</mnemonic>
         <def>
-            <pfx>seg oso rexw</pfx>
+            <pfx>rep seg oso rexw</pfx>
             <opc>a5 /o=32</opc>
         </def>
         <def>
-            <pfx>aso rexr rexx rexb</pfx>
-            <opc>ssef2 0f 10</opc>
+            <pfx>rep aso rexr rexx rexb</pfx>
+            <opc>/sse=f2 0f 10</opc>
             <opr>V W</opr>
         </def>
         <def>
-            <pfx>aso rexr rexx rexb</pfx>
-            <opc>ssef2 0f 11</opc>
+            <pfx>rep aso rexr rexx rexb</pfx>
+            <opc>/sse=f2 0f 11</opc>
             <opr>W V</opr>
         </def>
     </instruction>
     <instruction>
         <mnemonic>movsq</mnemonic>
         <def>
-            <pfx>seg oso rexw</pfx>
+            <pfx>rep seg oso rexw</pfx>
             <opc>a5 /o=64</opc>
         </def>
     </instruction>
 
-    <instruction>
-        <mnemonic>movsldup</mnemonic>
-        <def>
-            <pfx>aso rexr rexx rexb</pfx>
-            <opc>ssef3 0f 12</opc>
-            <opr>V W</opr>
-        </def>
-    </instruction>
-
-    <instruction>
-        <mnemonic>movshdup</mnemonic>
-        <def>
-            <pfx>aso rexr rexx rexb</pfx>
-            <opc>ssef3 0f 16</opc>
-            <opr>V W</opr>
-        </def>
-    </instruction>
-
     <instruction>
         <mnemonic>movss</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>ssef3 0f 10</opc>
+            <opc>/sse=f3 0f 10</opc>
             <opr>V W</opr>
         </def>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>ssef3 0f 11</opc>
+            <opc>/sse=f3 0f 11</opc>
             <opr>W V</opr>
         </def>
     </instruction>
         <def>
             <pfx>aso oso rexw rexr rexx rexb</pfx>
             <opc>0f bf</opc>
-            <opr>Gv Ew</opr>
+            <opr>Gy Ew</opr>
         </def>
     </instruction>
 
         <mnemonic>movupd</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f 10</opc>
+            <opc>/sse=66 0f 10</opc>
             <opr>V W</opr>
         </def>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f 11</opc>
+            <opc>/sse=66 0f 11</opc>
             <opr>W V</opr>
         </def>
     </instruction>
         <def>
             <pfx>aso oso rexw rexr rexx rexb</pfx>
             <opc>0f b7</opc>
-            <opr>Gv Ew</opr>
+            <opr>Gy Ew</opr>
         </def>
     </instruction>
 
         <mnemonic>mulpd</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f 59</opc>
+            <opc>/sse=66 0f 59</opc>
             <opr>V W</opr>
         </def>
     </instruction>
         <mnemonic>mulsd</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>ssef2 0f 59</opc>
+            <opc>/sse=f2 0f 59</opc>
             <opr>V W</opr>
         </def>
     </instruction>
         <mnemonic>mulss</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>ssef3 0f 59</opc>
+            <opc>/sse=f3 0f 59</opc>
             <opr>V W</opr>
         </def>
     </instruction>
         <def>
             <pfx>oso rexw</pfx>
             <opc>0d</opc>
-            <opr>rAX Iz</opr>
-            <syn>sext</syn>
+            <opr>rAX sIz</opr>
         </def>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
         <def>
             <pfx>aso oso rexw rexr rexx rexb</pfx>
             <opc>81 /reg=1</opc>
-            <opr>Ev Iz</opr>
-            <syn>sext</syn>
+            <opr>Ev sIz</opr>
         </def>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>82 /reg=1</opc>
+            <opc>82 /reg=1 /m=!64</opc>
             <opr>Eb Ib</opr>
-            <mode>inv64</mode>
         </def>
         <def>
             <pfx>aso oso rexw rexr rexx rexb</pfx>
             <opc>83 /reg=1</opc>
-            <opr>Ev Ib</opr>
-            <syn>sext</syn>
+            <opr>Ev sIb</opr>
         </def>
     </instruction>
 
         <mnemonic>orpd</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f 56</opc>
+            <opc>/sse=66 0f 56</opc>
             <opr>V W</opr>
         </def>
     </instruction>
     <instruction>
         <mnemonic>outsb</mnemonic>
         <def>
+            <pfx>rep seg</pfx>
             <opc>6e</opc>
         </def>
     </instruction>
     <instruction>
         <mnemonic>outsw</mnemonic>
         <def>
-            <pfx>oso</pfx>
+            <pfx>rep oso seg</pfx>
             <opc>6f /o=16</opc>
         </def>
     </instruction>
     <instruction>
         <mnemonic>outsd</mnemonic>
         <def>
-            <pfx>oso</pfx>
+            <pfx>rep oso seg</pfx>
             <opc>6f /o=32</opc>
         </def>
     </instruction>
 
-    <instruction>
-        <mnemonic>outsq</mnemonic>
-        <def>
-            <pfx>oso</pfx>
-            <opc>6f /o=64</opc>
-        </def>
-    </instruction>
-
     <instruction>
         <mnemonic>packsswb</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f 63</opc>
+            <opc>/sse=66 0f 63</opc>
             <opr>V W</opr>
         </def>
         <def>
         <mnemonic>packssdw</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f 6b</opc>
+            <opc>/sse=66 0f 6b</opc>
             <opr>V W</opr>
         </def>
         <def>
         <mnemonic>packuswb</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f 67</opc>
+            <opc>/sse=66 0f 67</opc>
             <opr>V W</opr>
         </def>
         <def>
         <mnemonic>paddb</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f fc</opc>
+            <opc>/sse=66 0f fc</opc>
             <opr>V W</opr>
         </def>
         <def>
         </def>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f fd</opc>
+            <opc>/sse=66 0f fd</opc>
             <opr>V W</opr>
         </def>
     </instruction>
         </def>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f fe</opc>
+            <opc>/sse=66 0f fe</opc>
             <opr>V W</opr>
         </def>
     </instruction>
 
 
-    <instruction>
-        <mnemonic>paddq</mnemonic>
-        <def>
-            <pfx>aso rexr rexx rexb</pfx>
-            <opc>0f d4</opc>
-            <opr>P Q</opr>
-        </def>
-        <def>
-            <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f d4</opc>
-            <opr>V W</opr>
-        </def>
-    </instruction>
-
     <instruction>
         <mnemonic>paddsb</mnemonic>
         <def>
         </def>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f ec</opc>
+            <opc>/sse=66 0f ec</opc>
             <opr>V W</opr>
         </def>
     </instruction>
         </def>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f ed</opc>
+            <opc>/sse=66 0f ed</opc>
             <opr>V W</opr>
         </def>
     </instruction>
             <opc>0f dc</opc>
             <opr>P Q</opr>
         </def>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>/sse=66 0f dc</opc>
+            <opr>V W</opr>
+        </def>
     </instruction>
 
     <instruction>
             <opc>0f dd</opc>
             <opr>P Q</opr>
         </def>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>/sse=66 0f dd</opc>
+            <opr>V W</opr>
+        </def>
     </instruction>
 
     <instruction>
         <mnemonic>pand</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f db</opc>
+            <opc>/sse=66 0f db</opc>
             <opr>V W</opr>
         </def>
         <def>
         <mnemonic>pandn</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f df</opc>
+            <opc>/sse=66 0f df</opc>
             <opr>V W</opr>
         </def>
         <def>
         <mnemonic>pavgb</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f e0</opc>
+            <opc>/sse=66 0f e0</opc>
             <opr>V W</opr>
         </def>
         <def>
         <mnemonic>pavgw</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f e3</opc>
+            <opc>/sse=66 0f e3</opc>
             <opr>V W</opr>
         </def>
         <def>
         </def>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f 74</opc>
+            <opc>/sse=66 0f 74</opc>
             <opr>V W</opr>
         </def>
     </instruction>
         </def>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f 75</opc>
+            <opc>/sse=66 0f 75</opc>
             <opr>V W</opr>
         </def>
     </instruction>
         </def>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f 76</opc>
+            <opc>/sse=66 0f 76</opc>
             <opr>V W</opr>
         </def>
     </instruction>
         <mnemonic>pcmpgtb</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f 64</opc>
+            <opc>/sse=66 0f 64</opc>
             <opr>V W</opr>
         </def>
         <def>
         <mnemonic>pcmpgtw</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f 65</opc>
+            <opc>/sse=66 0f 65</opc>
             <opr>V W</opr>
         </def>
         <def>
         <mnemonic>pcmpgtd</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f 66</opc>
+            <opc>/sse=66 0f 66</opc>
             <opr>V W</opr>
         </def>
         <def>
     <instruction>
         <mnemonic>pextrb</mnemonic>
         <def>
-            <pfx>aso rexr rexb</pfx>
-            <opc>sse66 0f 3a 14</opc>
+            <pfx>aso rexx rexr rexb</pfx>
+            <opc>/sse=66 0f 3a 14</opc>
             <opr>MbRv V Ib</opr>
             <mode>def64</mode>
         </def>
     <instruction>
         <mnemonic>pextrd</mnemonic>
         <def>
-            <pfx>aso rexr rexw rexb</pfx>
-            <opc>sse66 0f 3a 16 /o=32</opc>
-            <opr>Ev V Ib</opr>
+            <pfx>aso rexr rexx rexw rexb</pfx>
+            <opc>/sse=66 0f 3a 16 /o=16</opc>
+            <opr>Ed V Ib</opr>
+        </def>
+        <def>
+            <pfx>aso rexr rexx rexw rexb</pfx>
+            <opc>/sse=66 0f 3a 16 /o=32</opc>
+            <opr>Ed V Ib</opr>
         </def>
     </instruction>
 
         <mnemonic>pextrq</mnemonic>
         <def>
             <pfx>aso rexr rexw rexb</pfx>
-            <opc>sse66 0f 3a 16 /o=64</opc>
-            <opr>Ev V Ib</opr>
+            <opc>/sse=66 0f 3a 16 /o=64</opc>
+            <opr>Eq V Ib</opr>
             <mode>def64</mode>
         </def>
     </instruction>
         <mnemonic>pextrw</mnemonic>
         <def>
             <pfx>aso rexr rexb</pfx>
-            <opc>sse66 0f c5</opc>
-            <opr>Gd VR Ib</opr>
+            <opc>/sse=66 0f c5</opc>
+            <opr>Gd U Ib</opr>
         </def>
         <def>
             <pfx>aso oso rexw rexr rexx rexb</pfx>
             <opc>0f c5</opc>
-            <opr>Gd PR Ib</opr>
+            <opr>Gd N Ib</opr>
+        </def>
+        <def>
+            <pfx>aso rexx rexr rexb</pfx>
+            <opc>/sse=66 0f 3a 15</opc>
+            <opr>MwRd V Ib</opr>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>pinsrb</mnemonic>
+        <def>
+            <pfx>aso rexw rexr rexx rexb</pfx>
+            <opc>/sse=66 0f 3a 20</opc>
+            <opr>V MbRd Ib</opr>
+            <class>sse4.1</class>
         </def>
     </instruction>
 
     <instruction>
         <mnemonic>pinsrw</mnemonic>
         <def>
-            <pfx>aso oso rexw rexr rexx rexb</pfx>
+            <pfx>aso rexw rexr rexx rexb</pfx>
             <opc>0f c4</opc>
-            <opr>P Ew Ib</opr>
+            <opr>P MwRy Ib</opr>
+            <mode>def64</mode>
         </def>
         <def>
             <pfx>aso rexw rexr rexx rexb</pfx>
-            <opc>sse66 0f c4</opc>
-            <opr>V Ew Ib</opr>
+            <opc>/sse=66 0f c4</opc>
+            <opr>V MwRy Ib</opr>
+            <mode>def64</mode>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>pinsrd</mnemonic>
+        <def>
+            <pfx>aso rexw rexr rexx rexb</pfx>
+            <opc>/sse=66 0f 3a 22 /o=16</opc>
+            <opr>V Ed Ib</opr>
+            <class>sse4.1</class>
+        </def>
+        <def>
+            <pfx>aso rexw rexr rexx rexb</pfx>
+            <opc>/sse=66 0f 3a 22 /o=32</opc>
+            <opr>V Ed Ib</opr>
+            <class>sse4.1</class>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>pinsrq</mnemonic>
+        <def>
+            <pfx>aso oso rexw rexr rexx rexb</pfx>
+            <opc>/sse=66 0f 3a 22 /o=64</opc>
+            <opr>V Eq Ib</opr>
+            <class>sse4.1</class>
         </def>
     </instruction>
 
         </def>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f f5</opc>
+            <opc>/sse=66 0f f5</opc>
             <opr>V W</opr>
         </def>
     </instruction>
         <mnemonic>pmaxsw</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f ee</opc>
+            <opc>/sse=66 0f ee</opc>
             <opr>V W</opr>
         </def>
         <def>
         </def>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f de</opc>
+            <opc>/sse=66 0f de</opc>
             <opr>V W</opr>
         </def>
     </instruction>
         <mnemonic>pminsw</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f ea</opc>
+            <opc>/sse=66 0f ea</opc>
             <opr>V W</opr>
         </def>
         <def>
         <mnemonic>pminub</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f da</opc>
+            <opc>/sse=66 0f da</opc>
             <opr>V W</opr>
         </def>
         <def>
         <mnemonic>pmovmskb</mnemonic>
         <def>
             <pfx>rexr rexb</pfx>
-            <opc>sse66 0f d7</opc>
-            <opr>Gd VR</opr>
+            <opc>/sse=66 0f d7</opc>
+            <opr>Gd U</opr>
         </def>
         <def>
             <pfx>oso rexr rexb</pfx>
             <opc>0f d7</opc>
-            <opr>Gd PR</opr>
+            <opr>Gd N</opr>
         </def>
     </instruction>
 
         </def>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f e4</opc>
+            <opc>/sse=66 0f e4</opc>
             <opr>V W</opr>
         </def>
     </instruction>
         <mnemonic>pmulhw</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f e5</opc>
+            <opc>/sse=66 0f e5</opc>
             <opr>V W</opr>
         </def>
         <def>
         </def>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f d5</opc>
-            <opr>V W</opr>
-        </def>
-    </instruction>
-
-    <instruction>
-        <mnemonic>pmuludq</mnemonic>
-        <def>
-            <pfx>aso rexr rexx rexb</pfx>
-            <opc>0f f4</opc>
-            <opr>P Q</opr>
-        </def>
-        <def>
-            <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f f4</opc>
+            <opc>/sse=66 0f d5</opc>
             <opr>V W</opr>
         </def>
     </instruction>
     <instruction>
         <mnemonic>pop</mnemonic>
         <def>
-            <opc>07</opc>
+            <opc>07 /m=!64</opc>
             <opr>ES</opr>
             <mode>inv64</mode>
         </def>
         <def>
-            <opc>17</opc>
+            <opc>17 /m=!64</opc>
             <opr>SS</opr>
             <mode>inv64</mode>
         </def>
         <def>
-            <opc>1f</opc>
+            <opc>1f /m=!64</opc>
             <opr>DS</opr>
             <mode>inv64</mode>
         </def>
         <def>
             <pfx>oso rexb</pfx>
             <opc>58</opc>
-            <opr>rAXr8</opr>
-            <mode>def64 depM</mode>
+            <opr>R0v</opr>
+            <mode>def64</mode>
         </def>
         <def>
             <pfx>oso rexb</pfx>
             <opc>59</opc>
-            <opr>rCXr9</opr>
-            <mode>def64 depM</mode>
+            <opr>R1v</opr>
+            <mode>def64</mode>
         </def>
         <def>
             <pfx>oso rexb</pfx>
             <opc>5a</opc>
-            <opr>rDXr10</opr>
-            <mode>def64 depM</mode>
+            <opr>R2v</opr>
+            <mode>def64</mode>
         </def>
         <def>
             <pfx>oso rexb</pfx>
             <opc>5b</opc>
-            <opr>rBXr11</opr>
-            <mode>def64 depM</mode>
+            <opr>R3v</opr>
+            <mode>def64</mode>
         </def>
         <def>
             <pfx>oso rexb</pfx>
             <opc>5c</opc>
-            <opr>rSPr12</opr>
-            <mode>def64 depM</mode>
+            <opr>R4v</opr>
+            <mode>def64</mode>
         </def>
         <def>
             <pfx>oso rexb</pfx>
             <opc>5d</opc>
-            <opr>rBPr13</opr>
-            <mode>def64 depM</mode>
+            <opr>R5v</opr>
+            <mode>def64</mode>
         </def>
         <def>
             <pfx>oso rexb</pfx>
             <opc>5e</opc>
-            <opr>rSIr14</opr>
-            <mode>def64 depM</mode>
+            <opr>R6v</opr>
+            <mode>def64</mode>
         </def>
         <def>
             <pfx>oso rexb</pfx>
             <opc>5f</opc>
-            <opr>rDIr15</opr>
-            <mode>def64 depM</mode>
+            <opr>R7v</opr>
+            <mode>def64</mode>
         </def>
         <def>
             <pfx>aso oso rexw rexr rexx rexb</pfx>
             <opc>8f /reg=0</opc>
             <opr>Ev</opr>
-            <mode>def64 depM</mode>
+            <mode>def64</mode>
         </def>
     </instruction>
 
         <mnemonic>popa</mnemonic>
         <def>
             <pfx>oso</pfx>
-            <opc>61 /o=16</opc>
+            <opc>61 /o=16 /m=!64</opc>
             <mode>inv64</mode>
         </def>
     </instruction>
         <mnemonic>popad</mnemonic>
         <def>
             <pfx>oso</pfx>
-            <opc>61 /o=32</opc>
+            <opc>61 /o=32 /m=!64</opc>
             <mode>inv64</mode>
         </def>
     </instruction>
         <mnemonic>popfw</mnemonic>
         <def>
             <pfx>oso</pfx>
-            <opc>9d /m=32 /o=16</opc>
-            <mode>def64 depM</mode>
-        </def>
-        <def>
-            <pfx>oso</pfx>
-            <opc>9d /m=16 /o=16</opc>
-            <mode>def64 depM</mode>
+            <opc>9d /m=!64 /o=16</opc>
         </def>
     </instruction>
 
         <mnemonic>popfd</mnemonic>
         <def>
             <pfx>oso</pfx>
-            <opc>9d /m=16 /o=32</opc>
-            <mode>def64 depM</mode>
-        </def>
-        <def>
-            <pfx>oso</pfx>
-            <opc>9d /m=32 /o=32</opc>
-            <mode>def64 depM</mode>
+            <opc>9d /m=!64 /o=32</opc>
         </def>
     </instruction>
 
         <mnemonic>popfq</mnemonic>
         <def>
             <pfx>oso</pfx>
-            <opc>9d /m=64</opc>
-            <mode>def64 depM</mode>
+            <opc>9d /m=64 /o=32</opc>
+            <mode>def64</mode>
+        </def>
+        <def>
+            <pfx>oso</pfx>
+            <opc>9d /m=64 /o=64</opc>
+            <mode>def64</mode>
         </def>
     </instruction>
 
         <mnemonic>por</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f eb</opc>
+            <opc>/sse=66 0f eb</opc>
             <opr>V W</opr>
         </def>
         <def>
         <mnemonic>psadbw</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f f6</opc>
+            <opc>/sse=66 0f f6</opc>
             <opr>V W</opr>
         </def>
         <def>
         </def>
     </instruction>
 
-    <instruction>
-        <mnemonic>pshufd</mnemonic>
-        <def>
-            <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f 70</opc>
-            <opr>V W Ib</opr>
-        </def>
-    </instruction>
-
-    <instruction>
-        <mnemonic>pshufhw</mnemonic>
-        <def>
-            <pfx>aso rexr rexx rexb</pfx>
-            <opc>ssef3 0f 70</opc>
-            <opr>V W Ib</opr>
-        </def>
-    </instruction>
-
-    <instruction>
-        <mnemonic>pshuflw</mnemonic>
-        <def>
-            <pfx>aso rexr rexx rexb</pfx>
-            <opc>ssef2 0f 70</opc>
-            <opr>V W Ib</opr>
-        </def>
-    </instruction>
-
     <instruction>
         <mnemonic>pshufw</mnemonic>
         <def>
         </def>
     </instruction>
 
-    <instruction>
-        <mnemonic>pslldq</mnemonic>
-        <def>
-            <pfx>rexb</pfx>
-            <opc>sse66 0f 73 /reg=7</opc>
-            <opr>VR Ib</opr>
-        </def>
-    </instruction>
-
     <instruction>
         <mnemonic>psllw</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f f1</opc>
+            <opc>/sse=66 0f f1</opc>
             <opr>V W</opr>
         </def>
         <def>
         </def>
         <def>
             <pfx>rexb</pfx>
-            <opc>sse66 0f 71 /reg=6</opc>
-            <opr>VR Ib</opr>
+            <opc>/sse=66 0f 71 /reg=6</opc>
+            <opr>U Ib</opr>
         </def>
         <def>
             <opc>0f 71 /reg=6</opc>
-            <opr>PR Ib</opr>
+            <opr>N Ib</opr>
         </def>
     </instruction>
 
         <mnemonic>pslld</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f f2</opc>
+            <opc>/sse=66 0f f2</opc>
             <opr>V W</opr>
         </def>
         <def>
         </def>
         <def>
             <pfx>rexb</pfx>
-            <opc>sse66 0f 72 /reg=6</opc>
-            <opr>VR Ib</opr>
+            <opc>/sse=66 0f 72 /reg=6</opc>
+            <opr>U Ib</opr>
         </def>
         <def>
             <opc>0f 72 /reg=6</opc>
-            <opr>PR Ib</opr>
+            <opr>N Ib</opr>
         </def>
     </instruction>
 
         <mnemonic>psllq</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f f3</opc>
+            <opc>/sse=66 0f f3</opc>
             <opr>V W</opr>
         </def>
         <def>
         </def>
         <def>
             <pfx>rexb</pfx>
-            <opc>sse66 0f 73 /reg=6</opc>
-            <opr>VR Ib</opr>
+            <opc>/sse=66 0f 73 /reg=6</opc>
+            <opr>U Ib</opr>
         </def>
         <def>
             <opc>0f 73 /reg=6</opc>
-            <opr>PR Ib</opr>
+            <opr>N Ib</opr>
         </def>
     </instruction>
 
         </def>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f e1</opc>
+            <opc>/sse=66 0f e1</opc>
             <opr>V W</opr>
         </def>
         <def>
             <pfx>rexb</pfx>
-            <opc>sse66 0f 71 /reg=4</opc>
-            <opr>VR Ib</opr>
+            <opc>/sse=66 0f 71 /reg=4</opc>
+            <opr>U Ib</opr>
         </def>
         <def>
             <opc>0f 71 /reg=4</opc>
-            <opr>PR Ib</opr>
+            <opr>N Ib</opr>
         </def>
     </instruction>
 
         <mnemonic>psrad</mnemonic>
         <def>
             <opc>0f 72 /reg=4</opc>
-            <opr>PR Ib</opr>
+            <opr>N Ib</opr>
         </def>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f e2</opc>
+            <opc>/sse=66 0f e2</opc>
             <opr>V W</opr>
         </def>
         <def>
         </def>
         <def>
             <pfx>rexb</pfx>
-            <opc>sse66 0f 72 /reg=4</opc>
-            <opr>VR Ib</opr>
+            <opc>/sse=66 0f 72 /reg=4</opc>
+            <opr>U Ib</opr>
         </def>
     </instruction>
 
         <mnemonic>psrlw</mnemonic>
         <def>
             <opc>0f 71 /reg=2</opc>
-            <opr>PR Ib</opr>
+            <opr>N Ib</opr>
         </def>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
         </def>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f d1</opc>
+            <opc>/sse=66 0f d1</opc>
             <opr>V W</opr>
         </def>
         <def>
             <pfx>rexb</pfx>
-            <opc>sse66 0f 71 /reg=2</opc>
-            <opr>VR Ib</opr>
+            <opc>/sse=66 0f 71 /reg=2</opc>
+            <opr>U Ib</opr>
         </def>
     </instruction>
 
         <mnemonic>psrld</mnemonic>
         <def>
             <opc>0f 72 /reg=2</opc>
-            <opr>PR Ib</opr>
+            <opr>N Ib</opr>
         </def>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
         </def>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f d2</opc>
+            <opc>/sse=66 0f d2</opc>
             <opr>V W</opr>
         </def>
         <def>
             <pfx>rexb</pfx>
-            <opc>sse66 0f 72 /reg=2</opc>
-            <opr>VR Ib</opr>
+            <opc>/sse=66 0f 72 /reg=2</opc>
+            <opr>U Ib</opr>
         </def>
     </instruction>
 
         <mnemonic>psrlq</mnemonic>
         <def>
             <opc>0f 73 /reg=2</opc>
-            <opr>PR Ib</opr>
+            <opr>N Ib</opr>
         </def>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
         </def>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f d3</opc>
+            <opc>/sse=66 0f d3</opc>
             <opr>V W</opr>
         </def>
         <def>
             <pfx>rexb</pfx>
-            <opc>sse66 0f 73 /reg=2</opc>
-            <opr>VR Ib</opr>
-        </def>
-    </instruction>
-
-    <instruction>
-        <mnemonic>psrldq</mnemonic>
-        <def>
-            <pfx>rexb</pfx>
-            <opc>sse66 0f 73 /reg=3</opc>
-            <opr>VR Ib</opr>
+            <opc>/sse=66 0f 73 /reg=2</opc>
+            <opr>U Ib</opr>
         </def>
     </instruction>
 
         <mnemonic>psubb</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f f8</opc>
+            <opc>/sse=66 0f f8</opc>
             <opr>V W</opr>
         </def>
         <def>
         <mnemonic>psubw</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f f9</opc>
+            <opc>/sse=66 0f f9</opc>
             <opr>V W</opr>
         </def>
         <def>
         </def>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f fa</opc>
-            <opr>V W</opr>
-        </def>
-    </instruction>
-
-    <instruction>
-        <mnemonic>psubq</mnemonic>
-        <def>
-            <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f fb</opc>
+            <opc>/sse=66 0f fa</opc>
             <opr>V W</opr>
         </def>
-        <def>
-            <pfx>aso rexr rexx rexb</pfx>
-            <opc>0f fb</opc>
-            <opr>P Q</opr>
-        </def>
     </instruction>
 
     <instruction>
         </def>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f e8</opc>
+            <opc>/sse=66 0f e8</opc>
             <opr>V W</opr>
         </def>
     </instruction>
         </def>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f e9</opc>
+            <opc>/sse=66 0f e9</opc>
             <opr>V W</opr>
         </def>
     </instruction>
         </def>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f d8</opc>
-            <opr>V W</opr>
-        </def>
-        <def>
-            <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f dc</opc>
+            <opc>/sse=66 0f d8</opc>
             <opr>V W</opr>
         </def>
     </instruction>
         </def>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f d9</opc>
+            <opc>/sse=66 0f d9</opc>
             <opr>V W</opr>
         </def>
     </instruction>
         <mnemonic>punpckhbw</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f 68</opc>
-            <opr>V W</opr>
-        </def>
-        <def>
-            <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f dd</opc>
+            <opc>/sse=66 0f 68</opc>
             <opr>V W</opr>
         </def>
         <def>
         <mnemonic>punpckhwd</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f 69</opc>
+            <opc>/sse=66 0f 69</opc>
             <opr>V W</opr>
         </def>
         <def>
         <mnemonic>punpckhdq</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f 6a</opc>
+            <opc>/sse=66 0f 6a</opc>
             <opr>V W</opr>
         </def>
         <def>
         </def>
     </instruction>
 
-    <instruction>
-        <mnemonic>punpckhqdq</mnemonic>
-        <def>
-            <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f 6d</opc>
-            <opr>V W</opr>
-        </def>
-    </instruction>
-
     <instruction>
         <mnemonic>punpcklbw</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f 60</opc>
+            <opc>/sse=66 0f 60</opc>
             <opr>V W</opr>
         </def>
         <def>
         <mnemonic>punpcklwd</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f 61</opc>
+            <opc>/sse=66 0f 61</opc>
             <opr>V W</opr>
         </def>
         <def>
         <mnemonic>punpckldq</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f 62</opc>
+            <opc>/sse=66 0f 62</opc>
             <opr>V W</opr>
         </def>
         <def>
         </def>
     </instruction>
 
-    <instruction>
-        <mnemonic>punpcklqdq</mnemonic>
-        <def>
-            <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f 6c</opc>
-            <opr>V W</opr>
-        </def>
-    </instruction>
-
     <instruction>
         <mnemonic>pi2fw</mnemonic>
         <def>
+            <pfx>aso rexr rexx rexb</pfx>
             <opc>0f 0f /3dnow=0c</opc>
             <opr>P Q</opr>
         </def>
     <instruction>
         <mnemonic>pi2fd</mnemonic>
         <def>
+            <pfx>aso rexr rexx rexb</pfx>
             <opc>0f 0f /3dnow=0d</opc>
             <opr>P Q</opr>
         </def>
     <instruction>
         <mnemonic>pf2iw</mnemonic>
         <def>
+            <pfx>aso rexr rexx rexb</pfx>
             <opc>0f 0f /3dnow=1c</opc>
             <opr>P Q</opr>
         </def>
     <instruction>
         <mnemonic>pf2id</mnemonic>
         <def>
+            <pfx>aso rexr rexx rexb</pfx>
             <opc>0f 0f /3dnow=1d</opc>
             <opr>P Q</opr>
         </def>
     <instruction>
         <mnemonic>pfnacc</mnemonic>
         <def>
+            <pfx>aso rexr rexx rexb</pfx>
             <opc>0f 0f /3dnow=8a</opc>
             <opr>P Q</opr>
         </def>
     <instruction>
         <mnemonic>pfpnacc</mnemonic>
         <def>
+            <pfx>aso rexr rexx rexb</pfx>
             <opc>0f 0f /3dnow=8e</opc>
             <opr>P Q</opr>
         </def>
     <instruction>
         <mnemonic>pfcmpge</mnemonic>
         <def>
+            <pfx>aso rexr rexx rexb</pfx>
             <opc>0f 0f /3dnow=90</opc>
             <opr>P Q</opr>
         </def>
     <instruction>
         <mnemonic>pfmin</mnemonic>
         <def>
+            <pfx>aso rexr rexx rexb</pfx>
             <opc>0f 0f /3dnow=94</opc>
             <opr>P Q</opr>
         </def>
     <instruction>
         <mnemonic>pfrcp</mnemonic>
         <def>
+            <pfx>aso rexr rexx rexb</pfx>
             <opc>0f 0f /3dnow=96</opc>
             <opr>P Q</opr>
         </def>
     <instruction>
         <mnemonic>pfrsqrt</mnemonic>
         <def>
+            <pfx>aso rexr rexx rexb</pfx>
             <opc>0f 0f /3dnow=97</opc>
             <opr>P Q</opr>
         </def>
     <instruction>
         <mnemonic>pfsub</mnemonic>
         <def>
+            <pfx>aso rexr rexx rexb</pfx>
             <opc>0f 0f /3dnow=9a</opc>
             <opr>P Q</opr>
         </def>
     <instruction>
         <mnemonic>pfadd</mnemonic>
         <def>
+            <pfx>aso rexr rexx rexb</pfx>
             <opc>0f 0f /3dnow=9e</opc>
             <opr>P Q</opr>
         </def>
     <instruction>
         <mnemonic>pfcmpgt</mnemonic>
         <def>
+            <pfx>aso rexr rexx rexb</pfx>
             <opc>0f 0f /3dnow=a0</opc>
             <opr>P Q</opr>
         </def>
     <instruction>
         <mnemonic>pfmax</mnemonic>
         <def>
+            <pfx>aso rexr rexx rexb</pfx>
             <opc>0f 0f /3dnow=a4</opc>
             <opr>P Q</opr>
         </def>
     <instruction>
         <mnemonic>pfrcpit1</mnemonic>
         <def>
+            <pfx>aso rexr rexx rexb</pfx>
             <opc>0f 0f /3dnow=a6</opc>
             <opr>P Q</opr>
         </def>
     </instruction>
 
     <instruction>
-        <mnemonic>pfrspit1</mnemonic>
+        <mnemonic>pfrsqit1</mnemonic>
         <def>
+            <pfx>aso rexr rexx rexb</pfx>
             <opc>0f 0f /3dnow=a7</opc>
             <opr>P Q</opr>
         </def>
     <instruction>
         <mnemonic>pfsubr</mnemonic>
         <def>
+            <pfx>aso rexr rexx rexb</pfx>
             <opc>0f 0f /3dnow=aa</opc>
             <opr>P Q</opr>
         </def>
     <instruction>
         <mnemonic>pfacc</mnemonic>
         <def>
+            <pfx>aso rexr rexx rexb</pfx>
             <opc>0f 0f /3dnow=ae</opc>
             <opr>P Q</opr>
         </def>
     <instruction>
         <mnemonic>pfcmpeq</mnemonic>
         <def>
+            <pfx>aso rexr rexx rexb</pfx>
             <opc>0f 0f /3dnow=b0</opc>
             <opr>P Q</opr>
         </def>
     <instruction>
         <mnemonic>pfmul</mnemonic>
         <def>
+            <pfx>aso rexr rexx rexb</pfx>
             <opc>0f 0f /3dnow=b4</opc>
             <opr>P Q</opr>
         </def>
     <instruction>
         <mnemonic>pfrcpit2</mnemonic>
         <def>
+            <pfx>aso rexr rexx rexb</pfx>
             <opc>0f 0f /3dnow=b6</opc>
             <opr>P Q</opr>
         </def>
     <instruction>
         <mnemonic>pmulhrw</mnemonic>
         <def>
+            <pfx>aso rexr rexx rexb</pfx>
             <opc>0f 0f /3dnow=b7</opc>
             <opr>P Q</opr>
         </def>
     <instruction>
         <mnemonic>pswapd</mnemonic>
         <def>
+            <pfx>aso rexr rexx rexb</pfx>
             <opc>0f 0f /3dnow=bb</opc>
             <opr>P Q</opr>
         </def>
     <instruction>
         <mnemonic>pavgusb</mnemonic>
         <def>
+            <pfx>aso rexr rexx rexb</pfx>
             <opc>0f 0f /3dnow=bf</opc>
             <opr>P Q</opr>
         </def>
     <instruction>
         <mnemonic>push</mnemonic>
         <def>
-            <opc>06</opc>
+            <opc>06 /m=!64</opc>
             <opr>ES</opr>
             <mode>inv64</mode>
         </def>
         <def>
-            <opc>0e</opc>
+            <opc>0e /m=!64</opc>
             <opr>CS</opr>
             <mode>inv64</mode>
         </def>
         <def>
-            <opc>16</opc>
+            <opc>16 /m=!64</opc>
             <opr>SS</opr>
             <mode>inv64</mode>
         </def>
         <def>
-            <opc>1e</opc>
+            <opc>1e /m=!64</opc>
             <opr>DS</opr>
             <mode>inv64</mode>
         </def>
         <def>
             <pfx>oso rexb</pfx>
             <opc>50</opc>
-            <opr>rAXr8</opr>
-            <mode>def64 depM</mode>
+            <opr>R0v</opr>
+            <mode>def64</mode>
         </def>
         <def>
             <pfx>oso rexb</pfx>
             <opc>51</opc>
-            <opr>rCXr9</opr>
-            <mode>def64 depM</mode>
+            <opr>R1v</opr>
+            <mode>def64</mode>
         </def>
         <def>
             <pfx>oso rexb</pfx>
             <opc>52</opc>
-            <opr>rDXr10</opr>
-            <mode>def64 depM</mode>
+            <opr>R2v</opr>
+            <mode>def64</mode>
         </def>
         <def>
             <pfx>oso rexb</pfx>
             <opc>53</opc>
-            <opr>rBXr11</opr>
-            <mode>def64 depM</mode>
+            <opr>R3v</opr>
+            <mode>def64</mode>
         </def>
         <def>
             <pfx>oso rexb</pfx>
             <opc>54</opc>
-            <opr>rSPr12</opr>
-            <mode>def64 depM</mode>
+            <opr>R4v</opr>
+            <mode>def64</mode>
         </def>
         <def>
             <pfx>oso rexb</pfx>
             <opc>55</opc>
-            <opr>rBPr13</opr>
-            <mode>def64 depM</mode>
+            <opr>R5v</opr>
+            <mode>def64</mode>
         </def>
         <def>
             <pfx>oso rexb</pfx>
             <opc>56</opc>
-            <opr>rSIr14</opr>
-            <mode>def64 depM</mode>
+            <opr>R6v</opr>
+            <mode>def64</mode>
         </def>
         <def>
             <pfx>oso rexb</pfx>
             <opc>57</opc>
-            <opr>rDIr15</opr>
-            <mode>def64 depM</mode>
+            <opr>R7v</opr>
+            <mode>def64</mode>
         </def>
         <def>
             <pfx>oso</pfx>
             <opc>68</opc>
-            <opr>Iz</opr>
-            <syn>cast</syn>
+            <opr>sIz</opr>
+            <mode>def64</mode>
         </def>
         <def>
             <pfx>aso oso rexw rexr rexx rexb</pfx>
             <mode>def64</mode>
         </def>
         <def>
+            <pfx>oso</pfx>
             <opc>6a</opc>
-            <opr>Ib</opr>
-            <syn>sext</syn>
+            <opr>sIb</opr>
+            <mode>def64</mode>
         </def>
     </instruction>
 
         <mnemonic>pusha</mnemonic>
         <def>
             <pfx>oso</pfx>
-            <opc>60 /o=16</opc>
+            <opc>60 /o=16 /m=!64</opc>
             <mode>inv64</mode>
         </def>
     </instruction>
         <mnemonic>pushad</mnemonic>
         <def>
             <pfx>oso</pfx>
-            <opc>60 /o=32</opc>
+            <opc>60 /o=32 /m=!64</opc>
             <mode>inv64</mode>
         </def>
     </instruction>
         <mnemonic>pushfw</mnemonic>
         <def>
             <pfx>oso</pfx>
-            <opc>9c /m=32 /o=16</opc>
-            <mode>def64</mode>
-        </def>
-        <def>
-            <pfx>oso</pfx>
-            <opc>9c /m=16 /o=16</opc>
-            <mode>def64</mode>
+            <opc>9c /m=!64 /o=16</opc>
         </def>
         <def>
             <pfx>oso rexw</pfx>
         <mnemonic>pushfd</mnemonic>
         <def>
             <pfx>oso</pfx>
-            <opc>9c /m=16 /o=32</opc>
-            <mode>def64</mode>
-        </def>
-        <def>
-            <pfx>oso</pfx>
-            <opc>9c /m=32 /o=32</opc>
-            <mode>def64</mode>
+            <opc>9c /m=!64 /o=32</opc>
         </def>
     </instruction>
 
         <mnemonic>pxor</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f ef</opc>
+            <opc>/sse=66 0f ef</opc>
             <opr>V W</opr>
         </def>
         <def>
             <pfx>aso rexw rexr rexx rexb</pfx>
             <opc>d2 /reg=2</opc>
             <opr>Eb CL</opr>
-            <syn>cast</syn>
         </def>
         <def>
             <pfx>aso oso rexw rexr rexx rexb</pfx>
             <opc>d3 /reg=2</opc>
             <opr>Ev CL</opr>
-            <syn>cast</syn>
         </def>
         <def>
             <pfx>aso oso rexw rexr rexx rexb</pfx>
             <pfx>aso rexw rexr rexx rexb</pfx>
             <opc>d2 /reg=3</opc>
             <opr>Eb CL</opr>
-            <syn>cast</syn>
         </def>
         <def>
             <pfx>aso oso rexw rexr rexx rexb</pfx>
             <opc>d3 /reg=3</opc>
             <opr>Ev CL</opr>
-            <syn>cast</syn>
         </def>
     </instruction>
 
             <pfx>aso rexw rexr rexx rexb</pfx>
             <opc>d2 /reg=0</opc>
             <opr>Eb CL</opr>
-            <syn>cast</syn> 
         </def>
         <def>
             <pfx>aso oso rexw rexr rexx rexb</pfx>
             <opc>d3 /reg=0</opc>
             <opr>Ev CL</opr>
-            <syn>cast</syn> 
         </def>
         <def>
             <pfx>aso oso rexw rexr rexx rexb</pfx>
             <pfx>aso rexw rexr rexx rexb</pfx>
             <opc>d2 /reg=1</opc>
             <opr>Eb CL</opr>
-            <syn>cast</syn>
         </def>
         <def>
             <pfx>aso oso rexw rexr rexx rexb</pfx>
             <opc>d3 /reg=1</opc>
             <opr>Ev CL</opr>
-            <syn>cast</syn>
         </def>
     </instruction>
 
         <mnemonic>rcpss</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>ssef3 0f 53</opc>
+            <opc>/sse=f3 0f 53</opc>
             <opr>V W</opr>
         </def>
     </instruction>
         <mnemonic>rsqrtss</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>ssef3 0f 52</opc>
+            <opc>/sse=f3 0f 52</opc>
             <opr>V W</opr>
         </def>
     </instruction>
     <instruction>
         <mnemonic>salc</mnemonic>
         <def>
-            <opc>d6</opc>
+            <opc>d6 /m=!64</opc>
             <mode>inv64</mode>
         </def>
     </instruction>
             <pfx>aso rexw rexr rexx rexb</pfx>
             <opc>d2 /reg=7</opc>
             <opr>Eb CL</opr>
-            <syn>cast</syn>
         </def>
         <def>
             <pfx>aso oso rexw rexr rexx rexb</pfx>
             <opc>d3 /reg=7</opc>
             <opr>Ev CL</opr>
-            <syn>cast</syn>
         </def>
     </instruction>
 
             <pfx>aso rexw rexr rexx rexb</pfx>
             <opc>d2 /reg=6</opc>
             <opr>Eb CL</opr>
-            <syn>cast</syn>
         </def>
         <def>
             <pfx>aso oso rexw rexr rexx rexb</pfx>
             <opc>d3 /reg=6</opc>
             <opr>Ev CL</opr>
-            <syn>cast</syn>
         </def>
         <def>
             <pfx>aso oso rexw rexr rexx rexb</pfx>
             <pfx>aso rexr rexx rexb</pfx>
             <opc>d2 /reg=4</opc>
             <opr>Eb CL</opr>
-            <syn>cast</syn>
         </def>
         <def>
             <pfx>aso oso rexw rexr rexx rexb</pfx>
             <pfx>aso rexw rexr rexx rexb</pfx>
             <opc>d2 /reg=5</opc>
             <opr>Eb CL</opr>
-            <syn>cast</syn>
         </def>
         <def>
             <pfx>aso oso rexw rexr rexx rexb</pfx>
             <pfx>aso oso rexw rexr rexx rexb</pfx>
             <opc>d3 /reg=5</opc>
             <opr>Ev CL</opr>
-            <syn>cast</syn>
         </def>
     </instruction>
 
         <def>
             <pfx>oso rexw</pfx>
             <opc>1d</opc>
-            <opr>rAX Iz</opr>
-            <syn>sext</syn>
+            <opr>rAX sIz</opr>
         </def>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
         <def>
             <pfx>aso oso rexw rexr rexx rexb</pfx>
             <opc>81 /reg=3</opc>
-            <opr>Ev Iz</opr>
-            <syn>sext</syn>
+            <opr>Ev sIz</opr>
         </def>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>82 /reg=3</opc>
+            <opc>82 /reg=3 /m=!64</opc>
             <opr>Eb Ib</opr>
             <mode>inv64</mode>
         </def>
         <def>
             <pfx>aso oso rexw rexr rexx rexb</pfx>
             <opc>83 /reg=3</opc>
-            <opr>Ev Ib</opr>
-            <syn>sext</syn>
+            <opr>Ev sIb</opr>
         </def>
     </instruction>
 
     <instruction>
         <mnemonic>scasb</mnemonic>
         <def>
+            <pfx>repz</pfx>
             <opc>ae</opc>
         </def>
     </instruction>
     <instruction>
         <mnemonic>scasw</mnemonic>
         <def>
-            <pfx>oso rexw</pfx>
+            <pfx>repz oso rexw</pfx>
             <opc>af /o=16</opc>
         </def>
     </instruction>
     <instruction>
         <mnemonic>scasd</mnemonic>
         <def>
-            <pfx>oso rexw</pfx>
+            <pfx>repz oso rexw</pfx>
             <opc>af /o=32</opc>
         </def>
     </instruction>
     <instruction>
         <mnemonic>scasq</mnemonic>
         <def>
-            <pfx>oso rexw</pfx>
+            <pfx>repz oso rexw</pfx>
             <opc>af /o=64</opc>
         </def>
     </instruction>
     </instruction>
 
     <instruction>
-        <mnemonic>setnb</mnemonic>
+        <mnemonic>setae</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
             <opc>0f 93</opc>
         <mnemonic>shufpd</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f c6</opc>
+            <opc>/sse=66 0f c6</opc>
             <opr>V W Ib</opr>
         </def>
     </instruction>
     <instruction>
         <mnemonic>sldt</mnemonic>
         <def>
-            <pfx>aso oso rexr rexx rexb</pfx>
+            <pfx>aso oso rexr rexw rexx rexb</pfx>
             <opc>0f 00 /reg=0</opc>
             <opr>MwRv</opr>
         </def>
     <instruction>
         <mnemonic>smsw</mnemonic>
         <def>
-            <pfx>aso rexr rexx rexb</pfx>
+            <pfx>aso oso rexr rexw rexx rexb</pfx>
             <opc>0f 01 /reg=4 /mod=!11</opc>
-            <opr>M</opr>
+            <opr>MwRv</opr>
+        </def>
+        <def>
+            <pfx>aso oso rexr rexw rexx rexb</pfx>
+            <opc>0f 01 /reg=4 /mod=11</opc>
+            <opr>MwRv</opr>
         </def>
     </instruction>
 
         <mnemonic>sqrtpd</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f 51</opc>
+            <opc>/sse=66 0f 51</opc>
             <opr>V W</opr>
         </def>
     </instruction>
         <mnemonic>sqrtsd</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>ssef2 0f 51</opc>
+            <opc>/sse=f2 0f 51</opc>
             <opr>V W</opr>
         </def>
     </instruction>
         <mnemonic>sqrtss</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>ssef3 0f 51</opc>
+            <opc>/sse=f3 0f 51</opc>
             <opr>V W</opr>
         </def>
     </instruction>
         <mnemonic>stmxcsr</mnemonic>
         <def>
             <pfx>aso rexw rexr rexx rexb</pfx>
-            <opc>0f ae /reg=3</opc>
+            <opc>0f ae /mod=!11 /reg=3</opc>
             <opr>Md</opr>
         </def>
     </instruction>
     <instruction>
         <mnemonic>stosb</mnemonic>
         <def>
-            <pfx>seg</pfx>
+            <pfx>rep seg</pfx>
             <opc>aa</opc>
         </def>
     </instruction>
     <instruction>
         <mnemonic>stosw</mnemonic>
         <def>
-            <pfx>seg oso rexw</pfx>
+            <pfx>rep seg oso rexw</pfx>
             <opc>ab /o=16</opc>
         </def>
     </instruction>
     <instruction>
         <mnemonic>stosd</mnemonic>
         <def>
-            <pfx>seg oso rexw</pfx>
+            <pfx>rep seg oso rexw</pfx>
             <opc>ab /o=32</opc>
         </def>
     </instruction>
     <instruction>
         <mnemonic>stosq</mnemonic>
         <def>
-            <pfx>seg oso rexw</pfx>
+            <pfx>rep seg oso rexw</pfx>
             <opc>ab /o=64</opc>
         </def>
     </instruction>
     <instruction>
         <mnemonic>str</mnemonic>
         <def>
-            <pfx>aso oso rexr rexx rexb</pfx>
+            <pfx>aso oso rexr rexw rexx rexb</pfx>
             <opc>0f 00 /reg=1</opc>
-            <opr>Ev</opr>
+            <opr>MwRv</opr>
         </def>
     </instruction>
 
         <def>
             <pfx>oso rexw</pfx>
             <opc>2d</opc>
-            <opr>rAX Iz</opr>
-            <syn>sext</syn>
+            <opr>rAX sIz</opr>
         </def>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
         <def>
             <pfx>aso oso rexw rexr rexx rexb</pfx>
             <opc>81 /reg=5</opc>
-            <opr>Ev Iz</opr>
-            <syn>sext</syn>
+            <opr>Ev sIz</opr>
         </def>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>82 /reg=5</opc>
+            <opc>82 /reg=5 /m=!64</opc>
             <opr>Eb Ib</opr>
             <mode>inv64</mode>
         </def>
         <def>
             <pfx>aso oso rexw rexr rexx rexb</pfx>
             <opc>83 /reg=5</opc>
-            <opr>Ev Ib</opr>
-            <syn>sext</syn>
+            <opr>Ev sIb</opr>
         </def>
     </instruction>
 
         <mnemonic>subpd</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f 5c</opc>
+            <opc>/sse=66 0f 5c</opc>
             <opr>V W</opr>
         </def>
     </instruction>
         <mnemonic>subsd</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>ssef2 0f 5c</opc>
+            <opc>/sse=f2 0f 5c</opc>
             <opr>V W</opr>
         </def>
     </instruction>
         <mnemonic>subss</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>ssef3 0f 5c</opc>
+            <opc>/sse=f3 0f 5c</opc>
             <opr>V W</opr>
         </def>
     </instruction>
     <instruction>
         <mnemonic>sysenter</mnemonic>
         <def>
-            <opc>0f 34</opc>
-            <mode>inv64</mode>
+            <opc>0f 34 /m=!64</opc>
+        </def>
+        <def>
+            <opc>0f 34 /m=64</opc>
+            <vendor>intel</vendor>
         </def>
     </instruction>
 
     <instruction>
         <mnemonic>sysexit</mnemonic>
         <def>
-            <opc>0f 35</opc>
+            <opc>0f 35 /m=!64</opc>
+        </def>
+        <def>
+            <opc>0f 35 /m=64</opc>
+            <vendor>intel</vendor>
         </def>
     </instruction>
 
         <def>
             <pfx>oso rexw</pfx>
             <opc>a9</opc>
-            <opr>rAX Iz</opr>
-            <syn>sext</syn>
+            <opr>rAX sIz</opr>
         </def>
         <def>
             <pfx>aso rexw rexr rexx rexb</pfx>
         <def>
             <pfx>aso oso rexw rexr rexx rexb</pfx>
             <opc>f7 /reg=0</opc>
-            <opr>Ev Iz</opr>
-            <syn>sext</syn>
+            <opr>Ev sIz</opr>
         </def>
         <def>
             <pfx>aso oso rexw rexr rexx rexb</pfx>
             <opc>f7 /reg=1</opc>
             <opr>Ev Iz</opr>
-            <syn>sext</syn>
         </def>
     </instruction>
 
         <mnemonic>ucomisd</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f 2e</opc>
+            <opc>/sse=66 0f 2e</opc>
             <opr>V W</opr>
         </def>
     </instruction>
         <mnemonic>unpckhpd</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f 15</opc>
+            <opc>/sse=66 0f 15</opc>
             <opr>V W</opr>
         </def>
     </instruction>
         <mnemonic>unpcklpd</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f 14</opc>
+            <opc>/sse=66 0f 14</opc>
             <opr>V W</opr>
         </def>
     </instruction>
         <vendor>intel</vendor>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f c7 /reg=6</opc>
+            <opc>/sse=66 0f c7 /reg=6</opc>
             <opr>Mq</opr>
         </def>
     </instruction>
         <vendor>intel</vendor>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>ssef3 0f c7 /reg=6</opc>
+            <opc>/sse=f3 0f c7 /reg=6</opc>
             <opr>Mq</opr>
         </def>
     </instruction>
         <vendor>intel</vendor>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>0f 78 /m=16</opc>
-            <opr>Ed Gd</opr>
-            <mode>def64</mode>
-        </def>
-        <def>
-            <pfx>aso rexr rexx rexb</pfx>
-            <opc>0f 78 /m=32</opc>
-            <opr>Ed Gd</opr>
-            <mode>def64</mode>
-        </def>
-        <def>
-            <pfx>aso rexr rexx rexb</pfx>
-            <opc>0f 78 /m=64</opc>
-            <opr>Eq Gq</opr>
+            <opc>0f 78</opc>
+            <opr>Ey Gy</opr>
             <mode>def64</mode>
         </def>
     </instruction>
         <vendor>intel</vendor>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>0f 79 /m=16</opc>
-            <opr>Gd Ed</opr>
-            <mode>def64</mode>
-        </def>
-        <def>
-            <pfx>aso rexr rexx rexb</pfx>
-            <opc>0f 79 /m=32</opc>
-            <opr>Gd Ed</opr>
-            <mode>def64</mode>
-        </def>
-        <def>
-            <pfx>aso rexr rexx rexb</pfx>
-            <opc>0f 79 /m=64</opc>
-            <opr>Gq Eq</opr>
+            <opc>0f 79</opc>
+            <opr>Gy Ey</opr>
             <mode>def64</mode>
         </def>
     </instruction>
             <opc>0f c0</opc>
             <opr>Eb Gb</opr>
         </def>
-        <def>
-            <pfx>aso oso rexw rexr rexx rexb</pfx>
-            <opc>sse66 0f c1</opc>
-            <opr>Ev Gv</opr>
-        </def>
-        <def>
-            <pfx>aso rexw rexr rexx rexb</pfx>
-            <opc>sse66 0f c0</opc>
-            <opr>Eb Gb</opr>
-        </def>
-        <def>
-            <pfx>aso rexw rexr rexx rexb</pfx>
-            <opc>ssef2 0f c0</opc>
-            <opr>Eb Gb</opr>
-        </def>
-        <def>
-            <pfx>aso oso rexr rexx rexb</pfx>
-            <opc>ssef2 0f c1</opc>
-            <opr>Ev Gv</opr>
-        </def>
-        <def>
-            <pfx>aso rexw rexr rexx rexb</pfx>
-            <opc>ssef3 0f c0</opc>
-            <opr>Eb Gb</opr>
-        </def>
-        <def>
-            <pfx>aso rexw rexr rexx rexb</pfx>
-            <opc>ssef3 0f c1</opc>
-            <opr>Ev Gv</opr>
-        </def>
         <def>
             <pfx>aso oso rexw rexr rexx rexb</pfx>
             <opc>0f c1</opc>
         <def>
             <pfx>oso rexw rexb</pfx>
             <opc>90</opc>
-            <opr>rAXr8 rAX</opr>
+            <opr>R0v rAX</opr>
         </def>
         <def>
             <pfx>oso rexw rexb</pfx>
             <opc>91</opc>
-            <opr>rCXr9 rAX</opr>
+            <opr>R1v rAX</opr>
         </def>
         <def>
             <pfx>oso rexw rexb</pfx>
             <opc>92</opc>
-            <opr>rDXr10 rAX</opr>
+            <opr>R2v rAX</opr>
         </def>
         <def>
             <pfx>oso rexw rexb</pfx>
             <opc>93</opc>
-            <opr>rBXr11 rAX</opr>
+            <opr>R3v rAX</opr>
         </def>
         <def>
             <pfx>oso rexw rexb</pfx>
             <opc>94</opc>
-            <opr>rSPr12 rAX</opr>
+            <opr>R4v rAX</opr>
         </def>
         <def>
             <pfx>oso rexw rexb</pfx>
             <opc>95</opc>
-            <opr>rBPr13 rAX</opr>
+            <opr>R5v rAX</opr>
         </def>
         <def>
             <pfx>oso rexw rexb</pfx>
             <opc>96</opc>
-            <opr>rSIr14 rAX</opr>
+            <opr>R6v rAX</opr>
         </def>
         <def>
             <pfx>oso rexw rexb</pfx>
             <opc>97</opc>
-            <opr>rDIr15 rAX</opr>
+            <opr>R7v rAX</opr>
         </def>
     </instruction>
 
+    <instruction>
+        <mnemonic>xgetbv</mnemonic>
+    <def>
+        <opc>0f 01 /mod=11 /reg=2 /rm=0</opc>
+    </def>
+    </instruction>
+
     <instruction>
         <mnemonic>xlatb</mnemonic>
         <def>
-            <pfx>rexw</pfx>
+            <pfx>rexw seg</pfx>
             <opc>d7</opc>
         </def>
     </instruction>
         <def>
             <pfx>oso rexw</pfx>
             <opc>35</opc>
-            <opr>rAX Iz</opr>
-            <syn>sext</syn>
+            <opr>rAX sIz</opr>
         </def>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
         <def>
             <pfx>aso oso rexw rexr rexx rexb</pfx>
             <opc>81 /reg=6</opc>
-            <opr>Ev Iz</opr>
-            <syn>sext</syn>
+            <opr>Ev sIz</opr>
         </def>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>82 /reg=6</opc>
+            <opc>82 /reg=6 /m=!64</opc>
             <opr>Eb Ib</opr>
             <mode>inv64</mode>
         </def>
         <def>
             <pfx>aso oso rexw rexr rexx rexb</pfx>
             <opc>83 /reg=6</opc>
-            <opr>Ev Ib</opr>
-            <syn>sext</syn>
+            <opr>Ev sIb</opr>
         </def>
     </instruction>
 
         <mnemonic>xorpd</mnemonic>
         <def>
             <pfx>aso rexr rexx rexb</pfx>
-            <opc>sse66 0f 57</opc>
+            <opc>/sse=66 0f 57</opc>
             <opr>V W</opr>
         </def>
     </instruction>
         </def>
     </instruction>
 
+    <instruction>
+        <mnemonic>xrstor</mnemonic>
+    <def>
+        <pfx>aso rexw rexr rexx rexb</pfx>
+        <opc>0f ae /reg=5 /mod=!11</opc>
+        <opr>M</opr>
+    </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>xsave</mnemonic>
+    <def>
+        <pfx>aso rexw rexr rexx rexb</pfx>
+        <opc>0f ae /reg=4 /mod=!11</opc>
+        <opr>M</opr>
+    </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>xsetbv</mnemonic>
+    <def>
+        <opc>0f 01 /mod=11 /reg=2 /rm=1</opc>
+    </def>
+    </instruction>
+
     <instruction>
         <mnemonic>xsha1</mnemonic>
         <def>
         </def>
     </instruction>
 
+    <!--
+    AESNI
+      -->
+
+    <instruction>
+        <mnemonic>aesdec</mnemonic>
+    <class>aesni</class>
+    <def>
+        <pfx>aso rexr rexx rexb</pfx>
+        <opc>/sse=66 0f 38 de</opc>
+        <opr>V W</opr>
+    </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>aesdeclast</mnemonic>
+    <class>aesni</class>
+    <def>
+        <pfx>aso rexr rexx rexb</pfx>
+        <opc>/sse=66 0f 38 df</opc>
+        <opr>V W</opr>
+    </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>aesenc</mnemonic>
+    <class>aesni</class>
+    <def>
+        <pfx>aso rexr rexx rexb</pfx>
+        <opc>/sse=66 0f 38 dc</opc>
+        <opr>V W</opr>
+    </def>
+    </instruction>
+
     <instruction>
-        <mnemonic>db</mnemonic>
+        <mnemonic>aesenclast</mnemonic>
+    <class>aesni</class>
+    <def>
+        <pfx>aso rexr rexx rexb</pfx>
+        <opc>/sse=66 0f 38 dd</opc>
+        <opr>V W</opr>
+    </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>aesimc</mnemonic>
+    <class>aesni</class>
+    <def>
+        <pfx>aso rexr rexx rexb</pfx>
+        <opc>/sse=66 0f 38 db</opc>
+        <opr>V W</opr>
+    </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>aeskeygenassist</mnemonic>
+    <class>aesni</class>
+    <def>
+        <pfx>aso rexr rexx rexb</pfx>
+        <opc>/sse=66 0f 3a df</opc>
+        <opr>V W Ib</opr>
+    </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>pclmulqdq</mnemonic>
+    <class>aesni</class>
+    <def>
+        <pfx>aso rexr rexx rexb</pfx>
+        <opc>/sse=66 0f 3a 44</opc>
+        <opr>V W Ib</opr>
+    </def>
+    </instruction>
+
+    <!--
+    SMX
+      -->
+
+    <instruction>
+        <mnemonic>getsec</mnemonic>
+    <class>smx</class>
+    <def>
+        <opc>0f 37</opc>
+    </def>
+    </instruction>
+
+    <!--
+         SSE 2 
+     -->
+
+    <instruction>
+        <mnemonic>movdqa</mnemonic>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>/sse=66 0f 7f</opc>
+            <opr>W V</opr>
+        </def>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>/sse=66 0f 6f</opc>
+            <opr>V W</opr>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>maskmovdqu</mnemonic>
+        <class>sse2</class>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>/sse=66 0f f7 /mod=11</opc>
+            <opr>V U</opr>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>movdq2q</mnemonic>
+        <def>
+            <pfx>aso rexb</pfx>
+            <opc>/sse=f2 0f d6</opc>
+            <opr>P U</opr>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>movdqu</mnemonic>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>/sse=f3 0f 6f</opc>
+            <opr>V W</opr>
+        </def>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>/sse=f3 0f 7f</opc>
+            <opr>W V</opr>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>movq2dq</mnemonic>
+        <def>
+            <pfx>aso rexr</pfx>
+            <opc>/sse=f3 0f d6</opc>
+            <opr>V N</opr>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>paddq</mnemonic>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>0f d4</opc>
+            <opr>P Q</opr>
+        </def>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>/sse=66 0f d4</opc>
+            <opr>V W</opr>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>psubq</mnemonic>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>/sse=66 0f fb</opc>
+            <opr>V W</opr>
+        </def>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>0f fb</opc>
+            <opr>P Q</opr>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>pmuludq</mnemonic>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>0f f4</opc>
+            <opr>P Q</opr>
+        </def>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>/sse=66 0f f4</opc>
+            <opr>V W</opr>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>pshufhw</mnemonic>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>/sse=f3 0f 70</opc>
+            <opr>V W Ib</opr>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>pshuflw</mnemonic>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>/sse=f2 0f 70</opc>
+            <opr>V W Ib</opr>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>pshufd</mnemonic>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>/sse=66 0f 70</opc>
+            <opr>V W Ib</opr>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>pslldq</mnemonic>
+        <def>
+            <pfx>rexb</pfx>
+            <opc>/sse=66 0f 73 /reg=7</opc>
+            <opr>U Ib</opr>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>psrldq</mnemonic>
+        <def>
+            <pfx>rexb</pfx>
+            <opc>/sse=66 0f 73 /reg=3</opc>
+            <opr>U Ib</opr>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>punpckhqdq</mnemonic>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>/sse=66 0f 6d</opc>
+            <opr>V W</opr>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>punpcklqdq</mnemonic>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>/sse=66 0f 6c</opc>
+            <opr>V W</opr>
+        </def>
+    </instruction>
+
+    <!--
+         SSE 3
+      -->
+
+    <instruction>
+        <mnemonic>addsubpd</mnemonic>
+        <class>sse3</class>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>/sse=66 0f d0</opc>
+            <opr>V W</opr>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>addsubps</mnemonic>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>/sse=f2 0f d0</opc>
+            <opr>V W</opr>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>haddpd</mnemonic>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>/sse=66 0f 7c</opc>
+            <opr>V W</opr>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>haddps</mnemonic>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>/sse=f2 0f 7c</opc>
+            <opr>V W</opr>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>hsubpd</mnemonic>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>/sse=66 0f 7d</opc>
+            <opr>V W</opr>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>hsubps</mnemonic>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>/sse=f2 0f 7d</opc>
+            <opr>V W</opr>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>movddup</mnemonic>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>/sse=f2 0f 12 /mod=11</opc>
+            <opr>V W</opr>
+        </def>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>/sse=f2 0f 12 /mod=!11</opc>
+            <opr>V W</opr>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>movshdup</mnemonic>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>/sse=f3 0f 16 /mod=11</opc>
+            <opr>V W</opr>
+        </def>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>/sse=f3 0f 16 /mod=!11</opc>
+            <opr>V W</opr>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>movsldup</mnemonic>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>/sse=f3 0f 12 /mod=11</opc>
+            <opr>V W</opr>
+        </def>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>/sse=f3 0f 12 /mod=!11</opc>
+            <opr>V W</opr>
+        </def>
+    </instruction>
+
+    <!--
+         SSSE 3
+     -->
+
+    <instruction>
+        <mnemonic>pabsb</mnemonic>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>0f 38 1c</opc>
+            <opr>P Q</opr>
+        </def>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>/sse=66 0f 38 1c</opc>
+            <opr>V W</opr>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>pabsw</mnemonic>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>0f 38 1d</opc>
+            <opr>P Q</opr>
+        </def>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>/sse=66 0f 38 1d</opc>
+            <opr>V W</opr>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>pabsd</mnemonic>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>0f 38 1e</opc>
+            <opr>P Q</opr>
+        </def>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>/sse=66 0f 38 1e</opc>
+            <opr>V W</opr>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>pshufb</mnemonic>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>0f 38 00</opc>
+            <opr>P Q</opr>
+        </def>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>/sse=66 0f 38 00</opc>
+            <opr>V W</opr>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>phaddw</mnemonic>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>0f 38 01</opc>
+            <opr>P Q</opr>
+        </def>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>/sse=66 0f 38 01</opc>
+            <opr>V W</opr>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>phaddd</mnemonic>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>0f 38 02</opc>
+            <opr>P Q</opr>
+        </def>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>/sse=66 0f 38 02</opc>
+            <opr>V W</opr>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>phaddsw</mnemonic>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>0f 38 03</opc>
+            <opr>P Q</opr>
+        </def>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>/sse=66 0f 38 03</opc>
+            <opr>V W</opr>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>pmaddubsw</mnemonic>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>0f 38 04</opc>
+            <opr>P Q</opr>
+        </def>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>/sse=66 0f 38 04</opc>
+            <opr>V W</opr>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>phsubw</mnemonic>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>0f 38 05</opc>
+            <opr>P Q</opr>
+        </def>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>/sse=66 0f 38 05</opc>
+            <opr>V W</opr>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>phsubd</mnemonic>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>0f 38 06</opc>
+            <opr>P Q</opr>
+        </def>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>/sse=66 0f 38 06</opc>
+            <opr>V W</opr>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>phsubsw</mnemonic>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>0f 38 07</opc>
+            <opr>P Q</opr>
+        </def>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>/sse=66 0f 38 07</opc>
+            <opr>V W</opr>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>psignb</mnemonic>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>0f 38 08</opc>
+            <opr>P Q</opr>
+        </def>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>/sse=66 0f 38 08</opc>
+            <opr>V W</opr>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>psignd</mnemonic>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>0f 38 0a</opc>
+            <opr>P Q</opr>
+        </def>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>/sse=66 0f 38 0a</opc>
+            <opr>V W</opr>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>psignw</mnemonic>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>0f 38 09</opc>
+            <opr>P Q</opr>
+        </def>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>/sse=66 0f 38 09</opc>
+            <opr>V W</opr>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>pmulhrsw</mnemonic>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>0f 38 0b</opc>
+            <opr>P Q</opr>
+        </def>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>/sse=66 0f 38 0b</opc>
+            <opr>V W</opr>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>palignr</mnemonic>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>0f 3a 0f</opc>
+            <opr>P Q Ib</opr>
+        </def>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>/sse=66 0f 3a 0f</opc>
+            <opr>V W Ib</opr>
+        </def>
+    </instruction>
+
+    <!--
+         SSE 4.1
+     -->
+
+    <instruction>
+        <mnemonic>pblendvb</mnemonic>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>/sse=66 0f 38 10</opc>
+            <opr>V W</opr>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>pmuldq</mnemonic>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>/sse=66 0f 38 28</opc>
+            <opr>V W</opr>
+            <class>sse4.1</class>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>pminsb</mnemonic>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>/sse=66 0f 38 38</opc>
+            <opr>V W</opr>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>pminsd</mnemonic>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>/sse=66 0f 38 39</opc>
+            <opr>V W</opr>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>pminuw</mnemonic>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>/sse=66 0f 38 3a</opc>
+            <opr>V W</opr>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>pminud</mnemonic>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>/sse=66 0f 38 3b</opc>
+            <opr>V W</opr>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>pmaxsb</mnemonic>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>/sse=66 0f 38 3c</opc>
+            <opr>V W</opr>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>pmaxsd</mnemonic>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>/sse=66 0f 38 3d</opc>
+            <opr>V W</opr>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>pmaxud</mnemonic>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>/sse=66 0f 38 3f</opc>
+            <opr>V W</opr>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>pmaxuw</mnemonic>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>/sse=66 0f 38 3e</opc>
+            <opr>V W</opr>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>pmulld</mnemonic>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>/sse=66 0f 38 40</opc>
+            <opr>V W</opr>
+            <class>sse4.1</class>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>phminposuw</mnemonic>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>/sse=66 0f 38 41</opc>
+            <opr>V W</opr>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>roundps</mnemonic>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>/sse=66 0f 3a 08</opc>
+            <opr>V W Ib</opr>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>roundpd</mnemonic>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>/sse=66 0f 3a 09</opc>
+            <opr>V W Ib</opr>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>roundss</mnemonic>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>/sse=66 0f 3a 0a</opc>
+            <opr>V W Ib</opr>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>roundsd</mnemonic>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>/sse=66 0f 3a 0b</opc>
+            <opr>V W Ib</opr>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>blendpd</mnemonic>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>/sse=66 0f 3a 0d</opc>
+            <opr>V W Ib</opr>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>pblendw</mnemonic>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>/sse=66 0f 3a 0e</opc>
+            <opr>V W Ib</opr>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>blendps</mnemonic>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>/sse=66 0f 3a 0c</opc>
+            <opr>V W Ib</opr>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>blendvpd</mnemonic>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>/sse=66 0f 38 15</opc>
+            <opr>V W</opr>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>blendvps</mnemonic>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>/sse=66 0f 38 14</opc>
+            <opr>V W</opr>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>dpps</mnemonic>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>/sse=66 0f 3a 40</opc>
+            <opr>V W Ib</opr>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>dppd</mnemonic>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>/sse=66 0f 3a 41</opc>
+            <opr>V W Ib</opr>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>mpsadbw</mnemonic>
+        <def>
+            <pfx>aso rexr rexx rexb</pfx>
+            <opc>/sse=66 0f 3a 42</opc>
+            <opr>V W Ib</opr>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>extractps</mnemonic>
+        <def>
+            <pfx>aso rexr rexw rexx rexb</pfx>
+            <opc>/sse=66 0f 3a 17</opc>
+            <opr>MdRy V Ib</opr>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>insertps</mnemonic>
+        <def>
+            <pfx>aso rexr rexw rexx rexb</pfx>
+            <opc>/sse=66 0f 3a 21</opc>
+            <opr>V Md Ib</opr>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>movntdqa</mnemonic>
+        <def>
+            <pfx>aso rexr rexw rexx rexb</pfx>
+            <opc>/sse=66 0f 38 2a</opc>
+            <opr>V Mo</opr>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>packusdw</mnemonic>
+        <def>
+            <pfx>aso rexr rexw rexx rexb</pfx>
+            <opc>/sse=66 0f 38 2b</opc>
+            <opr>V W</opr>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>pmovsxbw</mnemonic>
+        <def>
+            <pfx>aso rexr rexw rexx rexb</pfx>
+            <opc>/sse=66 0f 38 20</opc>
+            <opr>V MqU</opr>
+            <class>sse4.1</class>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>pmovsxbd</mnemonic>
+        <def>
+            <pfx>aso rexr rexw rexx rexb</pfx>
+            <opc>/sse=66 0f 38 21</opc>
+            <opr>V MdU</opr>
+            <class>sse4.1</class>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>pmovsxbq</mnemonic>
+        <def>
+            <pfx>aso rexr rexw rexx rexb</pfx>
+            <opc>/sse=66 0f 38 22</opc>
+            <opr>V MwU</opr>
+            <class>sse4.1</class>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>pmovsxwd</mnemonic>
+        <def>
+            <pfx>aso rexr rexw rexx rexb</pfx>
+            <opc>/sse=66 0f 38 23</opc>
+            <opr>V MqU</opr>
+            <class>sse4.1</class>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>pmovsxwq</mnemonic>
+        <def>
+            <pfx>aso rexr rexw rexx rexb</pfx>
+            <opc>/sse=66 0f 38 24</opc>
+            <opr>V MdU</opr>
+            <class>sse4.1</class>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>pmovsxdq</mnemonic>
+        <def>
+            <pfx>aso rexr rexw rexx rexb</pfx>
+            <opc>/sse=66 0f 38 25</opc>
+            <opr>V MqU</opr>
+            <class>sse4.1</class>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>pmovzxbw</mnemonic>
+        <def>
+            <pfx>aso rexr rexw rexx rexb</pfx>
+            <opc>/sse=66 0f 38 30</opc>
+            <opr>V MqU</opr>
+            <class>sse4.1</class>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>pmovzxbd</mnemonic>
+        <def>
+            <pfx>aso rexr rexw rexx rexb</pfx>
+            <opc>/sse=66 0f 38 31</opc>
+            <opr>V MdU</opr>
+            <class>sse4.1</class>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>pmovzxbq</mnemonic>
+        <def>
+            <pfx>aso rexr rexw rexx rexb</pfx>
+            <opc>/sse=66 0f 38 32</opc>
+            <opr>V MwU</opr>
+            <class>sse4.1</class>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>pmovzxwd</mnemonic>
+        <def>
+            <pfx>aso rexr rexw rexx rexb</pfx>
+            <opc>/sse=66 0f 38 33</opc>
+            <opr>V MqU</opr>
+            <class>sse4.1</class>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>pmovzxwq</mnemonic>
+        <def>
+            <pfx>aso rexr rexw rexx rexb</pfx>
+            <opc>/sse=66 0f 38 34</opc>
+            <opr>V MdU</opr>
+            <class>sse4.1</class>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>pmovzxdq</mnemonic>
+        <def>
+            <pfx>aso rexr rexw rexx rexb</pfx>
+            <opc>/sse=66 0f 38 35</opc>
+            <opr>V MqU</opr>
+            <class>sse4.1</class>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>pcmpeqq</mnemonic>
+        <def>
+            <pfx>aso rexr rexw rexx rexb</pfx>
+            <opc>/sse=66 0f 38 29</opc>
+            <opr>V W</opr>
+            <class>sse4.1</class>
+        </def>
+    </instruction>
+
+     <instruction>
+        <mnemonic>popcnt</mnemonic>
+        <def>
+            <pfx>aso oso rexr rexw rexx rexb</pfx>
+            <opc>/sse=f3 0f b8</opc>
+            <opr>Gv Ev</opr>
+        </def>
+        <class>sse4.2</class>
+    </instruction>
+
+    <instruction>
+        <mnemonic>ptest</mnemonic>
+        <def>
+            <pfx>aso rexr rexw rexx rexb</pfx>
+            <opc>/sse=66 0f 38 17</opc>
+            <opr>V W</opr>
+            <class>sse4.1</class>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>pcmpestri</mnemonic>
+        <def>
+            <pfx>aso rexr rexw rexx rexb</pfx>
+            <opc>/sse=66 0f 3a 61</opc>
+            <opr>V W Ib</opr>
+            <class>sse4.2</class>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>pcmpestrm</mnemonic>
+        <def>
+            <pfx>aso rexr rexw rexx rexb</pfx>
+            <opc>/sse=66 0f 3a 60</opc>
+            <opr>V W Ib</opr>
+            <class>sse4.2</class>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>pcmpgtq</mnemonic>
+        <def>
+            <pfx>aso rexr rexw rexx rexb</pfx>
+            <opc>/sse=66 0f 38 37</opc>
+            <opr>V W</opr>
+            <class>sse4.2</class>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>pcmpistri</mnemonic>
+        <def>
+            <pfx>aso rexr rexw rexx rexb</pfx>
+            <opc>/sse=66 0f 3a 63</opc>
+            <opr>V W Ib</opr>
+            <class>sse4.2</class>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>pcmpistrm</mnemonic>
+        <def>
+            <pfx>aso rexr rexw rexx rexb</pfx>
+            <opc>/sse=66 0f 3a 62</opc>
+            <opr>V W Ib</opr>
+            <class>sse4.2</class>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>movbe</mnemonic>
+        <def>
+            <pfx>aso oso rexr rexw rexx rexb</pfx>
+            <opc>0f 38 f0</opc>
+            <opr>Gv Mv</opr>
+            <class>sse3 atom</class>
+        </def>
+        <def>
+            <pfx>aso oso rexr rexw rexx rexb</pfx>
+            <opc>0f 38 f1</opc>
+            <opr>Mv Gv</opr>
+            <class>sse3 atom</class>
+        </def>
+    </instruction>
+
+    <instruction>
+        <mnemonic>crc32</mnemonic>
+        <def>
+            <pfx>aso oso rexr rexw rexx rexb</pfx>
+            <opc>/sse=f2 0f 38 f0</opc>
+            <opr>Gy Eb</opr>
+            <class>sse4.2</class>
+        </def>
+        <def>
+            <pfx>aso oso rexr rexw rexx rexb</pfx>
+            <opc>/sse=f2 0f 38 f1</opc>
+            <opr>Gy Ev</opr>
+            <class>sse4.2</class>
+        </def>
     </instruction>
 
     <instruction>