update

[l4.git] / l4 / pkg / uclibc / lib / contrib / uclibc / libc / sysdeps / linux / powerpc / bits / atomic.h

diff --git a/l4/pkg/uclibc/lib/contrib/uclibc/libc/sysdeps/linux/powerpc/bits/atomic.h b/l4/pkg/uclibc/lib/contrib/uclibc/libc/sysdeps/linux/powerpc/bits/atomic.h
index 1088d2f3ce9d8169fc3e1b0bd000ced846fe33a5..dba11367043080085b9cadd874207443b3c9e0f0 100644 (file)
--- a/l4/pkg/uclibc/lib/contrib/uclibc/libc/sysdeps/linux/powerpc/bits/atomic.h
+++ b/l4/pkg/uclibc/lib/contrib/uclibc/libc/sysdeps/linux/powerpc/bits/atomic.h
@@ -335,12 +335,28 @@
 # define __arch_atomic_decrement_if_positive_64(mem) \
     ({ abort (); (*mem)--; })
 
+#ifdef _ARCH_PWR4
+/*
+ * Newer powerpc64 processors support the new "light weight" sync (lwsync)
+ * So if the build is using -mcpu=[power4,power5,power5+,970] we can
+ * safely use lwsync.
+ */
+# define atomic_read_barrier() __asm__ ("lwsync" ::: "memory")
+/*
+ * "light weight" sync can also be used for the release barrier.
+ */
+# ifndef UP
+#  define __ARCH_REL_INSTR     "lwsync"
+# endif
+#else
+
 /*
  * Older powerpc32 processors don't support the new "light weight"
  * sync (lwsync).  So the only safe option is to use normal sync
  * for all powerpc32 applications.
  */
 # define atomic_read_barrier() __asm__ ("sync" ::: "memory")
+#endif
 
 #endif
 
@@ -387,6 +403,13 @@ typedef uintmax_t uatomic_max_t;
 # endif
 #endif
 
+#ifndef MUTEX_HINT_ACQ
+# define MUTEX_HINT_ACQ
+#endif
+#ifndef MUTEX_HINT_REL
+# define MUTEX_HINT_REL
+#endif
+
 #define atomic_full_barrier()  __asm__ ("sync" ::: "memory")
 #define atomic_write_barrier() __asm__ ("eieio" ::: "memory")