update

[l4.git] / kernel / fiasco / src / kern / arm / bsp / integrator / pic-arm-integrator.cpp

diff --git a/kernel/fiasco/src/kern/arm/bsp/integrator/pic-arm-integrator.cpp b/kernel/fiasco/src/kern/arm/bsp/integrator/pic-arm-integrator.cpp
index ce647a65957c153d74a92c675cc3159fd85729de..8eec233016dfa4a2bfe6bd020a25b6d83278a024 100644 (file)
--- a/kernel/fiasco/src/kern/arm/bsp/integrator/pic-arm-integrator.cpp
+++ b/kernel/fiasco/src/kern/arm/bsp/integrator/pic-arm-integrator.cpp
@@ -1,136 +1,77 @@
 // ---------------------------------------------------------------------
-INTERFACE [arm-integrator]:
+IMPLEMENTATION [arm && integrator]:
 
+#include "assert.h"
+#include "initcalls.h"
+#include "irq_chip_generic.h"
+#include "irq_mgr.h"
+#include "mmio_register_block.h"
 #include "kmem.h"
 
-class Irq_base;
-
-EXTENSION class Pic
+class Irq_chip_arm_integr : public Irq_chip_gen, Mmio_register_block
 {
-public:
-  enum
-  {
-    Multi_irq_pending = 1,
-    No_irq_pending = 0,
-  };
-
+private:
   enum
   {
-    IRQ_STATUS       = Kmem::Pic_map_base + 0x00,
-    IRQ_ENABLE_SET   = Kmem::Pic_map_base + 0x08,
-    IRQ_ENABLE_CLEAR = Kmem::Pic_map_base + 0x0c,
+    IRQ_STATUS       = 0x00,
+    IRQ_ENABLE_SET   = 0x08,
+    IRQ_ENABLE_CLEAR = 0x0c,
 
-    FIQ_ENABLE_CLEAR = Kmem::Pic_map_base + 0x2c,
+    FIQ_ENABLE_CLEAR = 0x2c,
 
     PIC_START = 0,
     PIC_END   = 31,
   };
-};
-
-// ---------------------------------------------------------------------
-IMPLEMENTATION [arm && integrator]:
-
-#include "boot_info.h"
-#include "config.h"
-#include "initcalls.h"
-#include "io.h"
-#include "irq.h"
-#include "irq_pin.h" 
-#include "irq_chip_generic.h"
-#include "vkey.h"
 
-class Integr_pin : public Irq_pin
-{
 public:
-  explicit Integr_pin(unsigned irq) { payload()[0] = irq; }
-  unsigned irq() const { return payload()[0]; }
+  int set_mode(Mword, Mode) { return 0; }
+  bool is_edge_triggered(Mword) const { return false; }
+  void set_cpu(Mword, Cpu_number) {}
+  void ack(Mword) { /* ack is empty */ }
 };
 
-class Irq_chip_arm_integr : public Irq_chip_gen
-{
-};
-
-PUBLIC
-void
-Irq_chip_arm_integr::setup(Irq_base *irq, unsigned irqnum)
-{
-  irq->pin()->replace<Integr_pin>(irqnum);
-}
-
 PUBLIC
-void
-Integr_pin::unbind_irq()
+Irq_chip_arm_integr::Irq_chip_arm_integr()
+: Irq_chip_gen(32),
+  Mmio_register_block(Kmem::mmio_remap(Mem_layout::Pic_phys_base))
 {
-  mask();
-  disable();
-  Irq_chip::hw_chip->free(Irq::self(this), irq());
-  replace<Sw_irq_pin>();
+  write<Mword>(0xffffffff, IRQ_ENABLE_CLEAR);
+  write<Mword>(0xffffffff, FIQ_ENABLE_CLEAR);
 }
 
 PUBLIC
 void
-Integr_pin::do_mask()
+Irq_chip_arm_integr::mask(Mword irq)
 {
-  assert (cpu_lock.test());
-  Io::write(1 << (irq() - Pic::PIC_START), Pic::IRQ_ENABLE_CLEAR);
+  assert(cpu_lock.test());
+  write<Mword>(1 << (irq - PIC_START), IRQ_ENABLE_CLEAR);
 }
 
 PUBLIC
 void
-Integr_pin::do_mask_and_ack()
+Irq_chip_arm_integr::mask_and_ack(Mword irq)
 {
-  assert (cpu_lock.test());
-  __mask();
-  Io::write(1 << (irq() - Pic::PIC_START), Pic::IRQ_ENABLE_CLEAR);
+  assert(cpu_lock.test());
+  write<Mword>(1 << (irq - PIC_START), IRQ_ENABLE_CLEAR);
   // ack is empty
 }
 
 PUBLIC
 void
-Integr_pin::ack()
-{
-  // ack is empty
-}
-
-PUBLIC
-void
-Integr_pin::do_unmask()
-{
-  assert (cpu_lock.test());
-  Io::write(1 << (irq() - Pic::PIC_START), Pic::IRQ_ENABLE_SET);
-}
-
-PUBLIC
-void
-Integr_pin::do_set_mode(unsigned)
-{
-}
-
-
-PUBLIC
-bool
-Integr_pin::check_debug_irq()
-{
-  return !Vkey::check_(irq());
-}
-
-PUBLIC
-void
-Integr_pin::set_cpu(unsigned)
+Irq_chip_arm_integr::unmask(Mword irq)
 {
+  assert(cpu_lock.test());
+  write<Mword>(1 << (irq - PIC_START), IRQ_ENABLE_SET);
 }
 
+static Static_object<Irq_mgr_single_chip<Irq_chip_arm_integr> > mgr;
 
 IMPLEMENT FIASCO_INIT
 void Pic::init()
 {
-  static Irq_chip_arm_integr _ia;
-  Irq_chip::hw_chip = &_ia;
-  Io::write(0xffffffff, IRQ_ENABLE_CLEAR);
-  Io::write(0xffffffff, FIQ_ENABLE_CLEAR);
+  Irq_mgr::mgr = mgr.construct();
 }
 
-
 IMPLEMENT inline
 Pic::Status Pic::disable_all_save()
 {
@@ -139,22 +80,29 @@ Pic::Status Pic::disable_all_save()
 }
 
 IMPLEMENT inline
-void Pic::restore_all( Status /*s*/ )
-{
-}
+void Pic::restore_all(Status)
+{}
 
-PUBLIC static inline NEEDS["io.h"]
-Unsigned32 Pic::pending()
+PUBLIC inline
+Unsigned32 Irq_chip_arm_integr::pending()
 {
-  return Io::read<Mword>(IRQ_STATUS);
+  return read<Mword>(IRQ_STATUS);
 }
 
-PUBLIC static inline
-Mword Pic::is_pending(Mword &irqs, Mword irq)
+extern "C"
+void irq_handler()
+{ mgr->c.handle_multi_pending<Irq_chip_arm_integr>(0); }
+
+// ------------------------------------------------------------------------
+IMPLEMENTATION [arm && integrator && arm_em_tz]:
+
+#include <cstdio>
+
+PUBLIC static
+void
+Pic::set_pending_irq(unsigned group32num, Unsigned32 val)
 {
-  Mword ret = irqs & (1 << irq);
-  irqs &= ~(1 << irq);
-  return ret;
+  printf("%s(%d, %x): Not implemented\n", __func__, group32num, val);
 }
 
 //---------------------------------------------------------------------------
@@ -162,6 +110,5 @@ IMPLEMENTATION [debug && integrator]:
 
 PUBLIC
 char const *
-Integr_pin::pin_type() const
-{ return "HW Integrator IRQ"; }
-
+Irq_chip_arm_integr::chip_type() const
+{ return "Integrator"; }