Update

[l4.git] / kernel / fiasco / src / kern / ia32 / 64 / entry-native.S

diff --git a/kernel/fiasco/src/kern/ia32/64/entry-native.S b/kernel/fiasco/src/kern/ia32/64/entry-native.S
index 3a5c4b71fda477890ee51bac0f288cef89c206c0..a989c86c8d19692b0c673bdb7bbc809cd7e14da9 100644 (file)
--- a/kernel/fiasco/src/kern/ia32/64/entry-native.S
+++ b/kernel/fiasco/src/kern/ia32/64/entry-native.S
@@ -121,91 +121,75 @@ entry_int_apic_ignore:
        .global entry_sys_fast_ipc_log
 entry_syscall_log:
 entry_sys_fast_ipc_log:
-       mov     %rsp,%r15               /* save user rsp */
-       mov     syscall_rsp0, %rsp      /* get address of kernel stack */
-       pop     %rsp                    /* set kernel stack */                  
-
-       push    $(GDT_DATA_USER | SEL_PL_U)     /* fake user ss */
-       push    %r15                            /* save user rsp */
        push    %r11                            /* save user rflags */
-       push    $(GDT_CODE_USER | SEL_PL_U)     /* fake user cs */
+       push    $(GDT_CODE_USER | SEL_PL_U | 0x80)      /* fake user cs */
        push    %rcx                            /* save user rip */
-       
-       cld
+       sub     $16, %rsp
        SAVE_STATE_SYSEXIT
        ESP_TO_TCB_AT %rbx
+       testl   $VAL__Thread_alien_or_vcpu_user, OFS__THREAD__STATE (%rbx)
+       jnz     alien_sys_fast_ipc_log
        RESET_THREAD_CANCEL_AT %rbx
 
        call    *syscall_table
 in_slow_ipc5:
        RESTORE_STATE_SYSEXIT
-       
-       pop     %rcx                            /* load user rsp */
-       add     $8,%rsp                         /* through away cs */
-       pop     %r11                            /* load user rflags */
-       pop     %r15                            /* load user rsp */
-       add     $8,%rsp                         /* through away ss */
-       
-       mov     %r15,%rsp                       /* restore user rsp */
+       mov     16(%rsp), %rcx /* load user rip */
+        /* make RIP canonical, workaround for intel IA32e flaw */
+        shl     $16, %rcx
+        sar     $16, %rcx
+       mov     32(%rsp), %r11                          /* load user rflags */
+       mov     40(%rsp), %rsp                          /* load user rsp */
        sysretq
 
+alien_sys_fast_ipc_log:
+       ALIEN_SYSCALL syscall="call *syscall_table"
+
+
        .globl  in_slow_ipc5
 
 #endif // CONFIG_JDB
 
-
-#if (defined (CONFIG_JDB_LOGGING) || !defined(CONFIG_ASSEMBLER_IPC_SHORTCUT))
        .p2align(4)
        .global entry_syscall_c
        .global entry_sys_fast_ipc_c
 entry_syscall_c:
 entry_sys_fast_ipc_c:
-       mov     %rsp,%r15               /* save user rsp */
-       mov     syscall_rsp0,%rsp       /* get address of kernel stack */
-       pop     %rsp                    /* set kernel stack */
-
-       push    $(GDT_DATA_USER | SEL_PL_U)     /* fake user ss */
-       push    %r15                            /* save user rsp */
        push    %r11                            /* save user rflags */
-       push    $(GDT_CODE_USER | SEL_PL_U)     /* fake user cs */
+       push    $(GDT_CODE_USER | SEL_PL_U | 0x80)      /* fake user cs */
        push    %rcx                            /* save user rip */
-
-       cld
+       sub     $16, %rsp
        SAVE_STATE_SYSEXIT
        ESP_TO_TCB_AT %rbx
+       testl   $VAL__Thread_alien_or_vcpu_user, OFS__THREAD__STATE (%rbx)
+       jnz     alien_sys_fast_ipc_c
        RESET_THREAD_CANCEL_AT %rbx
        
        call    sys_ipc_wrapper
 in_sc_ipc2:
+       .globl  fast_ret_from_irq
+fast_ret_from_irq:
        RESTORE_STATE_SYSEXIT
        
-       pop     %rcx                            /* load user rsp */
-       add     $8,%rsp                         /* through away cs */
-       pop     %r11                            /* load user rflags */
-       pop     %r15                            /* load user rsp */
-       add     $8,%rsp                         /* through away ss */
-       
-       mov     %r15,%rsp                       /* restore user rsp */
+       mov     16(%rsp), %rcx /* load user rip */
+        /* make RIP canonical, workaround for intel IA32e flaw */
+        shl     $16, %rcx
+        sar     $16, %rcx
+       mov     32(%rsp), %r11                          /* load user rflags */
+       mov     40(%rsp), %rsp                          /* load user rsp */
        sysretq
-       
-       .globl  in_sc_ipc2
-#endif
 
-       .bss
-       .align  8
-       .globl syscall_rsp0
-syscall_rsp0:
-       .space  8                               /* address of esp0 in tss */
-       .text
+alien_sys_fast_ipc_c:
+       ALIEN_SYSCALL syscall="call sys_ipc_wrapper"
+
+
+       .globl  in_sc_ipc2
 
        .p2align(4)
-       .globl  leave_from_sysenter_by_iret
-leave_from_sysenter_by_iret:
-       ESP_TO_TCB_AT %rbx
-       RESET_THREAD_IPC_MASK_AT %rbx
-       RESTORE_STATE
-       pop     %rax
-       orq     $EFLAGS_IF, 8(%rsp)
+       .globl  leave_from_syscall_by_iret
+leave_from_syscall_by_iret:
+       RESTORE_STATE_SYSEXIT
+       add $16, %rsp
        iretq
 
        .bss