update

[l4.git] / kernel / fiasco / src / kern / arm / bsp / realview / mem_layout-arm-realview.cpp

diff --git a/kernel/fiasco/src/kern/arm/bsp/realview/mem_layout-arm-realview.cpp b/kernel/fiasco/src/kern/arm/bsp/realview/mem_layout-arm-realview.cpp
index 93fac475110ec75ee927979f6e4d87aeedbe75c5..41f2896762fa2f1badeb41b519e1eeecf04b01bb 100644 (file)
--- a/kernel/fiasco/src/kern/arm/bsp/realview/mem_layout-arm-realview.cpp
+++ b/kernel/fiasco/src/kern/arm/bsp/realview/mem_layout-arm-realview.cpp
@@ -1,26 +1,41 @@
-INTERFACE [arm && realview]: //---------------------------------------------
+INTERFACE [arm && realview]: // -------------------------------------------
 
 #include "globalconfig.h"
 
 EXTENSION class Mem_layout
 {
 public:
-  enum Virt_layout_realview {
-    Devices0_map_base      = Registers_map_start,
-      System_regs_map_base = Devices0_map_base,
-      System_ctrl_map_base = Devices0_map_base + 0x00001000,
-      Uart0_map_base       = Devices0_map_base + 0x00009000,
-      Uart1_map_base       = Devices0_map_base + 0x0000a000,
-      Uart2_map_base       = Devices0_map_base + 0x0000b000,
-      Uart3_map_base       = Devices0_map_base + 0x0000c000,
-      Timer0_map_base      = Devices0_map_base + 0x00011000,
-      Timer1_map_base      = Devices0_map_base + 0x00011020,
-      Timer2_map_base      = Devices0_map_base + 0x00012000,
-      Timer3_map_base      = Devices0_map_base + 0x00012020,
-      Uart_base            = Uart0_map_base,
+  enum Phys_layout_realview_all {
+    Sdram_phys_base      = CONFIG_PF_REALVIEW_RAM_PHYS_BASE,
+    Flush_area_phys_base = 0xe0000000,
 
+    Devices0_map_base      = Registers_map_start,
     Devices1_map_base      = Registers_map_start + 0x00100000,
     Devices2_map_base      = Registers_map_start + 0x00200000,
+
+  };
+};
+
+// ------------------------------------------------------------------------
+INTERFACE [arm && realview && (realview_eb || realview_pb11mp || realview_pbx || realview_vexpress)]:
+
+#include "globalconfig.h"
+
+EXTENSION class Mem_layout
+{
+public:
+  enum Virt_layout_realview {
+    System_regs_map_base = Devices0_map_base,
+    System_ctrl_map_base = Devices0_map_base + 0x00001000,
+    Uart0_map_base       = Devices0_map_base + 0x00009000,
+    Uart1_map_base       = Devices0_map_base + 0x0000a000,
+    Uart2_map_base       = Devices0_map_base + 0x0000b000,
+    Uart3_map_base       = Devices0_map_base + 0x0000c000,
+    Timer0_map_base      = Devices0_map_base + 0x00011000,
+    Timer1_map_base      = Devices0_map_base + 0x00011020,
+    Timer2_map_base      = Devices0_map_base + 0x00012000,
+    Timer3_map_base      = Devices0_map_base + 0x00012020,
+    Uart_base            = Uart0_map_base,
   };
 
   enum Phys_layout_realview {
@@ -30,9 +45,6 @@ public:
     Uart0_phys_base      = Devices0_phys_base + 0x00009000,
     Timer0_1_phys_base   = Devices0_phys_base + 0x00011000,
     Timer2_3_phys_base   = Devices0_phys_base + 0x00012000,
-    Sdram_phys_base      = CONFIG_PF_REALVIEW_RAM_PHYS_BASE,
-
-    Flush_area_phys_base = 0xe0000000,
   };
 };
 
@@ -149,3 +161,25 @@ public:
     Gic3_dist_phys_base  = Gic3_cpu_phys_base + 0x00001000,
   };
 };
+
+// ------------------------------------------------------------------------
+INTERFACE [arm && realview && realview_vexpress]:
+
+EXTENSION class Mem_layout
+{
+public:
+  enum Virt_layout_realview_vexpress {
+    Mp_scu_map_base      = Devices1_map_base,
+    Gic_cpu_map_base     = Devices1_map_base + 0x00000100,
+    Gic_dist_map_base    = Devices1_map_base + 0x00001000,
+    L220_map_base        = Devices1_map_base + 0x00002000,
+  };
+
+  enum Phys_layout_realview_vexpress {
+    Devices1_phys_base   = 0x1e000000,
+    Mp_scu_phys_base     = 0x1e000000,
+    Gic_cpu_phys_base    = Mp_scu_phys_base + 0x00000100,
+    Gic_dist_phys_base   = Mp_scu_phys_base + 0x00001000,
+    L220_phys_base       = Mp_scu_phys_base + 0x00002000,
+  };
+};