update

[l4.git] / kernel / fiasco / src / kern / arm / bsp / imx / kernel_uart-arm-imx.cpp

diff --git a/kernel/fiasco/src/kern/arm/bsp/imx/kernel_uart-arm-imx.cpp b/kernel/fiasco/src/kern/arm/bsp/imx/kernel_uart-arm-imx.cpp
index 9ea1ffd74d81fb50975d8099d5634e2d5cc1aaf2..53f22ba6ec40692b7f063df7df1a32df029bcef6 100644 (file)
--- a/kernel/fiasco/src/kern/arm/bsp/imx/kernel_uart-arm-imx.cpp
+++ b/kernel/fiasco/src/kern/arm/bsp/imx/kernel_uart-arm-imx.cpp
@@ -1,3 +1,8 @@
+INTERFACE:
+
+// On ARM the MMIO for the uart is accessible before the MMU is fully up
+EXTENSION class Kernel_uart { enum { Bsp_init_mode = Init_before_mmu }; };
+
 IMPLEMENTATION [arm && imx21 && serial]:
 
 #include "mem_layout.h"
@@ -9,6 +14,20 @@ bool Kernel_uart::startup(unsigned port, int /*irq*/)
   return Uart::startup(Mem_layout::Uart_base, 20);
 }
 
+IMPLEMENTATION [arm && imx35 && serial]:
+
+#include "mem_layout.h"
+
+IMPLEMENT
+bool Kernel_uart::startup(unsigned port, int /*irq*/)
+{
+  if(port!=3) return false;
+  // uart-1: 45
+  // uart-2: 32
+  // uart-3: 18
+  return Uart::startup(Mem_layout::Uart_base, 45);
+}
+
 IMPLEMENTATION [arm && imx51 && serial]:
 
 #include "mem_layout.h"