Update

[l4.git] / kernel / fiasco / src / kern / irq_mgr.cpp

diff --git a/kernel/fiasco/src/kern/irq_mgr.cpp b/kernel/fiasco/src/kern/irq_mgr.cpp
index 52fd6ce80541d616addd8a55fcfcd1c9beddc43b..f8a054b540171bada6ebfc1e2f329457585563f9 100644 (file)
--- a/kernel/fiasco/src/kern/irq_mgr.cpp
+++ b/kernel/fiasco/src/kern/irq_mgr.cpp
@@ -2,10 +2,11 @@ INTERFACE:
 
 #include "types.h"
 #include "irq_chip.h"
+#include "l4_types.h"
 #include <cxx/type_traits>
 
 /**
- * Interface used to manage harware IRQs on a platform.
+ * Interface used to manage hardware IRQs on a platform.
  *
  * The main purpose of this interface is to allow an
  * abstract mapping of global IRQ numbers to a chip
@@ -15,6 +16,12 @@ INTERFACE:
 class Irq_mgr
 {
 public:
+  struct Msi_info
+  {
+    Unsigned64 addr;
+    Unsigned32 data;
+  };
+
   /**
    * Chip and pin for an IRQ pin.
    */
@@ -52,7 +59,8 @@ public:
   /** Get the message to use for a given MSI.
    * \pre The IRQ pin needs to be already allocated before using this function.
    */
-  virtual Mword msg(Mword irqnum) const { (void)irqnum; return 0; }
+  virtual int msg(Mword irqnum, Unsigned64, Msi_info *) const
+  { (void)irqnum; return -L4_err::EPerm; }
 
   virtual void set_cpu(Mword irqnum, Cpu_number cpu) const;
 
@@ -89,13 +97,18 @@ IMPLEMENT inline Irq_mgr::~Irq_mgr() {}
 
 PUBLIC inline
 bool
-Irq_mgr::alloc(Irq_base *irq, Mword pin)
+Irq_mgr::alloc(Irq_base *irq, Mword global_irq)
 {
-  Irq i = chip(pin);
+  Irq i = chip(global_irq);
   if (!i.chip)
     return false;
 
-  return i.chip->alloc(irq, i.pin);
+  if (i.chip->alloc(irq, i.pin))
+    {
+      i.chip->set_cpu(i.pin, Cpu_number::boot_cpu());
+      return true;
+    }
+  return false;
 }
 
 PUBLIC inline
@@ -124,6 +137,9 @@ IMPLEMENT
 void
 Irq_mgr::set_cpu(Mword irqnum, Cpu_number cpu) const
 {
-  WARNX(Warning, "IRQ%ld: ignoring CPU setting (%d).\n", irqnum,
-        cxx::int_value<Cpu_number>(cpu));
+  Irq i = chip(irqnum);
+  if (!i.chip)
+    return;
+
+  return i.chip->set_cpu(i.pin, cpu);
 }