Update

[l4.git] / kernel / fiasco / src / kern / arm / bsp / imx / pic-arm-imx.cpp

diff --git a/kernel/fiasco/src/kern/arm/bsp/imx/pic-arm-imx.cpp b/kernel/fiasco/src/kern/arm/bsp/imx/pic-arm-imx.cpp
index d7341cdbf7036b2be3ddfee4d3309b0c210536b2..1932e7b953fad58f98657afd172c44767a0c5e85 100644 (file)
--- a/kernel/fiasco/src/kern/arm/bsp/imx/pic-arm-imx.cpp
+++ b/kernel/fiasco/src/kern/arm/bsp/imx/pic-arm-imx.cpp
@@ -1,6 +1,7 @@
 // ---------------------------------------------------------------------
 INTERFACE [arm && (imx21 || imx35)]:
 
+#include "initcalls.h"
 #include "kmem.h"
 
 class Irq_base;
@@ -13,6 +14,7 @@ public:
 // ---------------------------------------------------------------------
 IMPLEMENTATION [arm && (imx21 || imx35)]:
 
+#include <cassert>
 #include "io.h"
 #include "irq_chip_generic.h"
 #include "irq_mgr.h"
@@ -51,7 +53,8 @@ private:
     INTCTL_NIDIS = 1 << 22, // Normal Interrupt Disable
   };
 public:
-  unsigned set_mode(Mword, unsigned) { return Irq_base::Trigger_level; }
+  int set_mode(Mword, Mode) { return 0; }
+  bool is_edge_triggered(Mword) const { return false; }
   void set_cpu(Mword, Cpu_number) {}
   void ack(Mword) { /* ack is empty */ }
 };
@@ -100,23 +103,12 @@ Irq_chip_arm_imx::Irq_chip_arm_imx()
 static Static_object<Irq_mgr_single_chip<Irq_chip_arm_imx> > mgr;
 
 
-IMPLEMENT FIASCO_INIT
+PUBLIC static FIASCO_INIT
 void Pic::init()
 {
   Irq_mgr::mgr = mgr.construct();
 }
 
-IMPLEMENT inline
-Pic::Status Pic::disable_all_save()
-{
-  Status s = 0;
-  return s;
-}
-
-IMPLEMENT inline
-void Pic::restore_all(Status)
-{}
-
 PUBLIC inline
 Unsigned32 Irq_chip_arm_imx::pending()
 {