3 mainmenu "Fiasco configuration"
7 option env="KERNELVERSION"
11 option env="INCLUDE_PPC32"
13 Use "INCLUDE_PPC32=y make config" to include ppc32 options.
17 option env="INCLUDE_SPARC"
19 Use "INCLUDE_SPARC=y make config" to include sparc options.
21 menu "Target configuration"
28 bool "Intel IA-32 processor family"
31 bool "AMD64 processor family"
35 bool "ARM processor family"
38 bool "PowerPC 32 processor family (Caution: INCOMPLETE!)"
39 depends on EXPERIMENTAL && INCLUDE_PPC32
41 PPC32 testing version, mainly for MPC5200 (603e). Currently,
42 there is no support whatsoever.
47 bool "SPARC v8 processor family (Caution: EXPERIMENTAL)"
48 depends on EXPERIMENTAL && INCLUDE_SPARC
50 SPARC v8 is supposed to run on the LEON3 platform.
51 It is unsupported at the moment.
62 default PF_INTEGRATOR if ARM
64 default PF_PC if AMD64
65 default PF_MP52CXX if PPC32
66 default PF_LEON3 if SPARC
70 depends on IA32 || AMD64
73 bool "Linux Usermode Platform"
86 config PF_ARM_MP_CAPABLE
88 default y if ARM_MPCORE || ARM_CORTEX_A9
90 config CAN_ARM_CPU_SA1100
93 config CAN_ARM_CPU_XSCALE
96 config CAN_ARM_CPU_920T
99 config CAN_ARM_CPU_926
102 config CAN_ARM_CPU_1136
105 config CAN_ARM_CPU_1176
108 config CAN_ARM_CPU_MPCORE
111 config CAN_ARM_CPU_CORTEX_A8
114 config CAN_ARM_CPU_CORTEX_A9
117 config CAN_ARM_CACHE_L2CXX0
122 default IA32_686 if IA32
123 default ARM_926 if ARM
124 default AMD64_K8 if AMD64
125 default PPC32_603e if PPC32
126 default LEON3 if SPARC
133 bool "Intel StrongARM"
137 bool "ARM 920T Processor"
138 depends on PF_S3C2410
141 bool "ARM 926 Processor"
142 depends on CAN_ARM_CPU_926
146 depends on CAN_ARM_CPU_1136
150 depends on CAN_ARM_CPU_1176
153 bool "ARM MPCore CPU"
154 depends on CAN_ARM_CPU_MPCORE
157 bool "ARM Cortex-A8 CPU"
158 depends on CAN_ARM_CPU_CORTEX_A8
161 bool "ARM Cortex-A9 CPU"
162 depends on CAN_ARM_CPU_CORTEX_A9
168 Choose this if you have an Intel 80486 or equivalent CPU (i486).
171 bool "Intel Pentium / AMD K5"
174 Choose this if you have an Intel Pentium or compatible i586 CPU.
177 bool "Intel Pentium Pro"
180 Choose this if you have an Intel Pentium Pro or compatible i686 CPU.
183 bool "Intel Pentium II / Celeron II"
186 Choose this if you have an Intel Pentium II or Pentium II based Celeron.
189 bool "Intel Pentium III / Celeron III"
192 Choose this if you have an Intel Pentium III or Pentium III based Celeron.
195 bool "Intel Pentium 4 / Celeron 4"
198 Choose this if you have an Intel Pentium 4 or Pentium 4 based Celeron.
201 bool "Intel Pentium M"
204 Choose this if you have an Intel Pentium M.
210 Choose this if you have an Intel Core 2.
216 Choose this if you have an Intel Atom.
219 bool "AMD K6 / K6-II / K6-III"
222 Choose this if you have an AMD K6 CPU.
225 bool "AMD Athlon / Duron"
228 Choose this if you have an AMD Athlon or Duron CPU.
231 bool "AMD Opteron / Athlon64"
234 Choose this if you have an AMD Opteron or Athlon64 CPU.
237 bool "AMD Barcelona (K10)"
240 Choose this if you have an AMD Barcelona based CPU.
244 bool "AMD Opteron / Athlon64"
247 Choose this if you have an AMD Opteron or Athlon64 CPU.
253 Choose this if you have an Intel Core 2.
259 Choose this if you have an Intel Atom.
262 bool "AMD Barcelona (K10)"
265 Choose this if you have an AMD Barcelona based CPU.
272 Choose this if you have an PowerPC 603e CPU.
275 bool "Gaisler SPARC LEON3"
278 Choose this if you have a LEON3 CPU.
284 bool "Enable CPU virtualization (SVM and VT)"
287 Support virtualization extensions that comes with x86 CPUs,
288 including nested paging. This feature allows you to run a virtual
289 machine monitor (VMM) on top of Fiasco.
291 config ARM_ALIGNMENT_CHECK
292 bool "Enable alignment check"
295 Enable if you want to have alignment check enabled.
298 bool "Enable ARM TrustZone support"
299 depends on (ARM_1176 || ARM_CORTEX_A8 || ARM_CORTEX_A9) && EXPERIMENTAL
301 Support ARM TrustZone security extension.
303 config ARM_CA9_ENABLE_SWP
304 bool "Enable the deprecated 'swp' instruction"
305 depends on ARM_CORTEX_A9
307 Enabling this option enables the deprecated 'swp' instruction.
310 config ARM_CACHE_L2CXX0
311 bool "Enable L2 Cache"
313 depends on CAN_ARM_CACHE_L2CXX0
315 Enable L2 cache functionality.
318 prompt "Timer tick source"
319 depends on PF_PC || PF_UX
323 bool "Use PIT for scheduling"
324 depends on (PF_PC || PF_UX) && !MP
326 Normally, Fiasco uses the RTC at IRQ8 for scheduling. This can be
327 disadvantageous in certain circumstances, e.g. VMWare doesn't seem
328 to emulate the RTC good enough so that not enough timer interrupts
329 are produced. The PIT mode (using IRQ0) seems to work better in
330 this case. It is generally safe to use this option, so if you are
333 Consider that the interrupt priorities change: Using RTC, IRQ8 has
334 the highest priority. Using PIT, IRQ0 has the highest priority.
335 The only case where PIT scheduling does not work is with
336 profiling. If profiling is enabled the PIT is used for generating
337 the profiling interrupts.
340 bool "Use RTC for scheduling"
341 depends on PF_PC && !MP
343 'Yes' is the standard for this option. If this option is set
344 Fiasco uses the RTC on IRQ 8 for scheduling. This can be
345 disadvantageous in certain circumstances, e.g. VMWare doesn't seem
346 to emulate the RTC good enough so that not enough timer interrupts
347 are produced. The PIT (8254) mode (say 'no' here), seems to work
348 better in this case. It is generally safe to use the PIT, so if
349 you are unsure, say 'no'.
350 Consider that the interrupt priorities change: Using RTC, IRQ8 has
351 the highest priority. Using PIT, IRQ0 has the highest priority.
352 The only case where PIT scheduling does not work is with
353 profiling. If profiling is enabled the PIT is used for generating
354 the profiling interrupts and the RTC must be used for scheduling.
355 In the case where profiling shall be used within VMWare the
356 SLOW_RTC option must be set, so that the timer resolution of
357 Fiasco is reduced to 100Hz.
360 bool "Use APIC timer for scheduling"
363 Use the Local APIC for scheduling.
366 bool "Use HPET timer for scheduling (EXPERIMENTAL)"
367 depends on PF_PC && !MP && EXPERIMENTAL
369 Use the HPET timer for scheduling.
373 config WORKAROUND_AMD_FPU_LEAK
374 bool "Enables workaroud for AMD FPU security leak"
377 If you use Fiasco for high assurance, high security and use AMD
378 CPUs you should enable this option. In any other case it is no
382 bool "Compile with regparm=3"
384 depends on IA32 && PF_PC
386 Compile Fiasco with -mregparm=3. This uses a different ABI and
387 passes the first three arguments of a function call in registers.
390 bool "Enable FPU co-processor"
393 Enable this if your platform has hardware floating point support.
395 config ARM_1176_CACHE_ALIAS_FIX
396 bool "Use cache restriction to supress aliasing issue on ARM1176"
399 The ARM1176 processor might have a memory aliasing problem when
400 using cache sizes of more than 16kB cache. Enabling this option
401 enables the workaround of reducing the cache size to 16kB.
403 config ARM_CPU_ERRATA
404 bool "Enable CPU errata workarounds"
405 depends on ARM && !ARM_TZ
409 menu "Kernel options"
412 bool "Enable multi processor support"
413 depends on (PF_PC || PF_ARM_MP_CAPABLE || (PF_UX && EXPERIMENTAL))
415 Enable support for machines with multiple processors.
418 int "Maximal supported number of CPUs"
423 The maximum number of CPUs the kernel supports.
425 #config ASSEMBLER_IPC_SHORTCUT
426 # bool "Assembler IPC shortcut"
428 # depends on (PF_PC || PF_UX) && !MP
430 # Use the assembler IPC shortcut to get even better short IPC
431 # performance in the common case.
434 bool #"TCB size of 4k"
437 Use this option to use 4K kernel stacks. Only disable this option
438 when you know what you're doing.
441 bool "Use RTC with 100 ticks per second"
444 This option should be enabled if you use VMWare and no PIT
445 scheduling. The timer resolution is lowered to 100 ticks per
449 bool "Use scheduling timer in one-shot mode"
450 depends on SCHED_APIC && SYNC_TSC
452 More costly than periodic but more fine-granular scheduling
453 possible. EXPERIMENTAL!
456 bool "Use time-stamp counter for KIP and scheduling accounting"
457 depends on PF_PC && IA32
459 Synchronize the internal kernel clock with the CPU time stamp
462 config FINE_GRAINED_CPUTIME
463 bool "Fine-grained CPU time"
465 Measure CPU time consumed by a thread from switching to the thread
466 until switching to another thread. Induces an overhead during each
467 thread switch, so only activate it for debugging.
470 bool "Graphical console (requires SDL library!)"
473 Fiasco-UX can supply a graphical console for the L4 program it is
474 running. Enabling this option will build the additional program
475 but needs the SDL library including development header files
479 bool "Network support"
482 Enabling this option makes Fiasco-UX provide network support for
489 config SCHED_FIXED_PRIO
490 bool "Fixed priority scheduler"
492 Choose this for the standard fixed priority scheduler with
496 bool "Weighted fair queueing scheduler"
497 depends on EXPERIMENTAL
499 Choose this scheduler for a weighted fair queueing scheduler
500 running with dynamic priorities.
503 bool "Combined fixed priority RT and WFQ scheduler"
504 depends on EXPERIMENTAL
506 Combination of Fixed priority and weighted fair queueing
511 config DISABLE_VIRT_OBJ_SPACE
512 bool "No virtually mapped array for cap tables"
513 depends on (PF_PC || ARM) && EXPERIMENTAL
516 endmenu # kernel options
521 bool "Generate inline code"
524 Inlining specifies that it is desirable for the compiler to
525 integrate functions declared 'inline' into the calling routine.
526 This usually leads to faster code, so unless you want to debug the
527 kernel you should say 'Y' here.
530 bool "Do not compile assertions"
532 Don't insert assertions into the code. Should be enabled for
533 kernels which are used for measurements.
536 bool "Compile without frame pointer"
539 Enabling this option optimizes for speed but makes debugging more
543 bool "Measure stack depth of threads"
545 When this option is enabled, each thread control block is marked
546 with magic numbers while creation. The function ``show thread
547 lists'' scans the TCB for these magic numbers and shows the
548 currently used depth of each thread.
550 config LIST_ALLOC_SANITY
551 bool "Sanity checks in low level allocator"
553 When this option is enabled the low level memory allocator does
554 extra sanity checks on its data structures before and after every
555 operation. This can halp detect flaws like double frees or memory
556 corruption by other means.
558 These tests are very expensive so only enable them if a problem
559 with memory allocation is expected.
561 config BEFORE_IRET_SANITY
562 bool "Sanity checks at syscall entry/exit"
565 Perform the following additional sanity checks before returning to
567 - Does the thread hold any locks?
568 - Is the thread locked by any other thread?
569 - Does the thread have the right state:
570 * Thread_ready must be set.
571 * Thread_cancel and Thread_fpu_owner might be set.
572 * Any other state bit must not be set.
573 Don't use Fiasco compiled with this option for performance analysis!
576 bool "Compile with gstabs+ debugging information"
579 Enabling this option includes the debugging information using the
580 older gstabs+ format into the kernel image. This is necessary to
581 access line number information of the kernel from JDB.
584 bool "Display IRQ activity on VGA screen"
587 Display IRQ activity on VGA screen.
590 bool "Enable Watchdog support"
594 Enable support for watchdog using the builtin Local APIC and a
595 performance counter. The watchdog can be enabled using the
596 -watchdog command line option.
599 bool "Support for debugging over serial line"
600 depends on PF_PC || ARM || PPC32 || SPARC
603 This option enables support for input/output over serial interface.
606 bool "JDB kernel debugger"
609 The powerful Fiasco kernel debugger.
614 bool "JDB extended logging"
616 There are two classes of logging events: Basic events don't
617 consume any time if they are disabled (ipc, ipc result,
618 pagefaults, unmap). Extended logging events add an additional
619 overhead of most probably less than 10 cycles if they are
620 disabled. These events can be activated/deactivated by the 'O'
623 Should be disabled for kernels which are used for measurements.
626 bool "JDB disassembler"
630 Add support for disassembly. Increases memory foot-print, only
634 bool "GZIP compressed dumps"
638 Add supprt for gzip compressed dumps of the trace buffer.
639 Increases memory foot-print, only enabled when needed.
641 config JDB_ACCOUNTING
642 bool "JDB accounting"
645 Enable accounting information about IPCs, context switches, page
646 faults, and other events. The counters are accessible from
647 userland through the tbuf status page.
649 Should be disabled for kernels which are used for measurements.
652 bool "Miscellaneous JDB modules"
653 depends on PF_UX || PF_PC
658 config VMEM_ALLOC_TEST
659 bool "Run test for Vmem_alloc allocator"
662 config DEBUG_KERNEL_PAGE_FAULTS
663 bool "Debugging of kernel page-faults"
666 This option enables logging of kernel page-faults (aka page faults
667 from kernel mode). The page faults are logged to the normal
668 console in the format *KP[pfa, error_code, ip].
670 config POWERSAVE_GETCHAR
671 bool "Save power in getchar()"
675 This option uses a processor HALT in getchar() to save power and
676 prevent some P4 processors from being overheated. This option
677 requires a working timer IRQ to wakeup getchar periodically.
684 bool "Do not show show any kernel warning"
687 bool "Show messages of warning level"
690 bool "Show all kernel warnings"
692 endchoice # warn levels
702 Use this option to override the default C compiler (gcc).
705 string "C++ compiler"
708 Use this option to override the default C++ compiler (g++).
711 string "C host compiler"
714 Use this option to override the default C host compiler (gcc).
717 string "C++ host compiler"
720 Use this option to override the default C++ host compiler (g++).
722 config MAINTAINER_MODE
723 bool "Do additional checks at build time"
725 This enables the circular dependency and initcall checks.
726 Say 'Yes' here if you do kernel hacking.
729 string "Configuration label"
731 Text string with a name for this configuration. To be displayed in
737 bool "Prompt for experimental features"
739 Experimental features are available when enabling this option.
740 Enabling these features might be less than fully secure and may
741 disrupt the stability of your kernel.
746 def_bool y if JDB && (IA32 || AMD64 || ARM)
749 def_bool y if ARM || IA32 || PPC32 || SPARC
755 def_bool y if ARM_1136 || ARM_1176 || ARM_MPCORE
758 def_bool y if ARM_CORTEX_A8 || ARM_CORTEX_A9
761 def_bool y if ARM_V6 || ARM_V7
765 default 2 if WARN_ANY
766 default 1 if WARN_WARNING
767 default 0 if WARN_NONE
772 default "ux" if PF_UX
773 default "amd64" if AMD64 && PF_PC
774 default "ia32" if IA32 && PF_PC
775 default "ppc32" if PPC32
776 default "sparc" if SPARC
780 default "Intel 80486" if IA32_486
781 default "Intel Pentium" if IA32_586
782 default "Intel Pentium Pro" if IA32_686
783 default "Intel Pentium II" if IA32_P2
784 default "Intel Pentium III" if IA32_P3
785 default "Intel Pentium 4" if IA32_P4
786 default "Pentium M" if IA32_PM
787 default "AMD K6" if IA32_K6
788 default "AMD Athlon" if IA32_K7
789 default "Intel Core2" if IA32_CORE2 || AMD64_CORE2
790 default "Intel Atom" if IA32_ATOM || AMD64_ATOM
791 default "AMD Opteron" if IA32_K8 || AMD64_K8 || AMD64_K10 || IA32_K10