1 //-----------------------------------------------------------------------------
2 INTERFACE [arm && s3c2410]:
5 Cache_flush_area = 0x0,
9 //-----------------------------------------------------------------------------
10 IMPLEMENTATION [arm && s3c2410]:
15 map_dev<Mem_layout::Devices0_phys_base>(pd, 0);
16 map_dev<Mem_layout::Devices1_phys_base>(pd, 1);
17 map_dev<Mem_layout::Devices2_phys_base>(pd, 2);
18 map_dev<Mem_layout::Devices3_phys_base>(pd, 3);