kernel/fiasco/src/kern/arm/bsp/imx/timer-arm-imx_epit.cpp

   1 // --------------------------------------------------------------------------
   2 INTERFACE [arm && imx_epit]:
   3
   4 #include "kmem.h"
   5
   6 EXTENSION class Timer
   7 {
   8 private:
   9   enum {
  10     EPITCR   = Kmem::Timer_map_base + 0x00,
  11     EPITSR   = Kmem::Timer_map_base + 0x04,
  12     EPITLR   = Kmem::Timer_map_base + 0x08,
  13     EPITCMPR = Kmem::Timer_map_base + 0x0c,
  14     EPITCNR  = Kmem::Timer_map_base + 0x10,
  15
  16     EPITCR_ENABLE                  = 1 << 0, // enable EPIT
  17     EPITCR_ENMOD                   = 1 << 1, // enable mode
  18     EPITCR_OCIEN                   = 1 << 2, // output compare irq enable
  19     EPITCR_RLD                     = 1 << 3, // reload
  20     EPITCR_SWR                     = 1 << 16, // software reset
  21     EPITCR_WAITEN                  = 1 << 19, // wait enabled
  22     EPITCR_CLKSRC_IPG_CLK          = 1 << 24,
  23     EPITCR_CLKSRC_IPG_CLK_HIGHFREQ = 2 << 24,
  24     EPITCR_CLKSRC_IPG_CLK_32K      = 3 << 24,
  25     EPITCR_PRESCALER_SHIFT         = 4,
  26     EPITCR_PRESCALER_MASK          = ((1 << 12) - 1) << EPITCR_PRESCALER_SHIFT,
  27
  28     EPITSR_OCIF = 1,
  29   };
  30 };
  31
  32
  33 INTERFACE [arm && imx35]: // ----------------------------------------------
  34
  35 EXTENSION class Timer
  36 {
  37 public:
  38   static unsigned irq() { return 28; }
  39 };
  40
  41
  42 INTERFACE [arm && (imx51 || imx53)]: // -----------------------------------
  43
  44 EXTENSION class Timer
  45 {
  46 public:
  47   static unsigned irq() { return 40; }
  48 };
  49
  50
  51 // ------------------------------------------------------------------------
  52 IMPLEMENTATION [arm && imx_epit]:
  53
  54 #include "io.h"
  55 #include "kip.h"
  56
  57 IMPLEMENT
  58 void Timer::init(unsigned)
  59 {
  60   Io::write<Mword>(0, EPITCR); // Disable
  61   Io::write<Mword>(EPITCR_SWR, EPITCR);
  62   while (Io::read<Mword>(EPITCR) & EPITCR_SWR)
  63     ;
  64
  65   Io::write<Mword>(EPITSR_OCIF, EPITSR);
  66
  67   Io::write<Mword>(EPITCR_CLKSRC_IPG_CLK_32K
  68                    | (0 << EPITCR_PRESCALER_SHIFT)
  69                    | EPITCR_WAITEN
  70                    | EPITCR_RLD
  71                    | EPITCR_OCIEN
  72                    | EPITCR_ENMOD,
  73                    EPITCR);
  74
  75   Io::write<Mword>(0, EPITCMPR);
  76
  77   Io::write<Mword>(32, EPITLR);
  78
  79   Io::set<Mword>(EPITCR_ENABLE, EPITCR);
  80 }
  81
  82 static inline
  83 Unsigned64
  84 Timer::timer_to_us(Unsigned32 /*cr*/)
  85 { return 0; }
  86
  87 static inline
  88 Unsigned64
  89 Timer::us_to_timer(Unsigned64 us)
  90 { (void)us; return 0; }
  91
  92 PUBLIC static inline NEEDS["io.h"]
  93 void
  94 Timer::acknowledge()
  95 {
  96   Io::write<Mword>(EPITSR_OCIF, EPITSR);
  97 }
  98
  99 IMPLEMENT inline
 100 void
 101 Timer::update_one_shot(Unsigned64 /*wakeup*/)
 102 {}
 103
 104 IMPLEMENT inline NEEDS["config.h", "kip.h"]
 105 Unsigned64
 106 Timer::system_clock()
 107 {
 108   if (Config::Scheduler_one_shot)
 109     return 0;
 110   else
 111     return Kip::k()->clock;
 112 }