1 INTERFACE [arm && !kern_start_0xd]:
3 EXTENSION class Mem_layout
6 enum Virt_layout_umax : Address {
12 //---------------------------------------------------------------------------
13 INTERFACE [arm && kern_start_0xd]:
15 EXTENSION class Mem_layout
18 enum Virt_layout_umax : Address {
19 User_max = 0xd0000000,
24 //---------------------------------------------------------------------------
27 #include "template_math.h"
29 EXTENSION class Mem_layout
32 enum Virt_layout : Address {
33 Utcb_addr = User_max - 0x10000,
34 Service_page = 0xeac00000,
35 Tbuf_status_page = Service_page + 0x5000,
36 Tbuf_ustatus_page = Tbuf_status_page,
37 Tbuf_buffer_area = Service_page + 0x200000,
38 Tbuf_ubuffer_area = Tbuf_buffer_area,
39 Jdb_tmp_map_area = Service_page + 0x400000,
40 __free_1_start = 0xee000000,
41 __free_1_end = 0xef000000,
42 Cache_flush_area = 0xef000000,
43 Cache_flush_area_end = 0xef100000,
44 Registers_map_start = 0xef100000,
45 Registers_map_end = 0xeff00000,
46 Map_base = 0xf0000000,
48 Caps_start = 0xf5000000,
49 Caps_end = 0xfd000000,
50 Utcb_ptr_page = 0xffffd000,
51 // don't care about caches here, because arm uses a register on MP
52 utcb_ptr_align = Tl_math::Ld<sizeof(void*)>::Res,
53 Kern_lib_base = 0xffffe000,
54 Ivt_base = 0xffff0000,
55 Syscalls = 0xfffff000,
57 Kernel_max = 0x00000000,
59 Devices0_map_base = Registers_map_start + 0x00000000,
60 Devices1_map_base = Registers_map_start + 0x00100000,
61 Devices2_map_base = Registers_map_start + 0x00200000,
62 Devices3_map_base = Registers_map_start + 0x00300000,
63 Devices4_map_base = Registers_map_start + 0x00400000,
64 Devices5_map_base = Registers_map_start + 0x00500000,
65 Devices6_map_base = Registers_map_start + 0x00600000,
66 Devices7_map_base = Registers_map_start + 0x00700000,
67 Devices8_map_base = Registers_map_start + 0x00800000,
68 Devices9_map_base = Registers_map_start + 0x00900000,
72 // -------------------------------------------------------------------------
75 //---------------------------------
76 // Workaround GCC BUG 33661
77 // Do not use register asm ("r") in a template function, it will be ignored
78 //---------------------------------
81 Mem_layout::_read_special_safe(Mword const *address, Mword &v)
83 register Mword a asm("r14") = (Mword)address;
85 asm volatile ("msr cpsr_f, #0 \n" // clear flags
90 : [a] "=r" (a), [ret] "=r" (ret)
98 template< typename V >
100 Mem_layout::read_special_safe(V const *address, V &v)
103 bool ret = _read_special_safe(reinterpret_cast<Mword const*>(address), _v);
108 //---------------------------------
109 // Workaround GCC BUG 33661
110 // Do not use register asm ("r") in a template function, it will be ignored
111 //---------------------------------
114 Mem_layout::_read_special_safe(Mword const *a)
116 register Mword const *res __asm__ ("r14") = a;
117 __asm__ __volatile__ ("ldr %0, [%0]\n" : "=r" (res) : "r" (res) : "cc" );
122 template< typename T >
124 Mem_layout::read_special_safe(T const *a)
126 return T(_read_special_safe((Mword const *)a));
129 asm volatile ("msr cpsr_f, #0; ldr %0, [%1]; moveq %0, #0\n"
130 : "=r" (res) : "r" (a) : "cc");
137 Mem_layout::is_special_mapped(void const *a)
139 register Mword pagefault_if_0 asm("r14");
140 asm volatile ("msr cpsr_f, #0 \n" // clear flags
144 : "=r" (pagefault_if_0) : "0" (a) : "cc");
145 return pagefault_if_0;