3 #include "mem_layout.h"
6 class Mem_unit : public Mmu< Mem_layout::Cache_flush_area >
14 static void tlb_flush();
15 static void dtlb_flush(void *va);
16 static void tlb_flush(unsigned long asid);
17 static void tlb_flush(void *va, unsigned long asid);
20 //---------------------------------------------------------------------------
24 void Mem_unit::tlb_flush()
26 asm volatile("mcr p15, 0, %0, c8, c7, 0" // TLBIALL
27 : : "r" (0) : "memory");
31 void Mem_unit::dtlb_flush(void *va)
33 asm volatile("mcr p15, 0, %0, c8, c6, 1" // DTLBIMVA
34 : : "r" ((unsigned long)va & 0xfffff000) : "memory");
37 //---------------------------------------------------------------------------
38 IMPLEMENTATION [arm && armv5]:
41 void Mem_unit::tlb_flush(void *va, unsigned long)
43 asm volatile("mcr p15, 0, %0, c8, c7, 1"
44 : : "r" ((unsigned long)va & 0xfffff000) : "memory");
48 void Mem_unit::tlb_flush(unsigned long)
50 asm volatile("mcr p15, 0, r0, c8, c7, 0" : : "r" (0) : "memory");
53 //---------------------------------------------------------------------------
54 IMPLEMENTATION [arm && (armv6 || armv7)]:
57 void Mem_unit::tlb_flush(void *va, unsigned long asid)
59 if (asid == Asid_invalid)
63 asm volatile("mcr p15, 0, %0, c8, c7, 1" // TLBIMVA
64 : : "r" (((unsigned long)va & 0xfffff000) | asid) : "memory");
68 void Mem_unit::tlb_flush(unsigned long asid)
72 asm volatile("mcr p15, 0, %0, c8, c7, 2" // TLBIASID
73 : : "r" (asid) : "memory");