2 * (c) 2010 Adam Lackorzynski <adam@os.inf.tu-dresden.de>,
3 * Alexander Warg <warg@os.inf.tu-dresden.de>
4 * economic rights: Technische Universität Dresden (Germany)
6 * This file is part of TUD:OS and distributed under the terms of the
7 * GNU General Public License 2.
8 * Please see the COPYING-GPL-2 file for details.
11 #include "hw_device.h"
19 pci_conf_addr0(l4_uint32_t bus, l4_uint32_t dev,
20 l4_uint32_t fn, l4_uint32_t reg)
21 { return (bus << 16) | (dev << 11) | (fn << 8) | (reg & ~3); }
23 class Pci_iomem_root_bridge : public Pci_root_bridge, public Hw::Device
26 typedef Hw::Pci::Cfg_width Cfg_width;
28 explicit Pci_iomem_root_bridge(unsigned bus_nr = 0)
29 : Pci_root_bridge(bus_nr, this), _iobase_virt(0), _iobase_phys(~0UL),
30 _dev_start(~0UL), _dev_end(~0UL), _iosize(0)
32 set_discover_bus_if(this);
35 int cfg_read(Cfg_addr addr, l4_uint32_t *value, Cfg_width);
36 int cfg_write(Cfg_addr addr, l4_uint32_t value, Cfg_width);
42 int set_property(cxx::String const &prop, Prop_val const &val);
44 int getval(const char *s, cxx::String const &prop,
45 Prop_val const &val, T *rval);
46 int int_map(int i) const { return _int_map[i]; }
49 l4_addr_t _iobase_virt, _iobase_phys, _dev_start, _dev_end;
54 // Irq router that maps INTA-D to GSI
55 class Irq_router_rs : public Resource_space
58 bool request(Resource *parent, Device *, Resource *child, Device *cdev);
59 bool alloc(Resource *, Device *, Resource *, Device *, bool)
64 Pci_iomem_root_bridge::init()
66 if (_iobase_phys == ~0UL)
68 d_printf(DBG_ERR, "ERROR: Pci_root_bridge: 'iobase' not set.\n");
74 d_printf(DBG_ERR, "ERROR: Pci_root_bridge: 'iosize' not set.\n");
78 if (_dev_start == ~0UL || _dev_end == ~0UL)
80 d_printf(DBG_ERR, "ERROR: Pci_root_bridge: 'dev_start' and/or 'dev_end' not set.\n");
84 _iobase_virt = res_map_iomem(_iobase_phys, _iosize);
88 add_resource(new Resource(Resource::Mmio_res
89 | Resource::F_fixed_size
90 | Resource::F_fixed_addr,
92 _iobase_phys + _iosize - 1));
94 Resource *r = new Resource_provider(Resource::Mmio_res
95 | Resource::F_fixed_size
96 | Resource::F_fixed_addr);
97 r->alignment(0xfffff);
98 r->start_end(_dev_start, _dev_end);
101 r = new Resource_provider(Resource::Io_res
102 | Resource::F_fixed_size
103 | Resource::F_fixed_addr);
104 r->start_end(0, 0xffff);
107 add_resource(new Pci_irq_router_res<Irq_router_rs>());
113 Pci_iomem_root_bridge::scan_bus()
117 Pci_root_bridge::scan_bus();
121 Pci_iomem_root_bridge::cfg_read(Cfg_addr addr, l4_uint32_t *value, Cfg_width w)
128 l4_uint32_t a = _iobase_virt + addr.to_compat_addr();
131 case Pci::Cfg_byte: *value = *(volatile l4_uint8_t *)a; break;
132 case Pci::Cfg_short: *value = *(volatile l4_uint16_t *)a; break;
133 case Pci::Cfg_long: *value = *(volatile l4_uint32_t *)a; break;
136 d_printf(DBG_ALL, "Pci_iomem_root_bridge::cfg_read(%x, %x, %x, %x, %x, %d)\n",
137 addr.bus(), addr.dev(), addr.fn(), addr.reg(), *value, w);
143 Pci_iomem_root_bridge::cfg_write(Cfg_addr addr, l4_uint32_t value, Cfg_width w)
150 d_printf(DBG_ALL, "Pci_iomem_root_bridge::cfg_write(%x, %x, %x, %x, %x, %d)\n",
151 addr.bus(), addr.dev(), addr.fn(), addr.reg(), value, w);
153 l4_uint32_t a = _iobase_virt + addr.to_compat_addr();
156 case Pci::Cfg_byte: *(volatile l4_uint8_t *)a = value; break;
157 case Pci::Cfg_short: *(volatile l4_uint16_t *)a = value; break;
158 case Pci::Cfg_long: *(volatile l4_uint32_t *)a = value; break;
163 template< typename T>
165 Pci_iomem_root_bridge::getval(const char *s, cxx::String const &prop,
166 Prop_val const &val, T *rval)
170 if (val.type != Prop_val::Int)
173 *rval = val.val.integer;
180 Pci_iomem_root_bridge::set_property(cxx::String const &prop, Prop_val const &val)
184 if ((r = getval("iobase", prop, val, &_iobase_phys)) != -E_no_prop)
186 else if ((r = getval("iosize", prop, val, &_iosize)) != -E_no_prop)
188 else if ((r = getval("dev_start", prop, val, &_dev_start)) != -E_no_prop)
190 else if ((r = getval("dev_end", prop, val, &_dev_end)) != -E_no_prop)
192 else if ((r = getval("int_a", prop, val, &_int_map[0])) != -E_no_prop)
194 else if ((r = getval("int_b", prop, val, &_int_map[1])) != -E_no_prop)
196 else if ((r = getval("int_c", prop, val, &_int_map[2])) != -E_no_prop)
198 else if ((r = getval("int_d", prop, val, &_int_map[3])) != -E_no_prop)
201 return Hw::Device::set_property(prop, val);
204 static Hw::Device_factory_t<Pci_iomem_root_bridge>
205 __hw_pci_root_bridge_factory("Pci_iomem_root_bridge");
207 bool Irq_router_rs::request(Resource *parent, Device *pdev,
208 Resource *child, Device *cdev)
210 Hw::Device *cd = dynamic_cast<Hw::Device*>(cdev);
214 if (child->start() > 3)
217 int i = (child->start() + (cd->adr() >> 16)) & 3;
219 Pci_iomem_root_bridge *pd = dynamic_cast<Pci_iomem_root_bridge *>(pdev);
224 child->del_flags(Resource::F_relative);
225 child->start(pd->int_map(i));
226 child->del_flags(Resource::Irq_type_mask);
227 child->add_flags(Resource::Irq_type_level_low);
229 child->parent(parent);