From 95bb052365255ace319ad623d65ad94c5a0404f8 Mon Sep 17 00:00:00 2001
From: Jan Kiszka <jan.kiszka@siemens.com>
Date: Mon, 28 Jul 2014 15:46:31 +0200
Subject: [PATCH] configs/tools: Provide MSI parameters via config

This avoids having to extract these MSI capabilities from hardware in
the hypervisor.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
---
 configs/h87i.c                             | 12 ++++++++++++
 configs/pci-demo.c                         |  2 ++
 configs/qemu-vm.c                          |  2 ++
 hypervisor/include/jailhouse/cell-config.h |  3 +++
 tools/jailhouse-config-create              | 15 +++++++++++++--
 tools/root-cell-config.c.tmpl              |  2 ++
 6 files changed, 34 insertions(+), 2 deletions(-)

diff --git a/configs/h87i.c b/configs/h87i.c
index 334ea15..756bb07 100644
--- a/configs/h87i.c
+++ b/configs/h87i.c
@@ -149,6 +149,7 @@ struct {
 			.bdf = 0x8,
 			.caps_start = 1,
 			.num_caps = 4,
+			.num_msi_vectors = 1,
 		},
 		/* PCIDevice: 00:02.0 */
 		{
@@ -157,6 +158,7 @@ struct {
 			.bdf = 0x10,
 			.caps_start = 5,
 			.num_caps = 3,
+			.num_msi_vectors = 1,
 		},
 		/* PCIDevice: 00:03.0 */
 		{
@@ -165,6 +167,7 @@ struct {
 			.bdf = 0x18,
 			.caps_start = 8,
 			.num_caps = 3,
+			.num_msi_vectors = 1,
 		},
 		/* PCIDevice: 00:14.0 */
 		{
@@ -173,6 +176,8 @@ struct {
 			.bdf = 0xa0,
 			.caps_start = 11,
 			.num_caps = 2,
+			.num_msi_vectors = 8,
+			.msi_64bits = 1,
 		},
 		/* PCIDevice: 00:16.0 */
 		{
@@ -181,6 +186,8 @@ struct {
 			.bdf = 0xb0,
 			.caps_start = 13,
 			.num_caps = 2,
+			.num_msi_vectors = 1,
+			.msi_64bits = 1,
 		},
 		/* PCIDevice: 00:19.0 */
 		{
@@ -189,6 +196,8 @@ struct {
 			.bdf = 0xc8,
 			.caps_start = 15,
 			.num_caps = 3,
+			.num_msi_vectors = 1,
+			.msi_64bits = 1,
 		},
 		/* PCIDevice: 00:1a.0 */
 		{
@@ -205,6 +214,8 @@ struct {
 			.bdf = 0xd8,
 			.caps_start = 21,
 			.num_caps = 3,
+			.num_msi_vectors = 1,
+			.msi_64bits = 1,
 		},
 		/* PCIDevice: 00:1d.0 */
 		{
@@ -229,6 +240,7 @@ struct {
 			.bdf = 0xfa,
 			.caps_start = 24,
 			.num_caps = 3,
+			.num_msi_vectors = 1,
 		},
 		/* PCIDevice: 00:1f.3 */
 		{
diff --git a/configs/pci-demo.c b/configs/pci-demo.c
index 42b3c50..09b9447 100644
--- a/configs/pci-demo.c
+++ b/configs/pci-demo.c
@@ -79,6 +79,8 @@ struct {
 			.bdf = 0x00d8,
 			.caps_start = 0,
 			.num_caps = 1,
+			.num_msi_vectors = 1,
+			.msi_64bits = 1,
 		},
 	},
 
diff --git a/configs/qemu-vm.c b/configs/qemu-vm.c
index 7ae2cec..65367cb 100644
--- a/configs/qemu-vm.c
+++ b/configs/qemu-vm.c
@@ -142,6 +142,8 @@ struct {
 			.bdf = 0x00fa,
 			.caps_start = 2,
 			.num_caps = 2,
+			.num_msi_vectors = 1,
+			.msi_64bits = 1,
 		},
 		{ /* SMBus */
 			.type = JAILHOUSE_PCI_TYPE_DEVICE,
diff --git a/hypervisor/include/jailhouse/cell-config.h b/hypervisor/include/jailhouse/cell-config.h
index f54d163..2c6c685 100644
--- a/hypervisor/include/jailhouse/cell-config.h
+++ b/hypervisor/include/jailhouse/cell-config.h
@@ -65,6 +65,9 @@ struct jailhouse_pci_device {
 	__u16 bdf;
 	__u16 caps_start;
 	__u16 num_caps;
+	__u8 num_msi_vectors;
+	__u8 msi_64bits;
+	__u16 padding;
 } __attribute__((packed));
 
 #define JAILHOUSE_PCICAPS_WRITE		0x0001
diff --git a/tools/jailhouse-config-create b/tools/jailhouse-config-create
index b318116..beb2acb 100755
--- a/tools/jailhouse-config-create
+++ b/tools/jailhouse-config-create
@@ -111,11 +111,12 @@ def input_listdir(dir, wildcards):
 
 
 class PCICapability:
-    def __init__(self, id, start, len, flags):
+    def __init__(self, id, start, len, flags, content):
         self.id = id
         self.start = start
         self.len = len
         self.flags = flags
+        self.content = content
         self.comments = []
 
     def __eq__(self, other):
@@ -163,7 +164,9 @@ class PCICapability:
                 # unknown/unhandled cap, mark its existence
                 len = 2
                 flags = PCICapability.RD
-            caps.append(PCICapability(id, cap, len, flags))
+            f.seek(cap + 2)
+            content = f.read(len - 2)
+            caps.append(PCICapability(id, cap, len, flags, content))
         return caps
 
 
@@ -177,6 +180,14 @@ class PCIDevice:
         self.caps = caps
         self.caps_start = 0
         self.num_caps = len(caps)
+        self.num_msi_vectors = 0
+        self.msi_64bits = 0
+        for c in caps:
+            if c.id in (0x05, 0x11):
+                msg_ctrl = struct.unpack('<H', c.content[:2])[0]
+                if c.id == 0x05:  # MSI
+                    self.num_msi_vectors = 1 << ((msg_ctrl >> 1) & 0x7)
+                    self.msi_64bits = (msg_ctrl >> 7) & 1
 
     def __str__(self):
         return 'PCIDevice: %02x:%02x.%x' % (self.bus, self.dev, self.fn)
diff --git a/tools/root-cell-config.c.tmpl b/tools/root-cell-config.c.tmpl
index 962f795..fe85a51 100644
--- a/tools/root-cell-config.c.tmpl
+++ b/tools/root-cell-config.c.tmpl
@@ -109,6 +109,8 @@ struct {
 			.bdf = ${hex(d.bdf())},
 			.caps_start = ${d.caps_start},
 			.num_caps = ${d.num_caps},
+			.num_msi_vectors = ${d.num_msi_vectors},
+			.msi_64bits = ${d.msi_64bits},
 		},
 		% endfor
 	},
-- 
2.39.2