Jan Kiszka [Wed, 27 Aug 2014 19:03:14 +0000 (21:03 +0200)]
tools: jailhouse: Use a libexec subdir for extension scripts
We want our extension scripts to be under a standard directory, namely
$libexecdir/<package>. As libexecdir may be overwritten during
installation, accept it from the Makefile via a define.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Benjamin Block [Wed, 27 Aug 2014 17:40:52 +0000 (19:40 +0200)]
tools: add bash-completion for the jailhouse-tool
Because `jailhouse` is the main user-interface to the VM and some
command-chains are quite verbose (create, enable, cell create, cell
load, ...) it is very convenient to have a working bash-completion for
it.
This completes all current uses, although it is very static in some
places (as is the jh-tool) - some argument are only expected at certain
positions, etc.
For it to work, you need to have the `jailhouse`-tool in your
PATH-variable (obviously for the tool itself to work, you will likely
also need all other tools in PATH). Then just run
> . tools/jailhouse_bashcompletion
and it should work. You also need the bash-completion package installed
on your distribution and activated in your bash, otherwise the
source-operation will do nothing. For more details please read the
header of the file.
Known Bug: cell-namens as argument for the cell-subcommands can't contain
spaces
Signed-off-by: Benjamin Block <bebl@mageta.org>
[Jan: removed restriction to .bin files] Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Jan Kiszka [Tue, 26 Aug 2014 16:50:15 +0000 (18:50 +0200)]
tools: config-create: Place hypervisor and inmates at default addresses
If no location is specified and no memmap is found, use the default
address 0x3b000000 for the hypervisor and inmates region. This reduces
the need for adapting the included cell demo configs.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Jan Kiszka [Tue, 12 Aug 2014 08:09:02 +0000 (10:09 +0200)]
Update TODO
Remove recently added features, and also support for HPET MSIs (unused
on modern CPUs with proper APICs). Add a check for virtualized
environment (safety requirement) and the to-be-clarified topic NMI
status/control port.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Jan Kiszka [Sun, 24 Aug 2014 22:23:39 +0000 (00:23 +0200)]
configs/README: Fix and update QEMU config and demo description
The config file was no longer in sync with the setup described in the
README. Morever, we should include the HDA audio device in the QEMU
command line so that the pci-demo can be run. Update and enhance the
step-wise introduction in the README accordingly.
Include the virtio-9p-pci device in the config although we are not
referring to it in the README. It's an optional device at 00:1f.7, used
for local testings only.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Jan Kiszka [Sun, 24 Aug 2014 23:00:33 +0000 (01:00 +0200)]
configs: Release only ports 0x60, 0x61 and 0x64 to root cells
The i8042 is now moderated, just the NMI control registers needs a
second look and thought. Other ports in the range 0x60..0x67 should be
unused or are not wired up.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Jan Kiszka [Sun, 24 Aug 2014 18:53:10 +0000 (20:53 +0200)]
x86: Add i8042 moderation
To avoid that a cell can trigger a system reset or fiddle with the A20
gate via the keyboard controller i8042, intercept the command register
access. This happens for all cells, even when port access is granted.
The filter will only perform the access on behalf of the cell if port
access is granted in the cell's PIO bitmap - and the output port of the
i8042 is not touched as well.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Jan Kiszka [Sun, 24 Aug 2014 18:49:40 +0000 (20:49 +0200)]
x86: Prepare PIO error reporting for multiple filters
To prepare the addition of the i8042 filter, rework the PIO access error
reporting so that only unhandled errors are printed by the dispatcher.
The PCI config space handler is extended to dump a specific message.
This pattern is analogous to MMIO handling.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Jan Kiszka [Fri, 22 Aug 2014 05:24:03 +0000 (07:24 +0200)]
core: Remove cpu_data parameter from panic_stop/halt functions
In many cases, we had no chance to pass a proper cpu_data to these
functions anyway. These days we have this_*() and can make use of it
also for panic stopping/halting.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Jan Kiszka [Tue, 19 Aug 2014 13:47:47 +0000 (15:47 +0200)]
x86: Emulate interrupt remapping support to enable x2APIC usage
If we want to use x2APIC on real hardware (virtual machines do not have
this limitation), interrupt remapping has to be enabled. As we take over
hardware control from Linux, we either have to switch the APIC modes on
handover (tricky specifically for x2APIC->xAPIC) or let Linux boot with
interrupt remapping already enable. We choose the latter way as the
cleaner one that also allow us to run Linux without xAPIC emulation
(non-root cells are expected to use the x2APIC unconditionally).
IR emulation requires both the interpretation of the interrupt remapping
table that Linux uses (vtd_get_remapped_root_int) as well as basic
queued invalidation emulation (vtd_emulate_qi_request). We also need to
handle FSTS register reads, but we simply return 0 here and let
Jailhouse report all faults.
Physical address provided by Linux via registers and data structures are
mapped on demand into the hypervisor. This avoids that we create a
static mapping that depends on Linux-controlled parameters (would be bad
for check-summing). We also make sure this way that the addressed memory
still belongs to Linux.
Returning IR and QI to Linux is more complex than stealing it because we
not only have to load overwritten registers with their original values:
the Invalidation Queue Head cannot be set by software. Instead, we need
to inject dummy invalidation wait requests until the hardware reaches
the value Linux expects.
Note that this IR emulation feature is solely designed to be used by the
root cell. Non-root cells have to continue to program the virtualized
interrupt registers of assigned devices.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Jan Kiszka [Thu, 21 Aug 2014 11:50:39 +0000 (13:50 +0200)]
core: Validate access mode on guest page mappings
This extends [arch_]page_map_gphys2phys and also page_map_gvirt2gphys to
accept the required access mode for the target address and make them
validate if the guest would succeed when doing this on its own.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Jan Kiszka [Thu, 21 Aug 2014 11:46:31 +0000 (13:46 +0200)]
core: Extend entry_valid paging callback to check for flags
Generalize the entry_valid callback of paging_structures to test for a
given set of flags, not only the present flag. This will allow us to
validate the access mode on guest and 2nd-level page table walks. For
now we just continue to test PAGE_PRESENT_FLAGS.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Jan Kiszka [Thu, 21 Aug 2014 08:35:40 +0000 (10:35 +0200)]
core: Switch cell_create to page_map_get_guest_pages
This consolidates the code and provides us guest address validation. The
latter is not yet critical as the configuration file may mess up much
more, but it's nice to have and may be beneficial once we can validate
configurations in some Linux-independent way.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Jan Kiszka [Fri, 22 Aug 2014 07:11:19 +0000 (09:11 +0200)]
core: Remove cpu_data parameter from page_map_get_guest_pages
page_map_get_guest_pages is only allowed to work against the current
CPU. Now that we have this_cpu_data(), we can remove that parameter
from page_map_get_guest_pages to encode this in the API.
This also affects some (indirect) callers positively.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Jan Kiszka [Thu, 21 Aug 2014 07:16:48 +0000 (09:16 +0200)]
core: Enhance page_map_get_guest_page(s)
Generalize page_map_get_guest_page to map multiple pages in a single
run. Moreover, accept both guest-physical and guest-virtual addresses as
input: if pg_structs is NULL, a physical address is provided.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Jan Kiszka [Thu, 21 Aug 2014 21:08:44 +0000 (23:08 +0200)]
core: Introduce accessors for current per_cpu fields
Reserve a register for a quick lookup of fields in the current per_cpu
data structure and enable the address, cpu_id and cell for such direct
access. The accessors are named this_<field>().
This will allow us to avoid passing context references around to deeply
nested users.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Jan Kiszka [Thu, 21 Aug 2014 04:47:35 +0000 (06:47 +0200)]
x86: Introduce x2apic_filter_logical_dest
This helper matches a logical destination mask, redirection hint
enabled, against a cell CPU set and removes all the CPUs from the mask
that are not part of the cell. This can be used to filter/validate IRTE
parameters before programming them.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Jan Kiszka [Fri, 22 Aug 2014 06:22:18 +0000 (08:22 +0200)]
core: Let arch_init_late decide when to map memory regions
When VT-d emulation is used on x86, will have to access the root cell's
memory during interrupt handover. This requires us to map the memory
regions right after vtd_init.
To enable this, move the decision when to map the regions into the hands
of arch_init_late. We provide map_root_memory_regions for this.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Jan Kiszka [Wed, 20 Aug 2014 17:28:12 +0000 (19:28 +0200)]
core: Reorder CPU initialization during setup
Make sure all CPUs are initialized prior to running the late setup. On
x86, we need the APIC map to be fully populated before performing the
VT-d handover.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Jan Kiszka [Wed, 20 Aug 2014 07:08:01 +0000 (09:08 +0200)]
core/configs/tools: Report IOMMU association of devices via config file
We will need this information for emulating VT-d for the root cell:
Add an iommu field to the PCI device config structure and encode the
unit number in the id field of the IOAPIC's irqchip structure.
The config generator fills the fields according to the DMAR ACPI table.
However, we do not yet understand all exotic forms of Device Scope
structures.
If it turns out that there are PCI devices without any IOMMU
association, refuse to generate a config file - such systems are
unsupported (with the temporary exception of AMD platforms).
Update the h87i config accordingly. QEMU currently only exposes a single
DMAR unit, thus the implicit zero-initialization is fine. As the IOMMU
number is only used in the context of the root cell, ioapic-demo and
pci-demo require no updates as well.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Jan Kiszka [Mon, 18 Aug 2014 06:09:15 +0000 (08:09 +0200)]
x86: Simplify DMAR unit discovery
Perform counting and resource allocation before iterating over all
units. This not only allows to drop some code but also removes the
restrictive allocation pattern for the unit MMIO and invalidation queue
pages.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Jan Kiszka [Thu, 14 Aug 2014 06:48:55 +0000 (08:48 +0200)]
x86: Consolidate VT-d unit initialization
Move TE and IRE setting into vtd_init_unit and call that services only
when we perform the initial configuration commit. This will also help
with handing over VT-d to Jailhouse in case we take over interrupt
remapping and queued invalidation from Linux.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Jan Kiszka [Fri, 15 Aug 2014 13:04:53 +0000 (15:04 +0200)]
core: Virtualize MSI-X for interrupt remapping support
Similar to MSI support, this adds virtualization of MSI-X in order to
remap those interrupts via VT-d.
We have to intercept the MMIO access to the MSI-X tables of PCI devices
for this. Finding the corresponding device is done via a separate
per-cell list of all MSI-X capable PCI devices a cell contains. It is
built during cell creation, i.e. when devices are added, and it shrinks
again when devices are removed from a cell.
MSI-X device handover from/to Linux is simpler as we can centrally mask
all MSI-X vectors of a device.
As we may intercept more than the MSI-X table, accesses beyond it have
to be processed as well. Writes to the PBA are not allowed, reads from
anything after the table are simply performed on behalf of the cell.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Jan Kiszka [Sat, 16 Aug 2014 07:00:18 +0000 (09:00 +0200)]
configs/tools: Exclude MSI-X table from memory regions
We need to virtualize the access to the MSI-X table, thus we have to
prevent that the cells access them directly. As the table may be
embedded into a larger BAR, specifically followed by the PBA, split up
the BAR region as required.
Update the QEMU config accordingly - currently the only config with
MSI-X devices.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Jan Kiszka [Tue, 12 Aug 2014 07:40:23 +0000 (09:40 +0200)]
configs/x86: Add check for VT-d existence
Add a check that validates the existence of configured VT-d units.
Require that every config contains at least one unit. Experimental VT-d
emulation, including interrupt remapping support, is now available for
QEMU. So we can set the config fields accordingly. If VT-d is disabled
or a QEMU version without that support is used, the hypervisor continues
to ignore this error.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
This fills vtd_map_interrupt with the missing logic to set entries in
the interrupt remapping table and programs the hardware to use that
table, blocking all non-remappable interrupts.
vtd_map_interrupt performs the required entry validation and rejects any
improper settings. There is one exception: CPU masks in logical
destination mode will silently be adjusted instead of failing the
service call. The reason is that Linux may have these masks set for
practically inactive interrupt vectors programmed (e.g. enabled MSI
vectors of PCIe ports without any port service using them) and will only
update them when they may be used again. Failing such settings would
stop Linux prematurely.
We reserve remapping table entries for the IOAPIC upon cell creation. We
also reserve as many entries as MSI vectors are reported for each PCI
device of a cell. IOAPIC reservation happens only once, and the region
is kept over the lifetime of the hypervisor as the IOAPIC may be shared
between cells (though this is not recommended). PCI device reservations
are released again when the device is removed from its owning cell.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Jan Kiszka [Sun, 27 Jul 2014 12:42:56 +0000 (14:42 +0200)]
core: Virtualize legacy MSI for interrupt remapping support
Analogously to edge-triggered IOAPIC interrupts, handover all legacy
MSIs by disabling them first, programming the VT-d remapping table and
then writing remappable parameters into the MSI capability registers.
An additional triggering of active vectors ensures that we do not lose
events during handover.
Disabling is done on x86 via a trick: we program an empty CPU mask in
logical destination mode.
MSI-X remains on the to-do list. Thus, once enabling interrupt
remapping, systems that use MSI-X will become unsupported for the time
being.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Jan Kiszka [Sat, 7 Jun 2014 12:26:34 +0000 (14:26 +0200)]
x86: Virtualize IOAPIC redir table for interrupt remapping support
Handover the IOAPIC on hypervisor setup by first masking all pins, then
requesting interrupt remapping from VT-d and finally reprogramming them
according to the index that VT-d reported. If vtd_map_interrupt returns
-ENOSYS, unconditionally right now due to a missing implementation,
later on when running in QEMU, we continue to write the redirection
table entry unmodified.
As we may lose edge-triggered interrupts while they are makes, we inject
them unconditionally into the target CPU. This may cause one spurious
interrupt per handover to/from the hypervisor, but Linux can deal with
that.
Whenever a cell is added or removed, we rewrite all root cell IOAPIC
redir table entries in order to validate them regarding the target CPU
masks.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Jan Kiszka [Fri, 8 Aug 2014 07:23:50 +0000 (09:23 +0200)]
core: Report root cell as added/removed on initial config commit
This aligns the initial config commit with those performed on non-root
cell creation and destruction. We only need to avoid some then redundant
operations on the root cell in x86's arch_config_commit and
vtd_config_commit.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Jan Kiszka [Tue, 1 Jul 2014 16:56:50 +0000 (18:56 +0200)]
x86: Factor out vtd_update_gcmd_reg
This encapsulates changes to the global command register that preserve
the current state and wait for the state change to become effective.
Both setting and clearing is supported.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Jan Kiszka [Thu, 7 Aug 2014 06:25:17 +0000 (08:25 +0200)]
configs/tools: Introduce device and interrupt number limit
VT-d interrupt remapping but also (one day) AMD IOMMUs require us to
dimension related tables during setup. Introduce two parameters to the
config file, one set an upper limit of interrupts (all types) that the
system may have to control (for all cells) and another one for devices
in the system. The former will be used for VT-d, the latter should once
be helpful for AMD support, thus it can remain unset in Intel configs.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Jan Kiszka [Thu, 21 Aug 2014 17:30:39 +0000 (19:30 +0200)]
tools: config-create: Remove write restriction for ACPI regions
We don't depend on ACPI in the hypervisor anymore. Also, the NVS memory
may contain some semaphore the kernel updates to synchronize with the
chipset-embedded controller. So let's give Linux full access to this
memory again.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
tools: config-create: Initial support for non-Intel boards
DMAR is Intel-specific. For AMD, we need to parse IVRS table, but
this code is currently missing since there is no IOMMU support in
AMD-V port.
Initially, we just make DMAR optional and ignore possible errors
on AMD (Intel will still fail at signature check stage if DMAR is
missing, however the error message will be somewhat misleading).
The template was also modified so missing bits of information are
not included (and IOAPIC ID is set to zero).
Signed-off-by: Valentine Sinitsyn <valentine.sinitsyn@gmail.com> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
We do not support complex device scope paths yet, code this into the
parsing function. This allows to simplify the call sites as well because
parse_dmar_devscope will now read as many bytes as supported or fail.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Henning Schild [Tue, 12 Aug 2014 14:56:58 +0000 (16:56 +0200)]
tools: config-create: more fine grained parsing of /proc/iomem
Parse /proc/iomem keeping the tree structure. So far we only looked at
the top level entries, mainly at the type strings. But for more fine
grained selection of memory regions we need to look deeper into the
tree.
Signed-off-by: Henning Schild <henning.schild@siemens.com> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Henning Schild [Thu, 7 Aug 2014 12:45:52 +0000 (14:45 +0200)]
tools: config-create: make sure we are root when reading input files
File access permissions allow users and root to read PCI config spaces
of devices via sysfs. But depending on your uid you will read different
content.
That is why we have to make sure we open those files as root and can not
just rely on getting an EPERM.
Signed-off-by: Henning Schild <henning.schild@siemens.com>
[Jan: removed extra blank line] Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Jan Kiszka [Wed, 20 Aug 2014 17:08:53 +0000 (19:08 +0200)]
x86: Rework APIC_INVALID_ID to CPU_ID_INVALID
APIC_INVALID_ID is actually an invalid logical CPU ID. Rename the
constant and also ensure that no CPU is registered with this ID. That
way we can drop one extra test from apic_send_ipi as this ID will never
be included in any CPU set.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Jan Kiszka [Wed, 20 Aug 2014 17:01:01 +0000 (19:01 +0200)]
core: Introduce and use cell_owns_cpu
This helper combines the check for the maximum CPU number with the
consultation of the CPU set's bitmap. Both helps to make the code more
compact and avoid to forget the former test in the future.
We keep it inline as it generates quite a bit boilerplate code
otherwise, and IPI transmission depends on efficient execution.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Henning Schild [Tue, 5 Aug 2014 12:08:50 +0000 (14:08 +0200)]
tools: config-create: locate templates next to script or in given dir
When the script was called from outside the tools dir the templates
could not be found.
This patch assumes the templates are next to the script, one can also
specify a path.
Signed-off-by: Henning Schild <henning.schild@siemens.com> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Jan Kiszka [Mon, 4 Aug 2014 14:35:20 +0000 (16:35 +0200)]
core: Adjust max_cpu_id calculation in cell_init
No need to set the limit to what we can hold in the bitmap. The limit is
better defined by the cpu set size in the config file. This not only
simplifies the code but also shortens cpu set iterations.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Jan Kiszka [Mon, 4 Aug 2014 12:16:49 +0000 (14:16 +0200)]
core: Enforce online CPUs == expected CPUs
No longer allow the hypervisor to start with less than the number of
expected CPUs. This prevents that we leave (known) CPUs under native
control after the hypervisor started.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Jan Kiszka [Fri, 1 Aug 2014 15:23:26 +0000 (17:23 +0200)]
x86: Use union for MSI address & data encoding/decoding
We will work more intensively with MSIs. Encoding the address and data
word fields as a union with bit fields will simplify those tasks. For
now we can already exploit this in vtd_init_fault_nmi.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Jan Kiszka [Wed, 30 Jul 2014 18:54:38 +0000 (20:54 +0200)]
core/configs/tools: Remove ACPI support from hypervisor
The is no more user of the APCI table lookup. Remove this code as well
as the config memory region in the configuration files. Update the
config generator accordingly.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Jan Kiszka [Wed, 30 Jul 2014 16:15:43 +0000 (18:15 +0200)]
configs/tools: Describe DMAR units in config files
This prepares to switch from ACPI parsing to config file based DMAR unit
discovery. For simplicity reasons, we limit the number of supported DMAR
units to 8. Can be extended or made dynamic when needed.
Update the h87i config accordingly.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Jan Kiszka [Wed, 30 Jul 2014 15:15:46 +0000 (17:15 +0200)]
configs: Require Q35 machine model for QEMU-based test setup
With the introduction of config-based MMCONFIG parameters, it becomes
impossible to have one QEMU config for both its PC machines. Restrict
us to the one that will soon gain VT-d support: Q35.
Update README to reflect these requirements and changes.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Jan Kiszka [Mon, 4 Aug 2014 08:41:52 +0000 (10:41 +0200)]
core: Disable PCI devices on removal
Switch off any bus master, MMIO and PIO dispatching when removing a
device from a cell. Also try to suppress INTx signals (not all devices
may respect this).
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Jan Kiszka [Mon, 4 Aug 2014 06:29:26 +0000 (08:29 +0200)]
core: Fix PCI device runtime ownership tracking
Trigger PCI device addition and removal from the PCI core and update the
cell field in the device state in order to track active ownership. The
vtd module now only provides callbacks to update its tables when adding
or removing a device.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Jan Kiszka [Tue, 29 Jul 2014 18:34:24 +0000 (20:34 +0200)]
core: Introduce PCI device state
We will have to store a number of runtime state information for PCI
devices, specifically its owner. Allocate these states as an array
during cell creation and release them on cell destruction.
We can already use the structure to keep a reference to the cell the
device belongs to. This avoids having to pass this around over multiple
hops. It will also be used soon to encode runtime ownership by setting
or clearing the reference.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Jan Kiszka [Tue, 29 Jul 2014 18:45:23 +0000 (20:45 +0200)]
core: Only perform PCI config space writes on PCI_ACCESS_PERFORM
If we emulate a config space write, we may be able to skip the physical
access completely. To model this, rename PCI_ACCESS_EMULATE to
PCI_ACCESS_DONE which signals to the caller of the moderation functions
that no physical access should be performed.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Jan Kiszka [Sun, 3 Aug 2014 19:11:37 +0000 (21:11 +0200)]
core: Pass value directly to pci_cfg_write_moderate
Convert pass-by-reference to pass-by-value for the value
pci_cfg_write_moderate should handle. Reason: either we will emulate and
write in the context of the moderation, or we let the original value
pass as-is.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Jan Kiszka [Sun, 27 Jul 2014 17:38:48 +0000 (19:38 +0200)]
core/configs/tools: Switch PCI configuration format to single BDF value
There is no value in splitting up the PCI device address in the config
format into bus and devfn. Fold them into a single value that can easier
be matched and is also easily be split up again via new helper macros
whenever needed.
This generates some work for locally maintained config file, sorry.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>