X-Git-Url: https://rtime.felk.cvut.cz/gitweb/jailhouse.git/blobdiff_plain/4e0ea74420900c7a66d265117b09fddbc3aaa754..f053c948f5b6fe7b9ec5cf6533e177fd42113ba3:/hypervisor/arch/x86/include/asm/cell.h

diff --git a/hypervisor/arch/x86/include/asm/cell.h b/hypervisor/arch/x86/include/asm/cell.h
index 02a4f70..2223532 100644
--- a/hypervisor/arch/x86/include/asm/cell.h
+++ b/hypervisor/arch/x86/include/asm/cell.h
@@ -36,8 +36,8 @@ struct arch_cell {
 		struct {
 			/** I/O Permissions Map. */
 			u8 *iopm;
-			/** Paging structures used for cell CPUs. */
-			struct paging_structures npt_structs;
+			/** Paging structures used for cell CPUs and IOMMU. */
+			struct paging_structures npt_iommu_structs;
 		} svm; /**< AMD SVM-specific fields. */
 	};
 
@@ -49,7 +49,6 @@ struct arch_cell {
 			 * cell. */
 			bool ir_emulation;
 		} vtd; /**< Intel VT-d specific fields. */
-		/* TODO: No struct vtd equivalent for SVM code yet. */
 	};
 
 	/** Shadow value of PCI config space address port register. */
@@ -59,6 +58,11 @@ struct arch_cell {
 	struct cell_ioapic *ioapics;
 	/** Number of assigned IOAPICs. */
 	unsigned int num_ioapics;
+
+	/** Class Of Service for cache allocation (Intel only). */
+	u32 cos;
+	/** Allocated L3 cache region (Intel only). */
+	u64 cat_mask;
 };
 
 #endif /* !_JAILHOUSE_ASM_CELL_H */